Lines Matching defs:val
92 ISA::setFSReg(int miscReg, RegVal val, ThreadContext *tc)
100 setMiscRegNoEffect(miscReg, val);;
104 return setMiscReg(MISCREG_SOFTINT, ~val & softint, tc);
106 return setMiscReg(MISCREG_SOFTINT, val | softint, tc);
111 setMiscRegNoEffect(miscReg, val);
120 DPRINTF(Timer, "writing to TICK compare register value %#X\n", val);
126 setMiscRegNoEffect(miscReg, val);
136 DPRINTF(Timer, "writing to sTICK compare register value %#X\n", val);
140 setMiscRegNoEffect(miscReg, val);
144 setMiscRegNoEffect(miscReg, val);
152 setMiscRegNoEffect(miscReg, val);
161 setMiscRegNoEffect(miscReg, val & ULL(~0x7FFF));
166 setMiscRegNoEffect(miscReg, val);
174 setMiscRegNoEffect(miscReg, val);
182 setMiscRegNoEffect(miscReg, val);
190 setMiscRegNoEffect(miscReg, val);
197 setMiscRegNoEffect(miscReg, val);
207 DPRINTF(Timer, "writing to hsTICK compare register value %#X\n", val);
212 HPSTATE newVal = val;
214 // T1000 spec says impl. dependent val must always be 1
224 setMiscRegNoEffect(miscReg, val);
228 if (bits(val,2,2))
230 setMiscRegNoEffect(miscReg, bits(val,0,0));
231 if (!bits(val,0,0)) {