arch/sparc/faults.cc

306     RegVal TSTATE = tc->readMiscRegNoEffect(MISCREG_TSTATE);
320     // set TSTATE.gl to gl
321     replaceBits(TSTATE, 42, 40, GL);
322     // set TSTATE.ccr to ccr
323     replaceBits(TSTATE, 39, 32, CCR);
324     // set TSTATE.asi to asi
325     replaceBits(TSTATE, 31, 24, ASI);
326     // set TSTATE.pstate to pstate
327     replaceBits(TSTATE, 20, 8, pstate);
328     // set TSTATE.cwp to cwp
329     replaceBits(TSTATE, 4, 0, CWP);
331     // Write back TSTATE
332     tc->setMiscRegNoEffect(MISCREG_TSTATE, TSTATE);
385     RegVal TSTATE = tc->readMiscRegNoEffect(MISCREG_TSTATE);
403     // set TSTATE.gl to gl
404     replaceBits(TSTATE, 42, 40, GL);
405     // set TSTATE.ccr to ccr
406     replaceBits(TSTATE, 39, 32, CCR);
407     // set TSTATE.asi to asi
408     replaceBits(TSTATE, 31, 24, ASI);
409     // set TSTATE.pstate to pstate
410     replaceBits(TSTATE, 20, 8, pstate);
411     // set TSTATE.cwp to cwp
412     replaceBits(TSTATE, 4, 0, CWP);
414     // Write back TSTATE
415     tc->setMiscRegNoEffect(MISCREG_TSTATE, TSTATE);