Lines Matching refs:readMiscRegNoEffect
180 PRIdReg procId = readMiscRegNoEffect(MISCREG_PRID);
193 ConfigReg cfg = readMiscRegNoEffect(MISCREG_CONFIG);
207 Config1Reg cfg1 = readMiscRegNoEffect(MISCREG_CONFIG1);
229 Config2Reg cfg2 = readMiscRegNoEffect(MISCREG_CONFIG2);
246 Config3Reg cfg3 = readMiscRegNoEffect(MISCREG_CONFIG3);
262 EBaseReg eBase = readMiscRegNoEffect(MISCREG_EBASE);
273 SRSCtlReg scsCtl = readMiscRegNoEffect(MISCREG_SRSCTL);
282 IntCtlReg intCtl = readMiscRegNoEffect(MISCREG_INTCTL);
292 WatchHiReg watchHi = readMiscRegNoEffect(MISCREG_WATCHHI0);
301 PerfCntCtlReg perfCntCtl = readMiscRegNoEffect(MISCREG_PERFCNT0);
318 PageGrainReg pageGrain = readMiscRegNoEffect(MISCREG_PAGEGRAIN);
327 StatusReg status = readMiscRegNoEffect(MISCREG_STATUS);
347 MVPConf0Reg mvpConf0 = readMiscRegNoEffect(MISCREG_MVP_CONF0);
354 VPEConf0Reg vpeConf0 = readMiscRegNoEffect(MISCREG_VPE_CONF0);
360 TCBindReg tcBind = readMiscRegNoEffect(MISCREG_TC_BIND, tid);
365 TCHaltReg tcHalt = readMiscRegNoEffect(MISCREG_TC_HALT);
371 TCStatusReg tcStatus = readMiscRegNoEffect(MISCREG_TC_STATUS);
377 tcStatus = readMiscRegNoEffect(MISCREG_TC_STATUS, tid);
421 ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) const
540 MVPConf0Reg mvpConf0 = readMiscRegNoEffect(MISCREG_MVP_CONF0);
544 TCStatusReg tcStatus = readMiscRegNoEffect(MISCREG_TC_STATUS, tid);
545 TCHaltReg tcHalt = readMiscRegNoEffect(MISCREG_TC_HALT, tid);