arch/mips/dsp.cc

495     int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
498     int nvals = SIMD_NVALS[infmt];
505     simdUnpack(a, a_values, infmt, SIGNED);
506     simdUnpack(b, b_values, infmt, SIGNED);
511             if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
512                 b_values[i] == FIXED_SMIN[infmt]) {
520             if (a_values[i] == FIXED_SMIN[infmt] &&
521                 b_values[i] == FIXED_SMIN[infmt]) {
562     int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
565     int nvals = SIMD_NVALS[infmt];
572     simdUnpack(a, a_values, infmt, SIGNED);
573     simdUnpack(b, b_values, infmt, SIGNED);
578             if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
579                 b_values[i] == FIXED_SMIN[infmt]) {
587             if (a_values[i] == FIXED_SMIN[infmt] &&
588                 b_values[i] == FIXED_SMIN[infmt]) {
873 MipsISA::dspPrece(int32_t a, int32_t infmt, int32_t insign, int32_t outfmt,
877     int ninvals = SIMD_NVALS[infmt];
884       sa = SIMD_NBITS[infmt];
886       sa = SIMD_NBITS[infmt] - 1;
890     simdUnpack(a, in_values, infmt, insign);