Lines Matching refs:write
554 // write the value into the physical VGPR. This is a
556 w->computeUnit->vrf[w->simdId]->write<c0>(physVgpr,
563 // Schedule the write operation of the load data on the VRF.
564 // This simply models the timing aspect of the VRF write operation.
1032 // stores don't write anything back, so there is nothing
1066 gpuDynInst->wavefront()->ldsChunk->write<c0>(vaddr,
1534 // write the value into the physical VGPR. This is a
1536 w->computeUnit->vrf[w->simdId]->write<CType>(physVgpr, *p1, i);
1541 // Schedule the write operation of the load data on the VRF.
1542 // This simply models the timing aspect of the VRF write operation.
1585 wavefront->ldsChunk->write<c0>(vaddr,
1588 wavefront->ldsChunk->write<c0>(vaddr,
1591 wavefront->ldsChunk->write<c0>(vaddr,
1595 wavefront->ldsChunk->write<c0>(vaddr,
1599 wavefront->ldsChunk->write<c0>(vaddr,
1602 wavefront->ldsChunk->write<c0>(vaddr,
1605 wavefront->ldsChunk->write<c0>(vaddr,
1608 wavefront->ldsChunk->write<c0>(vaddr,
1611 wavefront->ldsChunk->write<c0>(vaddr,
1614 wavefront->ldsChunk->write<c0>(vaddr, (*e));
1616 wavefront->ldsChunk->write<c0>(vaddr,