Lines Matching refs:tsz
558 int tsz, n;
575 tsz = sext<4>(currState->vtcr.t0sz);
580 tsz = currState->htcr.t0sz;
624 tsz = currState->ttbcr.t0sz;
648 tsz = currState->ttbcr.t1sz;
672 n = 5 - tsz;
679 n = (tsz >= 2 ? 14 - tsz : 12);
722 TableWalker::adjustTableSizeAArch64(unsigned tsz)
724 if (tsz < 25)
726 if (tsz > 48)
728 return tsz;
755 int tsz = 0, ps = 0;
767 tsz = 64 - currState->vtcr.t0sz64;
789 tsz = adjustTableSizeAArch64(64 - currState->tcr.t0sz);
792 if (bits(currState->vaddr, 63, tsz) != 0x0 ||
799 tsz = adjustTableSizeAArch64(64 - currState->tcr.t1sz);
802 if (bits(currState->vaddr, 63, tsz) != mask(64-tsz) ||
818 tsz = adjustTableSizeAArch64(64 - currState->tcr.t0sz);
827 tsz = adjustTableSizeAArch64(64 - currState->tcr.t1sz);
830 if (bits(currState->vaddr, 63, tsz) != mask(64-tsz) ||
846 tsz = adjustTableSizeAArch64(64 - currState->tcr.t0sz);
921 if (tsz > lookup[L]) {
933 int base_addr_lo = 3 + tsz - stride * (3 - start_lookup_level) - tg;
977 (bits(currState->vaddr, tsz - 1,