arm/kvm/armv8_cpu.cc

221     CPSR cpsr(tc->readMiscReg(MISCREG_CPSR));
222     cpsr.nz = tc->readCCReg(CCREG_NZ);
223     cpsr.c = tc->readCCReg(CCREG_C);
224     cpsr.v = tc->readCCReg(CCREG_V);
225     if (cpsr.width) {
226         cpsr.ge = tc->readCCReg(CCREG_GE);
228         cpsr.ge = 0;
230     DPRINTF(KvmContext, "  %s := 0x%x\n", "PSTATE", cpsr);
231     setOneReg(INT_REG(regs.pstate), static_cast<uint64_t>(cpsr));
287     const CPSR cpsr(getOneRegU64(INT_REG(regs.pstate)));
288     DPRINTF(KvmContext, "  %s := 0x%x\n", "PSTATE", cpsr);
289     tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr);
290     tc->setCCReg(CCREG_NZ, cpsr.nz);
291     tc->setCCReg(CCREG_C, cpsr.c);
292     tc->setCCReg(CCREG_V, cpsr.v);
293     if (cpsr.width) {
294         tc->setCCReg(CCREG_GE, cpsr.ge);
348     pc.thumb(cpsr.t);
352     pc.nextThumb(cpsr.t);