arm/kvm/armv8_cpu.cc

71 kvmXReg(const int num)
78 kvmFPReg(const int num)
100 const std::vector<ArmV8KvmCPU::IntRegInfo> ArmV8KvmCPU::intRegMap = {
105 const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegMap = {
116 const std::set<MiscRegIndex> ArmV8KvmCPU::deviceRegSet = {
122 const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegIdMap = {
141     for (const auto &ri : miscRegIdMap) {
142         const uint64_t value(tc->readMiscReg(ri.idx));
149 ArmV8KvmCPU::dump() const
159     for (const auto &ri : intRegMap)
164     for (const auto &ri : miscRegMap)
167     for (const auto &ri : miscRegIdMap)
170     for (const auto &reg : getRegList()) {
171         const uint64_t arch(reg & KVM_REG_ARCH_MASK);
177         const uint64_t type(reg & KVM_REG_ARM_COPROC_MASK);
184               const uint64_t op0(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP0));
185               const uint64_t op1(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP1));
186               const uint64_t crn(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRN));
187               const uint64_t crm(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRM));
188               const uint64_t op2(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP2));
189               const MiscRegIndex idx(
198               const uint64_t id(EXTRACT_FIELD(reg, KVM_REG_ARM_DEMUX_ID));
199               const uint64_t val(EXTRACT_FIELD(reg, KVM_REG_ARM_DEMUX_VAL));
233     for (const auto &ri : miscRegMap) {
234         const uint64_t value(tc->readMiscReg(ri.idx));
240         const uint64_t value(tc->readIntReg(INTREG_X0 + i));
245     for (const auto &ri : intRegMap) {
246         const uint64_t value(tc->readIntReg(ri.idx));
252         const RegIndex reg_base(i * FP_REGS_PER_VFP_REG);
261     for (const auto &ri : getSysRegMap()) {
287     const CPSR cpsr(getOneRegU64(INT_REG(regs.pstate)));
299     for (const auto &ri : miscRegMap) {
300         const auto value(getOneRegU64(ri.kvm));
306         const auto value(getOneRegU64(kvmXReg(i)));
317     for (const auto &ri : intRegMap) {
318         const auto value(getOneRegU64(ri.kvm));
324         const RegIndex reg_base(i * FP_REGS_PER_VFP_REG);
332     for (const auto &ri : getSysRegMap()) {
333         const auto value(getOneRegU64(ri.kvm));
358 const std::vector<ArmV8KvmCPU::MiscRegInfo> &
359 ArmV8KvmCPU::getSysRegMap() const
365     for (const auto &reg : getRegList()) {
366         const uint64_t arch(reg & KVM_REG_ARCH_MASK);
370         const uint64_t type(reg & KVM_REG_ARM_COPROC_MASK);
374         const uint64_t op0(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP0));
375         const uint64_t op1(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP1));
376         const uint64_t crn(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRN));
377         const uint64_t crm(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRM));
378         const uint64_t op2(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_OP2));
379         const MiscRegIndex idx(decodeAArch64SysReg(op0, op1, crn, crm, op2));
380         const auto &info(miscRegInfo[idx]);
381         const bool writeable(
386         const bool implemented(