Lines Matching refs:RegIndex

115     RegIndex dest, ura;
120 RegIndex _dest, RegIndex _ura, uint32_t _imm)
134 RegIndex dest, op1;
138 RegIndex _dest, RegIndex _op1, uint32_t _step)
151 OpClass __opClass, RegIndex _dest, RegIndex _op1,
165 RegIndex dest, op1;
169 RegIndex _dest, RegIndex _op1, uint8_t _eSize,
182 RegIndex dest, op1;
187 OpClass __opClass, RegIndex _dest, RegIndex _op1,
208 RegIndex rn, RegIndex vd, RegIndex rm, uint8_t eSize,
220 RegIndex rn, RegIndex vd, RegIndex rm, uint8_t eSize,
232 RegIndex rn, RegIndex vd, RegIndex rm, uint8_t eSize,
244 RegIndex rn, RegIndex vd, RegIndex rm, uint8_t eSize,
276 RegIndex ura, urb;
279 RegIndex _ura, RegIndex _urb)
295 RegIndex ura, urb;
299 RegIndex _ura, RegIndex _urb, int32_t _imm)
312 RegIndex ura, urb;
316 RegIndex _ura, RegIndex _urb, int64_t _imm)
332 RegIndex ura, urb, urc;
335 RegIndex _ura, RegIndex _urb, RegIndex _urc)
348 RegIndex ura, urb, urc;
353 RegIndex _ura, RegIndex _urb, RegIndex _urc,
371 RegIndex ura, urb, urc;
376 RegIndex _ura, RegIndex _urb, RegIndex _urc,
395 RegIndex _ura, RegIndex _urb, bool _up, uint8_t _imm)
408 RegIndex dest, dest2, urb;
414 RegIndex _dreg1, RegIndex _dreg2, RegIndex _base,
499 unsigned elems, RegIndex rn, RegIndex vd, unsigned regs,
500 unsigned inc, uint32_t size, uint32_t align, RegIndex rm);
507 bool all, unsigned elems, RegIndex rn, RegIndex vd,
509 uint32_t align, RegIndex rm, unsigned lane);
519 unsigned width, RegIndex rn, RegIndex vd, unsigned regs,
520 unsigned inc, uint32_t size, uint32_t align, RegIndex rm);
527 bool all, unsigned elems, RegIndex rn, RegIndex vd,
529 uint32_t align, RegIndex rm, unsigned lane);
539 IntRegIndex rn, RegIndex vd, bool single, bool up,