Lines Matching defs:FP16_MANT_BITS
83 #define FP16_MANT_BITS (FP16_BITS - FP16_EXP_BITS - 1)
87 #define FP16_EXP(x) ((x) >> FP16_MANT_BITS & ((1ULL << FP16_EXP_BITS) - 1))
91 #define FP16_MANT(x) ((x) & ((1ULL << FP16_MANT_BITS) - 1))
302 return sgn << (FP16_BITS - 1) | exp << FP16_MANT_BITS | FP16_MANT(mnt);
374 return fp16_pack(0, FP16_EXP_INF, 1ULL << (FP16_MANT_BITS - 1));
399 *mnt |= 1ULL << FP16_MANT_BITS;
469 return fp16_is_NaN(exp, mnt) && !(mnt >> (FP16_MANT_BITS - 1) & 1);
487 return exp == FP16_EXP_INF && (mnt >> (FP16_MANT_BITS - 1) & 1);
523 if (!(a >> (FP16_MANT_BITS - 1) & 1)) {
525 a |= 1ULL << (FP16_MANT_BITS - 1);
710 uint16_t int_mant; // mantissa for result, less than (2 << FP16_MANT_BITS)
722 mnt = (4ULL << FP16_MANT_BITS | mnt >> (FP16_EXP_BITS - 1) |
744 if (int_mant == 1ULL << FP16_MANT_BITS) {
748 if (int_mant == 2ULL << FP16_MANT_BITS) {
1543 x_mnt = (uint32_t)a_mnt << (FP16_MANT_BITS + 4);
1792 x_mnt = ((uint32_t)a_mnt << (FP16_MANT_BITS - FP16_EXP_BITS + 3)) / b_mnt;
1794 (uint32_t)a_mnt << (FP16_MANT_BITS - FP16_EXP_BITS + 3));
2513 1ULL << (FP16_MANT_BITS - 1) |
2514 op >> (FP32_MANT_BITS - FP16_MANT_BITS));
2521 1ULL << (FP16_MANT_BITS - 1) |
2522 op >> (FP64_MANT_BITS - FP16_MANT_BITS));
2530 (uint32_t)op << (FP32_MANT_BITS - FP16_MANT_BITS));
2546 (uint64_t)op << (FP64_MANT_BITS - FP16_MANT_BITS));
2560 return fp16_pack(sgn, FP16_EXP_BIAS, 1ULL << (FP16_MANT_BITS - 1));
2578 return fp16_pack(sgn, FP16_EXP_BIAS + 1, 1ULL << (FP16_MANT_BITS - 1));
2728 if (!(mnt >> (FP16_MANT_BITS - 1) & 1)) {
2805 if (!(mnt >> (FP16_MANT_BITS - 1) & 1)) {
2960 return ((((op >> 5) & ((1 << FP16_EXP_BITS) - 1)) << FP16_MANT_BITS) |
3115 return fp16_pack(sgn, mnt >> FP16_MANT_BITS ? exp : 0, mnt);
3134 if (!((uint16_t)~(*op1 << 1) >> FP16_MANT_BITS) &&
3135 (uint16_t)~(*op2 << 1) >> FP16_MANT_BITS)
3137 if (!((uint16_t)~(*op2 << 1) >> FP16_MANT_BITS) &&
3138 (uint16_t)~(*op1 << 1) >> FP16_MANT_BITS)
3542 mnt << (FP16_MANT_BITS - 8));
3728 } else if (!((uint16_t)(op << 1) >> (FP16_MANT_BITS - 1))) {
3757 fraction <<= FP16_MANT_BITS - 8;
4071 int expint = FP16_EXP_BIAS + FP16_MANT_BITS;
4517 (uint16_t)FP16_EXP_BIAS << FP16_MANT_BITS; // 1.0
4643 (uint64_t)mnt << (FP64_MANT_BITS - FP16_MANT_BITS),
4675 (uint64_t)mnt << (FP64_MANT_BITS - FP16_MANT_BITS),
4763 (uint64_t)mnt << (FP64_MANT_BITS - FP16_MANT_BITS),