arch/arm/faults.cc

500     CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR);
501     saved_cpsr.nz = tc->readCCReg(CCREG_NZ);
502     saved_cpsr.c = tc->readCCReg(CCREG_C);
503     saved_cpsr.v = tc->readCCReg(CCREG_V);
504     saved_cpsr.ge = tc->readCCReg(CCREG_GE);
508     saved_cpsr.it2 = it.top6;
509     saved_cpsr.it1 = it.bottom2;
517     if (have_security && saved_cpsr.mode == MODE_MON) {
554     cpsr.pan = span ? 1 : saved_cpsr.pan;
565                 (saved_cpsr.t ? thumbPcOffset(true)  : armPcOffset(true)));
568                 (saved_cpsr.t ? thumbPcOffset(false) : armPcOffset(false)));
573         tc->setMiscReg(MISCREG_SPSR_FIQ, saved_cpsr);
576         tc->setMiscReg(MISCREG_SPSR_IRQ, saved_cpsr);
579         tc->setMiscReg(MISCREG_SPSR_SVC, saved_cpsr);
583         tc->setMiscReg(MISCREG_SPSR_MON, saved_cpsr);
586         tc->setMiscReg(MISCREG_SPSR_ABT, saved_cpsr);
589         tc->setMiscReg(MISCREG_SPSR_UND, saved_cpsr);
595         tc->setMiscReg(MISCREG_SPSR_HYP, saved_cpsr);