ext/mcpat/memoryctrl.cc

55  * based on Niagara processor designs and curving and low power MC based on data points in
68  * DDRC 1600A and DDRC 800A). Thus,to some extend the area and power difference between DesignWare
70  * frontend power and area, which is very close the analitically modeled results of the frontend for Niagara2@65nm
80     // Set up stats for the power calculations
123             //C_MCB = 1.6/200/1e6/144/1.2/1.2*g_ip.F_sz_um/0.19;//Based on Niagara power numbers.The base power (W) is divided by device frequency and vdd and scale to target process.
128             power.readOp.dynamic = C_MCB * g_tp.peri_global.Vdd *
131             power.readOp.leakage = area_um2 / 2 *
135             power.readOp.gate_leakage = area_um2 / 2 *
151             power.readOp.dynamic = backend_dyn;
152             power.readOp.leakage = (backend_gates) *
155             power.readOp.gate_leakage = (backend_gates) *
164         power.readOp.leakage = area_um2 / 2 *
168         power.readOp.gate_leakage = area_um2 / 2 *
172         power.readOp.dynamic *= 1.2;
173         power.readOp.leakage *= 1.2;
174         power.readOp.gate_leakage *= 1.2;
175         //flash controller has about 20% more backend power since BCH ECC in
176         //flash is complex and power hungry
180   power.readOp.longer_channel_leakage = power.readOp.leakage *
183   // Output leakage power calculations
185       longer_channel_device ? power.readOp.longer_channel_leakage :
186       power.readOp.leakage;
187   output_data.gate_leakage_power = power.readOp.gate_leakage;
189   // Peak dynamic power calculation
190   output_data.peak_dynamic_power = power.readOp.dynamic *
195       power.readOp.dynamic *
198       // Original McPAT code: Assume 10% of peak power is consumed by routine
200       power.readOp.dynamic * 0.1 * execution_time;
209     // Set up stats for the power calculations
259             //This is power not energy, 10mw/Gb/s @90nm for each channel and scaling down
260             //power.readOp.dynamic = 0.02*memAccesses*llcBlocksize*8;//change from Bytes to bits.
261             power.readOp.dynamic = power_per_gb_per_s *
264             power.readOp.leakage = area_um2 / 2 *
268             power.readOp.gate_leakage = area_um2 / 2 *
275             //This is power not energy, 10mw/Gb/s @90nm for each channel and scaling down
276             power.readOp.dynamic = power_per_gb_per_s * (l_ip.F_sz_um / 0.09) *
278             power.readOp.leakage = (mcp.withPHY ? phy_gates : 0) *
281             power.readOp.gate_leakage = (mcp.withPHY ? phy_gates : 0) *
287 //  double phy_factor = (int)ceil(mcp.dataBusWidth/72.0);//Previous phy power numbers are based on 72 bit DIMM interface
294     power.readOp.longer_channel_leakage =
295         power.readOp.leakage * long_channel_device_reduction;
297     // Leakage power calculations
299         longer_channel_device ? power.readOp.longer_channel_leakage :
300         power.readOp.leakage;
301     output_data.gate_leakage_power = power.readOp.gate_leakage;
303     // Peak dynamic power calculation
305     output_data.peak_dynamic_power = power.readOp.dynamic *
311         power.readOp.dynamic *
314         // Original McPAT code: Assume 10% of peak power is consumed by routine
316         power.readOp.dynamic * 0.1 * execution_time;
373     // TODO: These stats assume that access power is calculated per buffer