mcpat/cacti/uca.cc

237     power_routing_to_bank.readOp.dynamic  = htree_in_add->power.readOp.dynamic + htree_out_data->power.readOp.dynamic;
238     power_routing_to_bank.writeOp.dynamic = htree_in_add->power.readOp.dynamic + htree_in_data->power.readOp.dynamic;
244     power_routing_to_bank.readOp.leakage +=
245         htree_in_add->power.readOp.leakage +
246         htree_in_data->power.readOp.leakage +
247         htree_out_data->power.readOp.leakage;
249     power_routing_to_bank.readOp.gate_leakage +=
250         htree_in_add->power.readOp.gate_leakage +
251         htree_in_data->power.readOp.gate_leakage +
252         htree_out_data->power.readOp.gate_leakage;
254         power_routing_to_bank.readOp.leakage += htree_in_search->power.readOp.leakage + htree_out_search->power.readOp.leakage;
255         power_routing_to_bank.readOp.gate_leakage += htree_in_search->power.readOp.gate_leakage + htree_out_search->power.readOp.gate_leakage;
259     power.readOp.dynamic += power_routing_to_bank.readOp.dynamic;
260     power.readOp.leakage += power_routing_to_bank.readOp.leakage;
261     power.readOp.gate_leakage += power_routing_to_bank.readOp.gate_leakage;
264     power.writeOp.dynamic = power.readOp.dynamic
265                             - bank.mat.power_bitline.readOp.dynamic * dp.num_act_mats_hor_dir
267                             - power_routing_to_bank.readOp.dynamic
269                             + bank.htree_in_data->power.readOp.dynamic
270                             - bank.htree_out_data->power.readOp.dynamic;
273         power.writeOp.dynamic -= bank.mat.power_sa.readOp.dynamic * dp.num_act_mats_hor_dir;
276     dyn_read_energy_from_closed_page = power.readOp.dynamic;
277     dyn_read_energy_from_open_page   = power.readOp.dynamic -
278                                        (bank.mat.r_predec->power.readOp.dynamic +
279                                         bank.mat.power_row_decoders.readOp.dynamic +
280                                         bank.mat.power_bl_precharge_eq_drv.readOp.dynamic +
281                                         bank.mat.power_sa.readOp.dynamic +
282                                         bank.mat.power_bitline.readOp.dynamic) * dp.num_act_mats_hor_dir;
286         ((bank.mat.sa_mux_lev_1_predec->power.readOp.dynamic +
287           bank.mat.sa_mux_lev_2_predec->power.readOp.dynamic +
288           bank.mat.power_sa_mux_lev_1_decoders.readOp.dynamic +
289           bank.mat.power_sa_mux_lev_2_decoders.readOp.dynamic +
290           bank.mat.power_subarray_out_drv.readOp.dynamic)     * dp.num_act_mats_hor_dir +
291          bank.htree_out_data->power.readOp.dynamic +
292          power_routing_to_bank.readOp.dynamic);
296     activate_energy = htree_in_add->power.readOp.dynamic +
297                       bank.htree_in_add->power_bit.readOp.dynamic * bank.num_addr_b_routed_to_mat_for_act +
298                       (bank.mat.r_predec->power.readOp.dynamic +
299                        bank.mat.power_row_decoders.readOp.dynamic +
300                        bank.mat.power_sa.readOp.dynamic) * dp.num_act_mats_hor_dir;
301     read_energy    = (htree_in_add->power.readOp.dynamic +
302                       bank.htree_in_add->power_bit.readOp.dynamic * bank.num_addr_b_routed_to_mat_for_rd_or_wr +
303                       (bank.mat.sa_mux_lev_1_predec->power.readOp.dynamic  +
304                        bank.mat.sa_mux_lev_2_predec->power.readOp.dynamic  +
305                        bank.mat.power_sa_mux_lev_1_decoders.readOp.dynamic +
306                        bank.mat.power_sa_mux_lev_2_decoders.readOp.dynamic +
307                        bank.mat.power_subarray_out_drv.readOp.dynamic) * dp.num_act_mats_hor_dir +
308                       bank.htree_out_data->power.readOp.dynamic +
309                       htree_in_data->power.readOp.dynamic) * g_ip->burst_len;
310     write_energy   = (htree_in_add->power.readOp.dynamic +
311                       bank.htree_in_add->power_bit.readOp.dynamic * bank.num_addr_b_routed_to_mat_for_rd_or_wr +
312                       htree_in_data->power.readOp.dynamic +
313                       bank.htree_in_data->power.readOp.dynamic +
314                       (bank.mat.sa_mux_lev_1_predec->power.readOp.dynamic  +
315                        bank.mat.sa_mux_lev_2_predec->power.readOp.dynamic  +
316                        bank.mat.power_sa_mux_lev_1_decoders.readOp.dynamic +
317                        bank.mat.power_sa_mux_lev_2_decoders.readOp.dynamic) * dp.num_act_mats_hor_dir) * g_ip->burst_len;
318     precharge_energy = (bank.mat.power_bitline.readOp.dynamic +
319                         bank.mat.power_bl_precharge_eq_drv.readOp.dynamic) * dp.num_act_mats_hor_dir;
322         (bank.mat.r_predec->power.readOp.leakage +
323          bank.mat.b_mux_predec->power.readOp.leakage +
324          bank.mat.sa_mux_lev_1_predec->power.readOp.leakage +
325          bank.mat.sa_mux_lev_2_predec->power.readOp.leakage +
326          bank.mat.power_row_decoders.readOp.leakage +
327          bank.mat.power_bit_mux_decoders.readOp.leakage +
328          bank.mat.power_sa_mux_lev_1_decoders.readOp.leakage +
329          bank.mat.power_sa_mux_lev_2_decoders.readOp.leakage +
333         (bank.mat.r_predec->power.readOp.gate_leakage +
334          bank.mat.b_mux_predec->power.readOp.gate_leakage +
335          bank.mat.sa_mux_lev_1_predec->power.readOp.gate_leakage +
336          bank.mat.sa_mux_lev_2_predec->power.readOp.gate_leakage +
337          bank.mat.power_row_decoders.readOp.gate_leakage +
338          bank.mat.power_bit_mux_decoders.readOp.gate_leakage +
339          bank.mat.power_sa_mux_lev_1_decoders.readOp.gate_leakage +
340          bank.mat.power_sa_mux_lev_2_decoders.readOp.gate_leakage) * dp.num_act_mats_hor_dir; //+
344         (bank.mat.r_predec->power.readOp.leakage +
345          bank.mat.b_mux_predec->power.readOp.leakage +
346          bank.mat.sa_mux_lev_1_predec->power.readOp.leakage +
347          bank.mat.sa_mux_lev_2_predec->power.readOp.leakage +
348          bank.mat.power_row_decoders.readOp.leakage +
349          bank.mat.power_bit_mux_decoders.readOp.leakage +
350          bank.mat.power_sa_mux_lev_1_decoders.readOp.leakage +
351          bank.mat.power_sa_mux_lev_2_decoders.readOp.leakage +
355         (bank.mat.r_predec->power.readOp.gate_leakage +
356          bank.mat.b_mux_predec->power.readOp.gate_leakage +
357          bank.mat.sa_mux_lev_1_predec->power.readOp.gate_leakage +
358          bank.mat.sa_mux_lev_2_predec->power.readOp.gate_leakage +
359          bank.mat.power_row_decoders.readOp.gate_leakage +
360          bank.mat.power_bit_mux_decoders.readOp.gate_leakage +
361          bank.mat.power_sa_mux_lev_1_decoders.readOp.gate_leakage +
362          bank.mat.power_sa_mux_lev_2_decoders.readOp.gate_leakage ) * dp.num_act_mats_hor_dir;
366         power_routing_to_bank.readOp.leakage +
367         bank.htree_in_add->power.readOp.leakage +
368         bank.htree_in_data->power.readOp.leakage +
369         bank.htree_out_data->power.readOp.leakage;
372         power_routing_to_bank.readOp.gate_leakage +
373         bank.htree_in_add->power.readOp.gate_leakage +
374         bank.htree_in_data->power.readOp.gate_leakage +
375         bank.htree_out_data->power.readOp.gate_leakage;
378         leak_power_request_and_reply_networks += htree_in_search->power.readOp.leakage + htree_out_search->power.readOp.leakage;
379         leak_power_request_and_reply_networks += htree_in_search->power.readOp.gate_leakage + htree_out_search->power.readOp.gate_leakage;
386         refresh_power  = (bank.mat.r_predec->power.readOp.dynamic * dp.num_act_mats_hor_dir +
387                           bank.mat.row_dec->power.readOp.dynamic) * dp.num_r_subarray * dp.num_subarrays;
389         refresh_power += bank.mat.power_bl_precharge_eq_drv.readOp.dynamic * dp.num_act_mats_hor_dir;
390         refresh_power += bank.mat.power_sa.readOp.dynamic * dp.num_act_mats_hor_dir;
396         power.readOp.dynamic  = dyn_read_energy_from_closed_page;
399                                 - bank.mat.power_bitline.readOp.dynamic * dp.num_act_mats_hor_dir
402                                    power_routing_to_bank.readOp.dynamic -
403                                    bank.htree_out_data->power.readOp.dynamic +
404                                    bank.htree_in_data->power.readOp.dynamic) *
408             power.writeOp.dynamic -= bank.mat.power_sa.readOp.dynamic * dp.num_act_mats_hor_dir;
414         power.readOp.leakage += refresh_power;
420       power.readOp.leakage += MAIN_MEM_PER_CHIP_STANDBY_CURRENT_mA * 1e-3 * g_tp.peri_global.Vdd / g_ip->nbanks;
423     assert(power.readOp.dynamic  > 0);
425     assert(power.readOp.leakage  > 0);