Lines Matching refs:delay
42 #define LATCH_DELAY 28e-12 /* latch delay in s (later should use FO4 TODO) */
107 //TODO: convert latch delay to FO4 */
260 /* find delay, area, and power for wires */
266 calc_cycles(wire_horizontal[wr]->delay,
270 calc_cycles(wire_vertical[wr]->delay,
315 curr_acclat = 2 * avg_lat + 2 * (router_s[ro]->delay *
334 wire_horizontal[wr]->delay) * flit_width +
336 wire_horizontal[wr]->delay);
359 /* network delay/power */
363 /* bank delay/power */
365 nuca_list.back()->bank_pda.delay = ures.access_time;
371 num_cyc = calc_cycles(nuca_list.back()->bank_pda.delay /*s*/,
379 nuca_list.back()->nuca_pda.delay = opt_acclat +
384 nuca_list.back()->nuca_pda.delay = opt_acclat +
452 "possible delay\n");
455 "5%% delay penalty\n");
458 "10%% delay penalty\n");
461 "20%% delay penalty\n");
464 "30%% delay penalty\n");
469 printf("\tHorizontal link delay - %g (ns)\n",
470 fr->h_wire->delay*1e9);
471 printf("\tVertical link delay - %g (ns)\n",
472 fr->v_wire->delay*1e9);
474 fr->h_wire->delay*1e9 / fr->bank_pda.area.w);
513 (*niter)->nuca_pda.delay,
522 cost = ((*niter)->nuca_pda.delay / minval->min_delay) *
529 cost = ((*niter)->nuca_pda.delay / minval->min_delay) *
530 ((*niter)->nuca_pda.delay / minval->min_delay) *
545 cost = (d * ((*niter)->nuca_pda.delay / minval->min_delay) +
571 if (((n->nuca_pda.delay - minval->min_delay)*100 / minval->min_delay) >