Lines Matching refs:NCH
488 rd = tr_R_on(ml_to_ram_wl_drv->width_n[k], NCH, 1, is_dram, false, true);
491 drain_C_(ml_to_ram_wl_drv->width_n[k], NCH, 1, 1, 4 * cell.h,
539 double rd = tr_R_on(row_dec->w_dec_n[k], NCH, 1, is_dram, false, true);
543 drain_C_(row_dec->w_dec_n[k], NCH, 1, 1, 4 * cell.h, is_dram,
819 rd = tr_R_on(Wdummyn, NCH, 2, is_dram);
821 (2 * drain_C_(Wdummyn, NCH, 2, 1, g_tp.cell_h_def,
850 rd = tr_R_on(Waddrnandn, NCH, 2, is_dram);
851 c_intrinsic = drain_C_(Waddrnandn, NCH, 2, 1, g_tp.cell_h_def, is_dram) +
864 rd = tr_R_on(Wdummyinvn, NCH, 1, is_dram);
865 c_intrinsic = drain_C_(Wdummyinvn, NCH, 1, 1, g_tp.cell_h_def, is_dram) + drain_C_(Wdummyinvp, NCH, 1, 1, g_tp.cell_h_def, is_dram);
894 rd = tr_R_on(Wfanorn, NCH, 1, is_dram);
895 c_intrinsic = 2 * drain_C_(Wfanorn, NCH, 1, 1, g_tp.cell_h_def, is_dram) +
896 drain_C_(Wfanorp, NCH, 1, 1, g_tp.cell_h_def, is_dram);
912 drain_C_(W_hit_miss_p, NCH, 2, 1, g_tp.cell_h_def, is_dram);
915 c_gate_load = drain_C_(W_hit_miss_n, NCH, 1, 1, g_tp.cell_h_def, is_dram) *
928 drain_C_(W_hit_miss_n, NCH, 2, 1, g_tp.cell_h_def, is_dram);
931 c_gate_load = drain_C_(W_hit_miss_n, NCH, 1, 1, g_tp.cell_h_def, is_dram) *
1022 double R_sram_cell_pull_up_tr = tr_R_on(g_tp.sram.cell_pmos_w, NCH, 1, is_dram, true);
1023 double R_access_tr = tr_R_on(g_tp.sram.cell_a_w, NCH, 1, is_dram, true);
1025 double width_write_driver_nmos = R_to_w(target_R_write_driver_and_mux, NCH, is_dram);
1068 R_cell_acc = tr_R_on(g_tp.dram.cell_a_w, NCH, 1, true, true);
1074 R_cell_pull_down = tr_R_on(g_tp.sram.cell_nmos_w, NCH, 1, false, true);
1075 R_cell_acc = tr_R_on(g_tp.sram.cell_a_w, NCH, 1, false, true);
1104 double C_drain_bit_mux = drain_C_(g_tp.w_nmos_b_mux, NCH, 1, 0,
1107 double R_bit_mux = tr_R_on(g_tp.w_nmos_b_mux, NCH, 1, is_dram);
1115 drain_C_(g_tp.w_sense_n, NCH, 1, 0, camFlag ? cam_cell.w :
1119 double C_drain_sense_amp_mux = drain_C_(g_tp.w_nmos_sa_mux, NCH, 1, 0,
1243 drain_C_(g_tp.w_sense_n, NCH, 1, 0,
1252 drain_C_(g_tp.w_nmos_sa_mux, NCH, 1, 0, camFlag ?
1272 rd = tr_R_on(g_tp.w_nmos_sa_mux, NCH, 1, is_dram);
1273 C_ld = dp.Ndsam_lev_1 * drain_C_(g_tp.w_nmos_sa_mux, NCH, 1, 0,
1288 rd = tr_R_on(g_tp.min_w_nmos_, NCH, 1, is_dram);
1289 C_ld = drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def, is_dram) +
1305 rd = tr_R_on(g_tp.min_w_nmos_, NCH, 1, is_dram);
1306 C_ld = drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def, is_dram) +
1309 drain_C_(g_tp.w_nmos_sa_mux, NCH, 1, 0, camFlag ?
1326 rd = tr_R_on(g_tp.w_nmos_sa_mux, NCH, 1, is_dram);
1328 drain_C_(g_tp.w_nmos_sa_mux, NCH, 1, 0, camFlag ? cam_cell.w :
1360 drain_C_(g_tp.w_comp_inv_n1, NCH, 1, 1, g_tp.cell_h_def, is_dram);
1378 drain_C_(g_tp.w_comp_inv_n2, NCH, 1, 1, g_tp.cell_h_def, is_dram);
1379 Req = tr_R_on(g_tp.w_comp_inv_n2, NCH, 1, is_dram);
1392 drain_C_(g_tp.w_comp_inv_n3, NCH, 1, 1, g_tp.cell_h_def, is_dram);
1404 double r1 = tr_R_on(g_tp.w_comp_n, NCH, 2, is_dram);
1405 double r2 = tr_R_on(g_tp.w_eval_inv_n, NCH, 1, is_dram); /* was switch */
1406 double c2 = (tagbits_) * (drain_C_(g_tp.w_comp_n, NCH, 1, 1,
1408 drain_C_(g_tp.w_comp_n, NCH, 2, 1,
1411 drain_C_(g_tp.w_eval_inv_n, NCH, 1, 1, g_tp.cell_h_def, is_dram);
1412 double c1 = (tagbits_) * (drain_C_(g_tp.w_comp_n, NCH, 1, 1,
1414 drain_C_(g_tp.w_comp_n, NCH, 2, 1,