Lines Matching refs:ERP

78         ERP  = dp.num_rd_ports;
83 ERP = g_ip->num_rd_ports;
297 double area_row_decoder = row_dec->area.get_area() * subarray.num_rows * (RWP + ERP + EWP);
307 h_subarray_out_drv *= (RWP + ERP + SCHP);
317 h_comparators *= (RWP + ERP);
324 g_tp.wire_inside_mat.pitch * (RWP + ERP + EWP);
334 h_bit_mux_dec_out_wires = deg_bl_muxing * g_tp.wire_inside_mat.pitch * (RWP + ERP);
337 h_senseamp_mux_dec_out_wires = dp.Ndsam_lev_1 * g_tp.wire_inside_mat.pitch * (RWP + ERP);
340 h_senseamp_mux_dec_out_wires += dp.Ndsam_lev_2 * g_tp.wire_inside_mat.pitch * (RWP + ERP);
349 g_tp.wire_inside_mat.pitch * (RWP + ERP + EWP);
356 g_tp.wire_inside_mat.pitch * (RWP + ERP + EWP) +
390 sa_mux_lev_2_dec->area.get_area()) * (RWP + ERP + EWP);
603 cell.w / (2 * (RWP + ERP + SCHP))) +
607 cell.w / (RWP + ERP + SCHP));
613 cell.w / (2 * (RWP + ERP)));
614 // height += deg_bl_muxing * g_tp.wire_inside_mat.pitch * (RWP + ERP); // bit mux dec out wires height
617 height += height_sense_amplifier(/*camFlag? sram_cell.w:*/cell.w * deg_bl_muxing / (RWP + ERP)); // sense_amp_height
621 g_tp.w_nmos_sa_mux, cell.w * dp.Ndsam_lev_1 / (RWP + ERP)); // sense_amp_mux_height
622 //height_senseamp_mux_decode_output_wires = Ndsam * wire_inside_mat_pitch * (RWP + ERP);
627 g_tp.w_nmos_sa_mux, cell.w * deg_bl_muxing * dp.Ndsam_lev_1 / (RWP + ERP)); // sense_amp_mux_height
628 //height_senseamp_mux_decode_output_wires = Ndsam * wire_inside_mat_pitch * (RWP + ERP);
632 pmos_to_nmos_sz_ratio(is_dram) * g_tp.min_w_nmos_, cell.w * dp.Ndsam_lev_2 / (RWP + ERP));
633 height += 2 * compute_tr_width_after_folding(g_tp.min_w_nmos_, cell.w * dp.Ndsam_lev_2 / (RWP + ERP));
967 leak_power_RD_port_sram_cell * ERP +
1001 gate_leak_power_RD_port_sram_cell * ERP;
1106 (2 * (RWP + ERP + SCHP)), is_dram);
1111 (RWP + ERP + SCHP), is_dram);
1116 cell.w * deg_bl_muxing / (RWP + ERP + SCHP), is_dram) +
1118 cell.w * deg_bl_muxing / (RWP + ERP + SCHP), is_dram);
1122 (RWP + ERP + SCHP), is_dram);
1188 leak_power_RD_port_sram_cell * ERP;
1190 gate_leak_power_RD_port_sram_cell * ERP;
1245 (RWP + ERP + SCHP), is_dram) +
1247 cam_cell.w : cell.w * deg_bl_muxing / (RWP + ERP + SCHP),
1250 cam_cell.w : cell.w * deg_bl_muxing / (RWP + ERP + SCHP),
1253 cam_cell.w : cell.w * deg_bl_muxing / (RWP + ERP + SCHP),
1275 deg_bl_muxing / (RWP + ERP + SCHP),
1311 (RWP + ERP + SCHP), is_dram);
1329 cell.w * deg_bl_muxing * dp.Ndsam_lev_1 / (RWP + ERP + SCHP),
1646 (RWP + ERP);
1651 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP);
1659 power_comparator.readOp.leakage *= num_do_b_mat * (RWP + ERP);
1684 num_subarrays_per_mat * (RWP + ERP);
1689 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP);
1697 power_comparator.readOp.gate_leakage *= num_do_b_mat * (RWP + ERP);
1723 (RWP + ERP + SCHP);
1730 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP + SCHP);
1767 num_subarrays_per_mat * (RWP + ERP + SCHP);
1774 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP + SCHP);
1811 (RWP + ERP + SCHP);
1816 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP + SCHP);
1826 subarray.num_rows * num_subarrays_per_mat * (RWP + ERP + EWP);
1845 num_subarrays_per_mat * (RWP + ERP + SCHP);
1850 number_output_drivers_subarray * num_subarrays_per_mat * (RWP + ERP + SCHP);
1861 num_subarrays_per_mat * (RWP + ERP + EWP);