mcpat/cacti/htree2.cc

69     min_w_pmos = deviceType->n_to_p_eff_curr_drv_ratio * min_w_nmos;
116          2 * gate_C(s2 * (min_w_nmos + min_w_pmos), 0));
121         (2 * drain_C_(pton_size * nsize * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
123          + 2 * gate_C(s2 * (min_w_nmos + min_w_pmos), 0)) *
127         (2 * drain_C_(pton_size * nsize * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
129          + 2 * gate_C(s2 * (min_w_nmos + min_w_pmos), 0)) *
133                                                min_w_pmos * nsize * 2, 2,
137                                                   min_w_pmos * nsize * 2, 2,
150         (gate_C(s2 * (min_w_nmos + min_w_pmos), 0) + w1.wire_cap(l_eff * 1e-6,
152         gate_C(s2 * (min_w_nmos + min_w_pmos), 0);
153     double tr_size = gate_C(s1 * (min_w_nmos + min_w_pmos), 0) * 1 / 2 /
154         (s_eff * gate_C(min_w_pmos, 0));
157     double res_nor = 2 * tr_R_on(size * min_w_pmos, PCH, 1);
161         drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) * 2 +
162         gate_C(tr_size * min_w_pmos, 0);
164         (drain_C_(tr_size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
166         gate_C(s1 * (min_w_nmos + min_w_pmos), 0);
177         (2 * drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
179          gate_C(tr_size * (min_w_pmos), 0)) *
183         (2 * drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
185          gate_C(tr_size * (min_w_pmos), 0)) *
190         (drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
192          + gate_C(size * (min_w_nmos + min_w_pmos), 0)) *
196         (drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
198          + gate_C(size * (min_w_nmos + min_w_pmos), 0)) *
203         (drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
205          + gate_C(tr_size * (min_w_nmos + min_w_pmos), 0)) *
209         (drain_C_(size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
211          + gate_C(tr_size * (min_w_nmos + min_w_pmos), 0)) *
216         ((drain_C_(tr_size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
218          + gate_C(s1 * (min_w_nmos + min_w_pmos), 0)) *
222         ((drain_C_(tr_size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def)
224          + gate_C(s1 * (min_w_nmos + min_w_pmos), 0)) *
229             cmos_Isub_leakage(min_w_nmos * tr_size * 2, min_w_pmos * tr_size *
233             cmos_Isub_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
236             cmos_Isub_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
240             cmos_Ig_leakage(min_w_nmos * tr_size * 2, min_w_pmos * tr_size * 2,
244             cmos_Ig_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
247             cmos_Ig_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
251             cmos_Isub_leakage(min_w_nmos * tr_size * 2, min_w_pmos * tr_size *
255             cmos_Isub_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
258             cmos_Isub_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
262             cmos_Ig_leakage(min_w_nmos * tr_size * 2, min_w_pmos * tr_size * 2,
266             cmos_Ig_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,
269             cmos_Ig_leakage(min_w_nmos * size * 3, min_w_pmos * size * 3, 2,