Lines Matching refs:w_dec_p
66 w_dec_p[i] = 0;
114 w_dec_p[0] = p_to_n_sz_ratio * g_tp.min_w_nmos_;
118 w_dec_p[0] = p_to_n_sz_ratio * g_tp.min_w_nmos_;
123 gate_C(w_dec_p[0], 0, is_dram, false, is_wl_tr));
129 w_dec_p,
148 compute_gate_area(NAND, 2, w_dec_p[0], w_dec_n[0], area.h);
150 cmos_Isub_leakage(w_dec_n[0], w_dec_p[0], 2, nand, is_dram);
152 cmos_Ig_leakage(w_dec_n[0], w_dec_p[0], 2, nand, is_dram);
155 compute_gate_area(NAND, 3, w_dec_p[0], w_dec_n[0], area.h);
157 cmos_Isub_leakage(w_dec_n[0], w_dec_p[0], 3, nand, is_dram);;
159 cmos_Ig_leakage(w_dec_n[0], w_dec_p[0], 3, nand, is_dram);
164 compute_gate_area(INV, 1, w_dec_p[i], w_dec_n[i], area.h);
166 cmos_Isub_leakage(w_dec_n[i], w_dec_p[i], 1, inv, is_dram);
168 cmos_Ig_leakage(w_dec_n[i], w_dec_p[i], 1, inv, is_dram);
196 c_load = gate_C(w_dec_n[1] + w_dec_p[1], 0.0, is_dram, false, is_wl_tr);
197 c_intrinsic = drain_C_(w_dec_p[0], PCH, 1, 1, area.h, is_dram, false, is_wl_tr) * num_in_signals +
207 c_load = gate_C(w_dec_p[i+1] + w_dec_n[i+1], 0.0, is_dram, false, is_wl_tr);
208 c_intrinsic = drain_C_(w_dec_p[i], PCH, 1, 1, area.h, is_dram, false, is_wl_tr) +
221 c_intrinsic = drain_C_(w_dec_p[i], PCH, 1, 1, area.h, is_dram, false, is_wl_tr) +
244 cumulative_curr = cmos_Isub_leakage(w_dec_n[0], w_dec_p[0], 2, nand,is_dram);
245 cumulative_curr_Ig = cmos_Ig_leakage(w_dec_n[0], w_dec_p[0], 2, nand,is_dram);
249 cumulative_curr = cmos_Isub_leakage(w_dec_n[0], w_dec_p[0], 3, nand, is_dram);;
250 cumulative_curr_Ig = cmos_Ig_leakage(w_dec_n[0], w_dec_p[0], 3, nand, is_dram);
255 cumulative_curr += cmos_Isub_leakage(w_dec_n[i], w_dec_p[i], 1, inv, is_dram);
256 cumulative_curr_Ig = cmos_Ig_leakage(w_dec_n[i], w_dec_p[i], 1, inv, is_dram);
320 C_ld_dec_gate = num_dec_per_predec * gate_C(dec->w_dec_n[0] + dec->w_dec_p[0], 0, is_dram_, false, false);
329 C_ld_dec_gate = num_dec_per_predec * gate_C(dec->w_dec_n[0] + dec->w_dec_p[0], 0, is_dram_, false, false);
1006 c_load_nand2_path_out = gate_C(dec->w_dec_n[0] + dec->w_dec_p[0], 0, is_dram_);
1009 c_load_nand3_path_out = gate_C(dec->w_dec_n[0] + dec->w_dec_p[0], 0, is_dram_);