Lines Matching refs:power_nand3_path

292         power_nand3_path(),
645 power_nand3_path.readOp.leakage = leak_L1_nand3 * g_tp.peri_global.Vdd;
649 power_nand3_path.readOp.gate_leakage = gate_leak_L1_nand3 * g_tp.peri_global.Vdd;
735 power_nand3_path.readOp.dynamic += (c_intrinsic + c_load) * Vdd * Vdd;
747 power_nand3_path.readOp.dynamic += (c_intrinsic + c_load) * Vdd * Vdd;
763 power_nand3_path.readOp.dynamic += (c_intrinsic + c_load) * Vdd * Vdd;
772 power_nand3_path.readOp.dynamic += (c_intrinsic + c_load) * Vdd * Vdd;
959 power_nand3_path.readOp.leakage = leak_L1_nand3 * g_tp.peri_global.Vdd;
963 power_nand3_path.readOp.gate_leakage = gate_leak_L1_nand3 * g_tp.peri_global.Vdd;
989 power_nand3_path(),
1173 power_nand3_path.readOp.leakage = leak_nand3_path * g_tp.peri_global.Vdd;
1175 power_nand3_path.readOp.gate_leakage = gate_leak_nand3_path * g_tp.peri_global.Vdd;
1229 power_nand3_path.readOp.dynamic += (c_gate_load + c_intrinsic) * 0.5 * Vdd * Vdd;
1243 power_nand3_path.readOp.dynamic += (c_intrinsic + c_load) * 0.5 * Vdd * Vdd;
1252 num_addr_bits_nand3_path()*power_nand3_path.readOp.dynamic) * num_act_mats_hor_dir;
1262 drv1->power_nand3_path.readOp.leakage +
1264 drv2->power_nand3_path.readOp.leakage;
1266 blk1->power_nand3_path.readOp.leakage +
1269 blk2->power_nand3_path.readOp.leakage +
1274 drv1->power_nand3_path.readOp.gate_leakage +
1276 drv2->power_nand3_path.readOp.gate_leakage;
1278 blk1->power_nand3_path.readOp.gate_leakage +
1281 blk2->power_nand3_path.readOp.gate_leakage +
1316 power_nand3_path.readOp.leakage = leak_nand3_path * g_tp.peri_global.Vdd;
1318 power_nand3_path.readOp.gate_leakage = gate_leak_nand3_path * g_tp.peri_global.Vdd;
1333 drv1->num_addr_bits_nand3_path() * drv1->power_nand3_path.readOp.dynamic +
1335 drv2->num_addr_bits_nand3_path() * drv2->power_nand3_path.readOp.dynamic;
1339 blk1->power_nand3_path.readOp.dynamic * blk1->num_L1_active_nand3_path +
1342 blk2->power_nand3_path.readOp.dynamic * blk1->num_L1_active_nand3_path +
1359 drv1->power_nand3_path.readOp.leakage +
1361 drv2->power_nand3_path.readOp.leakage;
1363 blk1->power_nand3_path.readOp.leakage +
1366 blk2->power_nand3_path.readOp.leakage +
1371 drv1->power_nand3_path.readOp.gate_leakage +
1373 drv2->power_nand3_path.readOp.gate_leakage;
1375 blk1->power_nand3_path.readOp.gate_leakage +
1378 blk2->power_nand3_path.readOp.gate_leakage +