Lines Matching refs:self
89 def __init__(self, args, **kwargs):
90 super(SimpleSeSystem, self).__init__(**kwargs)
94 self._clusters = []
95 self._num_cpus = 0
98 self.voltage_domain = VoltageDomain(voltage="3.3V")
99 self.clk_domain = SrcClockDomain(clock="1GHz",
100 voltage_domain=self.voltage_domain)
103 self.membus = SystemXBar()
107 self.system_port = self.membus.slave
112 self.cpu_cluster = devices.CpuCluster(self,
120 if self.cpu_cluster.memoryMode() == "timing":
121 self.cpu_cluster.addL1()
122 self.cpu_cluster.addL2(self.cpu_cluster.clk_domain)
123 self.cpu_cluster.connectMemSide(self.membus)
127 self.mem_mode = self.cpu_cluster.memoryMode()
129 def numCpuClusters(self):
130 return len(self._clusters)
132 def addCpuCluster(self, cpu_cluster, num_cpus):
133 assert cpu_cluster not in self._clusters
135 self._clusters.append(cpu_cluster)
136 self._num_cpus += num_cpus
138 def numCpus(self):
139 return self._num_cpus