Lines Matching refs:self
67 def childImage(self, ci):
68 self.image.child.image_file = ci
88 self = LinuxAlphaSystem()
92 self.readfile = mdesc.script()
94 self.tsunami = BaseTsunami()
97 self.iobus = IOXBar()
98 self.tsunami.attachIO(self.iobus)
100 self.tsunami.ide.pio = self.iobus.master
102 self.tsunami.ethernet.pio = self.iobus.master
107 self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
109 self.membus = MemBus()
114 self.bridge = Bridge(delay='50ns',
116 self.bridge.master = self.iobus.slave
117 self.bridge.slave = self.membus.master
119 self.tsunami.ide.dma = self.iobus.slave
120 self.tsunami.ethernet.dma = self.iobus.slave
122 self.system_port = self.membus.slave
124 self.mem_ranges = [AddrRange(mdesc.mem())]
125 self.disk0 = CowIdeDisk(driveID='master')
126 self.disk2 = CowIdeDisk(driveID='master')
127 self.disk0.childImage(mdesc.disk())
128 self.disk2.childImage(disk('linux-bigswap2.img'))
129 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
131 self.intrctrl = IntrControl()
132 self.mem_mode = mem_mode
133 self.terminal = Terminal()
134 self.pal = binary('ts_osfpal')
135 self.console = binary('console')
138 self.boot_osflags = fillInCmdline(mdesc, cmdline)
140 return self
151 def childImage(self, ci):
152 self.image.child.image_file = ci
154 self = SparcSystem()
158 self.readfile = mdesc.script()
159 self.iobus = IOXBar()
160 self.membus = MemBus()
161 self.bridge = Bridge(delay='50ns')
162 self.t1000 = T1000()
163 self.t1000.attachOnChipIO(self.membus)
164 self.t1000.attachIO(self.iobus)
165 self.mem_ranges = [AddrRange(Addr('1MB'), size = '64MB'),
167 self.bridge.master = self.iobus.slave
168 self.bridge.slave = self.membus.master
169 self.rom.port = self.membus.master
170 self.nvram.port = self.membus.master
171 self.hypervisor_desc.port = self.membus.master
172 self.partition_desc.port = self.membus.master
173 self.intrctrl = IntrControl()
174 self.disk0 = CowMmDisk()
175 self.disk0.childImage(mdesc.disk())
176 self.disk0.pio = self.iobus.master
181 self.bridge.ranges = \
183 AddrRange(self.t1000.puart0.pio_addr,
184 self.t1000.puart0.pio_addr + uart_pio_size - 1),
185 AddrRange(self.disk0.pio_addr,
186 self.t1000.fake_jbi.pio_addr +
187 self.t1000.fake_jbi.pio_size - 1),
188 AddrRange(self.t1000.fake_clk.pio_addr,
190 AddrRange(self.t1000.fake_l2_1.pio_addr,
191 self.t1000.fake_ssi.pio_addr +
192 self.t1000.fake_ssi.pio_size - 1),
193 AddrRange(self.t1000.hvuart.pio_addr,
194 self.t1000.hvuart.pio_addr + uart_pio_size - 1)
196 self.reset_bin = binary('reset_new.bin')
197 self.hypervisor_bin = binary('q_new.bin')
198 self.openboot_bin = binary('openboot_new.bin')
199 self.nvram_bin = binary('nvram1')
200 self.hypervisor_desc_bin = binary('1up-hv.bin')
201 self.partition_desc_bin = binary('1up-md.bin')
203 self.system_port = self.membus.slave
205 return self
215 self = ArmSystem()
217 self = LinuxArmSystem()
223 self.readfile = mdesc.script()
224 self.iobus = IOXBar()
226 self.bridge = Bridge(delay='50ns')
227 self.bridge.master = self.iobus.slave
228 self.membus = MemBus()
229 self.membus.badaddr_responder.warn_access = "warn"
230 self.bridge.slave = self.membus.master
232 self.mem_mode = mem_mode
238 self.realview = platform_class()
240 if isinstance(self.realview, VExpress_EMM64):
248 self.realview.attachPciDevices()
250 self.cf0 = CowIdeDisk(driveID='master')
251 self.cf0.childImage(mdesc.disk())
255 if hasattr(self.realview, "ide"):
256 self.realview.ide.disks = [self.cf0]
257 elif hasattr(self.realview, "cf_ctrl"):
258 self.realview.cf_ctrl.disks = [self.cf0]
260 self.pci_ide = IdeController(disks=[self.cf0])
261 pci_devices.append(self.pci_ide)
263 self.mem_ranges = []
265 for region in self.realview._mem_regions:
267 self.mem_ranges.append(region)
270 self.mem_ranges.append(AddrRange(region.start, size=size_remain))
281 self.have_security = security
285 self.realview.uart[0].end_on_eot = True
288 self.dtb_filename = binary(dtb_filename)
290 self.machine_type = machine_type if machine_type in ArmMachineType.map \
305 self.realview.setupBootLoader(self.iobus, self, binary)
307 self.realview.setupBootLoader(None, self, binary)
309 self.realview.setupBootLoader(self.membus, self, binary)
311 if hasattr(self.realview.gic, 'cpu_addr'):
312 self.gic_cpu_addr = self.realview.gic.cpu_addr
314 self.flags_addr = self.realview.realview_io.pio_addr + 0x30
346 self.boot_osflags = fillInCmdline(mdesc, cmdline)
350 self.external_io = ExternalMaster(port_data="external_io",
352 self.external_io.port = self.iobus.slave
355 self.iocache = ExternalSlave(port_data="iocache",
357 addr_ranges=self.mem_ranges)
358 self.iocache.port = self.iobus.master
361 self.bridge.ranges = [self.realview.nvmem.range]
363 self.realview.attachOnChipIO(self.iobus)
365 self.realview.attachIO(self.iobus)
367 self._dma_ports = [ ]
368 self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports)
369 self.realview.attachIO(self.iobus, dma_ports=self._dma_ports)
371 self.realview.attachOnChipIO(self.membus, self.bridge)
373 self.realview.attachIO(self.iobus)
377 self.realview.attachPciDevice(
378 dev, self.iobus,
379 dma_ports=self._dma_ports if ruby else None)
381 self.intrctrl = IntrControl()
382 self.terminal = Terminal()
383 self.vncserver = VncServer()
386 self.system_port = self.membus.slave
396 return self
405 self = LinuxMipsSystem()
409 self.readfile = mdesc.script()
410 self.iobus = IOXBar()
411 self.membus = MemBus()
412 self.bridge = Bridge(delay='50ns')
413 self.mem_ranges = [AddrRange('1GB')]
414 self.bridge.master = self.iobus.slave
415 self.bridge.slave = self.membus.master
416 self.disk0 = CowIdeDisk(driveID='master')
417 self.disk2 = CowIdeDisk(driveID='master')
418 self.disk0.childImage(mdesc.disk())
419 self.disk2.childImage(disk('linux-bigswap2.img'))
420 self.malta = BaseMalta()
421 self.malta.attachIO(self.iobus)
422 self.malta.ide.pio = self.iobus.master
423 self.malta.ide.dma = self.iobus.slave
424 self.malta.ethernet.pio = self.iobus.master
425 self.malta.ethernet.dma = self.iobus.slave
426 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
428 self.intrctrl = IntrControl()
429 self.mem_mode = mem_mode
430 self.terminal = Terminal()
431 self.console = binary('mips/console')
434 self.boot_osflags = fillInCmdline(mdesc, cmdline)
436 self.system_port = self.membus.slave
438 return self
498 def makeX86System(mem_mode, numCPUs=1, mdesc=None, self=None, Ruby=False):
499 if self == None:
500 self = X86System()
505 self.readfile = mdesc.script()
507 self.mem_mode = mem_mode
516 self.mem_ranges = [AddrRange(mdesc.mem())]
522 self.mem_ranges = [AddrRange('3GB'),
526 self.pc = Pc()
530 connectX86RubySystem(self)
532 connectX86ClassicSystem(self, numCPUs)
534 self.intrctrl = IntrControl()
541 self.pc.south_bridge.ide.disks = [disk0, disk2]
545 self.smbios_table.structures = structures
562 self.pc.south_bridge.io_apic.apic_id = io_apic.id
606 self.intel_mp_table.base_entries = base_entries
607 self.intel_mp_table.ext_entries = ext_entries
611 self = LinuxX86System()
614 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby)
618 phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges))
620 assert(len(self.mem_ranges) <= 2)
629 size = '%dB' % (self.mem_ranges[0].size() - 0x100000),
636 if len(self.mem_ranges) == 1:
637 entries.append(X86E820Entry(addr = self.mem_ranges[0].size(),
638 size='%dB' % (0xC0000000 - self.mem_ranges[0].size()),
648 if len(self.mem_ranges) == 2:
650 size = '%dB' % (self.mem_ranges[1].size()), range_type = 1))
652 self.e820_table.entries = entries
657 self.boot_osflags = fillInCmdline(mdesc, cmdline)
658 return self
662 self = Root(full_system = full_system)
663 self.testsys = testSystem
664 self.drivesys = driveSystem
665 self.etherlink = EtherLink()
668 self.etherlink.int0 = Parent.testsys.realview.ethernet.interface
669 self.etherlink.int1 = Parent.drivesys.realview.ethernet.interface
671 self.etherlink.int0 = Parent.testsys.tsunami.ethernet.interface
672 self.etherlink.int1 = Parent.drivesys.tsunami.ethernet.interface
677 self.etherdump = EtherDump(file=dumpfile)
678 self.etherlink.dump = Parent.etherdump
680 return self
693 self = Root(full_system = True)
694 self.testsys = testSystem
696 self.etherlink = DistEtherLink(speed = linkspeed,
706 self.etherlink.int0 = Parent.testsys.realview.ethernet.interface
708 self.etherlink.int0 = Parent.testsys.tsunami.ethernet.interface
713 self.etherdump = EtherDump(file=dumpfile)
714 self.etherlink.dump = Parent.etherdump
716 return self