History log of /gem5/util/tlm/src/
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13744:c375fb19c372 01-Mar-2019 Gabe Black <gabeblack@google.com>

util, tlm: Fix a memory error in the SCMasterPort class.

In the b_transport method of the SCMasterPort class, there is a check
which determines whether the packet being sent to gem5 should be
deleted once the call to sendAtomic returns. This was deleting the
packet if extension was *not* nullptr.

This check should delete the packet if the extension *is* nullptr. The
reasoning is that the extension will equal nullptr if there was no
gem5 packet in an extension and a new one needed to be allocated. If
there was an extension, ie if extension is not nullptr, then that's
where the packet came from which therefore doesn't belong to us. In
that case, we need to leave it alone and let its owner clean it up.

With the check reversed, this method will either leak allocated packets
it should delete, or delete packets it shouldn't that someone else will
likely try to use later.

Change-Id: I61578d910be6e5085b9fc0ddaa82468b1ac68578
Reviewed-on: https://gem5-review.googlesource.com/c/16949
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

13391:f298f7d04903 06-Nov-2018 Gabe Black <gabeblack@google.com>

systemc: Fix some paths in the tlm SCons(script|struct).

The code in util/systemc was moved into a subdirectory recently. The
scons support here referred to it, and needed to be updated.

Change-Id: Ib457d9bdafb2bba5058e6ecf99b9d33b3072c5b3
Reviewed-on: https://gem5-review.googlesource.com/c/13955
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

12749:223c83ed9979 04-Jun-2018 Giacomo Travaglini <giacomo.travaglini@arm.com>

misc: Using smart pointers for memory Requests

This patch is changing the underlying type for RequestPtr from Request*
to shared_ptr<Request>. Having memory requests being managed by smart
pointers will simplify the code; it will also prevent memory leakage and
dangling pointers.

Change-Id: I7749af38a11ac8eb4d53d8df1252951e0890fde3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10996
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>


/gem5/ext/sst/ExtMaster.cc
/gem5/ext/sst/ExtSlave.cc
/gem5/src/arch/alpha/locked_mem.hh
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tlb.hh
/gem5/src/arch/arm/isa.cc
/gem5/src/arch/arm/locked_mem.hh
/gem5/src/arch/arm/stage2_lookup.cc
/gem5/src/arch/arm/stage2_lookup.hh
/gem5/src/arch/arm/stage2_mmu.cc
/gem5/src/arch/arm/stage2_mmu.hh
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/tracers/tarmac_parser.cc
/gem5/src/arch/arm/tracers/tarmac_parser.hh
/gem5/src/arch/arm/vtophys.cc
/gem5/src/arch/generic/locked_mem.hh
/gem5/src/arch/generic/tlb.cc
/gem5/src/arch/generic/tlb.hh
/gem5/src/arch/hsail/insts/mem.hh
/gem5/src/arch/mips/locked_mem.hh
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/power/tlb.cc
/gem5/src/arch/power/tlb.hh
/gem5/src/arch/riscv/locked_mem.hh
/gem5/src/arch/riscv/tlb.cc
/gem5/src/arch/riscv/tlb.hh
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/tlb.hh
/gem5/src/arch/x86/intmessage.hh
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base_dyn_inst.hh
/gem5/src/cpu/base_dyn_inst_impl.hh
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/checker/cpu.hh
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/kvm/base.cc
/gem5/src/cpu/kvm/x86_cpu.cc
/gem5/src/cpu/minor/fetch1.cc
/gem5/src/cpu/minor/fetch1.hh
/gem5/src/cpu/minor/lsq.cc
/gem5/src/cpu/minor/lsq.hh
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_impl.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/atomic.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.cc
/gem5/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
/gem5/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/rubytest/Check.cc
/gem5/src/cpu/testers/rubytest/RubyTester.cc
/gem5/src/cpu/testers/traffic_gen/base_gen.cc
/gem5/src/cpu/testers/traffic_gen/traffic_gen.cc
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/cpu/translation.hh
/gem5/src/dev/dma_device.cc
/gem5/src/dev/x86/i82094aa.cc
/gem5/src/gpu-compute/compute_unit.cc
/gem5/src/gpu-compute/fetch_unit.cc
/gem5/src/gpu-compute/gpu_tlb.cc
/gem5/src/gpu-compute/gpu_tlb.hh
/gem5/src/gpu-compute/shader.cc
/gem5/src/gpu-compute/shader.hh
/gem5/src/learning_gem5/part2/simple_cache.cc
/gem5/src/mem/abstract_mem.cc
/gem5/src/mem/abstract_mem.hh
/gem5/src/mem/cache/base.cc
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/cache.cc
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/noncoherent_cache.cc
/gem5/src/mem/cache/prefetch/queued.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.cc
/gem5/src/mem/page_table.hh
/gem5/src/mem/port.cc
/gem5/src/mem/port_proxy.cc
/gem5/src/mem/request.hh
/gem5/src/mem/ruby/slicc_interface/AbstractController.cc
/gem5/src/mem/ruby/system/CacheRecorder.cc
/gem5/src/mem/ruby/system/GPUCoalescer.cc
/gem5/src/mem/ruby/system/GPUCoalescer.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/Sequencer.cc
sc_master_port.cc
12183:a097b7c2d9b6 17-Aug-2017 Matthias Jung <jungma@eit.uni-kl.de>

tlm: Don't set SystemC time resolution

Some simulators already set the time resolution of SystemC. By coupling
gem5 by means of SystemC with an other tool this can lead to problems:
When the resolution is set twice the simulation will not work.
Therefore, the line is changed to an assertion that checks if the time
resolution of the SystemC simulation is set to gem5's value of 1ps.

Change-Id: I8aafab9dd593eb4697a3c7f69ce181fd9cdd05c4
Reviewed-on: https://gem5-review.googlesource.com/4520
Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

12047:8b269268312c 22-May-2017 Christian Menard <christian.menard@tu-dresden.de>

misc: Reorder sources in util/tlm and rewrite build scripts

* Use one SConstruct to build everything instead of one SConstruct for
each example.
* Introduce SConscripts for sub-directories.
* Build in 'build' instead of the source tree.
* Build and link to SystemC from the ext/systemc directory. This
ensures that SystemC does not need to be installed on the host and
avoids possible issues caused by an incompatible SystemC build.
* Update the README and add some minor fixes

Change-Id: I641ed94f542626864fb7af499ad1be8fd4ad929f
Reviewed-on: https://gem5-review.googlesource.com/3480
Reviewed-by: Matthias Jung <jungma@eit.uni-kl.de>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>