11637:94fd30b3e1cb |
16-Sep-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
tests, arm: Make switcheroo and checkpoint tests functional
Switcheroo and checkpoint tests should generally be considered to be successful if they run to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional.
Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> |
11606:6b749761c398 |
12-Aug-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to match classic memory changes |
11589:af2f7fef4875 |
02-Aug-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11570:4aac82f10951 |
21-Jul-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11547:dd6dfd38b6c2 |
21-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update stats to reflect ARM changes |
11530:6e143fd2cabf |
06-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Add power stats to test references
Change-Id: Ic827213134b199446822f128b81d4a480e777fee |
11515:c48c7cc5a522 |
02-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to match ARM ISA changes |
11507:be6065c1d8d2 |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update and fix e273e86a873d |
11502:e273e86a873d |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update for snoop filter tweak |
11456:c0fb4435b80f |
21-Apr-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes
Removed unused stats, now counting WriteLineReq, and changed how uncacheable writes are handled while responses are outstanding. |
11440:76b5639162af |
08-Apr-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update stats for thermals, indirect BP |
11336:b318499f676c |
10-Feb-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect changes to cache and crossbar |
11312:3d7a85d71bd1 |
22-Jan-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
stats: update stats to after GPU checkin |
11268:8b4b55d79ddd |
12-Dec-2015 |
Anthony Gutierrez <atgutier@umich.edu> |
stats: bump stats to reflect ruby tester changes |
11245:1c5102c0a7a9 |
04-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to reflect changes to PCI handling |
11239:3be64e1f80ed |
03-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to reflect changes to RealView platform code |
11219:b65d4e878ed2 |
16-Nov-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent chagnesets |
11201:b1bd4afb6b16 |
06-Nov-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to match cache changes |
11138:a611a23c8cc2 |
25-Sep-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect snoop-filter changes |
11103:38f6188421e0 |
15-Sep-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent changesets including d0934b57735a |
11014:863d314f6356 |
07-Aug-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update ARM stats to include programmable oscillators |
10892:bd37e25fb3b7 |
03-Jul-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for cache, crossbar and DRAM changes
This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling.
Needless to say, almost every regression is affected. |
10827:7f5467f2f8b8 |
05-May-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes |
10736:4433fb00fa7d |
09-Mar-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes to due to recent set of patches |
10726:8a20e2a1562d |
02-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache and interconnect changes
This is a bulk update of stats to match the changes to cache timing, interconnect timing, and a few minor changes to the o3 CPU. |
10636:9ac724889705 |
04-Jan-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes due to recent changesets. |
10628:c9b7e0c69f88 |
23-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes
Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller. |
10585:1c9d5d9417b3 |
02-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for fixes, mostly TLB and WriteInvalidate |
10535:4ccec5baf82c |
12-Nov-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump regressions to match latest changes
Updates after timezone hick-up and sorting of dictionary items in the SimObject. |
10517:ba51f8572571 |
03-Nov-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
tests: Update stats no match.
Bootloader I had on my sytem was an older version with a couple of instruction differences. |
10513:ca4438b6e39a |
30-Oct-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
tests: Update regressions for the new kernels and various preceeding fixes. |
10451:3a87241adfb8 |
11-Oct-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to changes to x86, stale configs. |
10409:8c80b91944c5 |
20-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for filter, crossbar and config changes
This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs. |
10352:5f1f92bf76ee |
03-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for CPU and cache changes
This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches. |
10315:9e02c14446bb |
01-Sep-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent ruby and x86 changes Also updates many out of date config files. |
10220:9eab5efc02e8 |
09-May-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for the fixes, and mostly DRAM controller changes |
10072:fa5c8a8a7bab |
19-Feb-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
arm: Bump stats after FS config script update
This patch updates the stats to reflect the change in kernel options needed for armv8 (but used for all FS regressions). |
10063:9595c7a1d837 |
16-Feb-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to branch predictor warming |
10038:7eccd14e2610 |
24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for ARMv8 changes |
10036:80e84beef3bb |
24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for cache occupancy and clock domain changes |
9988:0b2e590c85be |
26-Nov-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to changes to ticksToCycles() |
9962:7aef35367a21 |
01-Nov-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats after shifting to SimpleMemory
Match stats with new regression configs. |
9885:afd9ea6101d9 |
28-Sep-2013 |
Steve Reinhardt <stever@gmail.com> |
tests: update reference outputs
Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority. |
9838:43d22d746e7a |
19-Aug-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models.
The main reason for bundling them up is to minimise the changeset size. |
9797:9cd5f91e7a79 |
27-Jun-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for monitor, cache and bus changes
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index. |
9729:e2fafd224f43 |
30-May-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate. |
9661:18755c467503 |
22-Apr-2013 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: Update stats for O3 switching fix. |
9568:cd1351d4d850 |
01-Mar-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect SimpleDRAM changes
This patch bumps the stats to reflect the slight change in how the retry is handled, and also the pruning of some redundant stats. |
9490:e6a09d97bdc9 |
31-Jan-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for regressions using SimpleDDR3
This patch updates the regression stats to reflect that they are using the SimpleDDR3 controller by default. |
9481:b0fa6b872f40 |
24-Jan-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables. |
9447:156f74caf0d4 |
07-Jan-2013 |
Andreas Sandberg <Andreas.Sandberg@ARM.com> |
tests: Add CPU switching tests
This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations:
* tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3)
Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process.
The in-order CPU model was not included in any of the tests as it does not support CPU handover. |