11957:90bb43dfc028 |
29-Mar-2017 |
Gabe Black <gabeblack@google.com> |
stats: Update ARM FS stats.
The change below changed the behavior of interrupts on ARM and changed the stats for the 10.linux-boot regression.
commit 746e2f3c27ad83c36b7bc3b8bd3c92004fcf995b Author: Sudhanshu Jha <sudhanshu.jha@arm.com> Date: Mon Feb 27 10:29:56 2017 +0000
arm, kmi: Clear interrupts in KMI devices
Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a Reviewed-on: https://gem5-review.googlesource.com/2653 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
11754:c209cb86278a |
05-Dec-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes |
11731:c473ca7cc650 |
30-Nov-2016 |
Jason Lowe-Power <jason@lowepower.com> |
tests: Regression stats updated for recent patches |
11707:1d085f66c4ca |
17-Nov-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats, alpha: Update ALPHA stats
Reflect the removal of the syscall tracking. |
11687:b3d5f0e9e258 |
19-Oct-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding reads/writes. |
11680:b4d943429dc6 |
13-Oct-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11637:94fd30b3e1cb |
16-Sep-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
tests, arm: Make switcheroo and checkpoint tests functional
Switcheroo and checkpoint tests should generally be considered to be successful if they run to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional.
Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> |
11606:6b749761c398 |
12-Aug-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to match classic memory changes |
11589:af2f7fef4875 |
02-Aug-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11570:4aac82f10951 |
21-Jul-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11547:dd6dfd38b6c2 |
21-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update stats to reflect ARM changes |
11530:6e143fd2cabf |
06-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Add power stats to test references
Change-Id: Ic827213134b199446822f128b81d4a480e777fee |
11515:c48c7cc5a522 |
02-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to match ARM ISA changes |
11507:be6065c1d8d2 |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update and fix e273e86a873d |
11502:e273e86a873d |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update for snoop filter tweak |
11464:5160d2a58007 |
28-Apr-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
tests: Remove stale reference output files
Remove test reference files that are not generated any more:
* chair.cook.ppm: This file should be generated by eon and not mcf, so it shouldn't be included as an output from mcf.
* system.pc.terminal: The terminal device has been renamed so this file is no longer generated.
Change-Id: I3962efe1ff25479ca276115f7564eccb5fac8cf9 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> |
11456:c0fb4435b80f |
21-Apr-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes
Removed unused stats, now counting WriteLineReq, and changed how uncacheable writes are handled while responses are outstanding. |
11440:76b5639162af |
08-Apr-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update stats for thermals, indirect BP |
11356:a80884911971 |
19-Jul-2015 |
Krishnendra Nathella <krinat01@arm.com> |
cpu: Fix LLSC atomic CPU wakeup
Writes to locked memory addresses (LLSC) did not wake up the locking CPU. This can lead to deadlocks on multi-core runs. In AtomicSimpleCPU, recvAtomicSnoop was checking if the incoming packet was an invalidation (isInvalidate) and only then handled a locked snoop. But, writes are seen instead of invalidates when running without caches (fast-forward configurations). As as simple fix, now handleLockedSnoop is also called even if the incoming snoop packet are from writes. |
11336:b318499f676c |
10-Feb-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect changes to cache and crossbar |
11312:3d7a85d71bd1 |
22-Jan-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
stats: update stats to after GPU checkin |
11268:8b4b55d79ddd |
12-Dec-2015 |
Anthony Gutierrez <atgutier@umich.edu> |
stats: bump stats to reflect ruby tester changes |
11245:1c5102c0a7a9 |
04-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to reflect changes to PCI handling |
11239:3be64e1f80ed |
03-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to reflect changes to RealView platform code |
11219:b65d4e878ed2 |
16-Nov-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent chagnesets |
11201:b1bd4afb6b16 |
06-Nov-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to match cache changes |
11167:207d6f2f1d53 |
10-Oct-2015 |
Joel Hestness <jthestness@gmail.com> |
stats: Update for UDelayEvent quiesce change |
11138:a611a23c8cc2 |
25-Sep-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect snoop-filter changes |
11103:38f6188421e0 |
15-Sep-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent changesets including d0934b57735a |
11014:863d314f6356 |
07-Aug-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update ARM stats to include programmable oscillators |
10944:412eb87b1cfc |
30-Jul-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for clean eviction addition |
10901:8cfa8dac39fe |
05-Jul-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: x86: update stats missed out on in preivous changeset |
10892:bd37e25fb3b7 |
03-Jul-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for cache, crossbar and DRAM changes
This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling.
Needless to say, almost every regression is affected. |
10827:7f5467f2f8b8 |
05-May-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes |
10778:235ff1c046df |
03-Apr-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent changesets. |
10765:ee0e03afd9da |
27-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
tests: Update stats for cache block alignment |
10754:02621b4f013b |
23-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
tests: Final reclassification of quick regressions
A few regressions were still considered long, but finished well within the 180 seconds. They are only a handful (mostly mcf in atomic). |
10752:62b24818c8c6 |
19-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
tests: Recategorise regressions based on run time
This patch takes a first stab at recategorising the regression tests based on actual run times. The simple-atomic and simple-timing runs of vortex and twolf all finish in less than 180 s, and they are consequently moved from long to quick. All realview64 linux-boot regressions take more than 700 s, and they are therefore moved to long.
Later patches will rename quick to short, and further divide the regressions into short, medium and long. |
10751:11d4a587d43a |
19-Mar-2015 |
Andreas Sandberg <Andreas.Sandberg@ARM.com> |
test, arm: Add scripts to test checkpoints
Add a set of scripts to automatically test checkpointing in the regression framework. The checkpointing tests are similar to the switcheroo tests, but instead of switching between CPUs, they checkpoint the system and restore from the checkpoint again. This is done at regular intervals, typically while booting Linux.
The implementation is fairly straight forward, with the exception that we have to work around gem5's inability to restore from a checkpoint after a system has been instantiated. We work around this by forking off child processes that does the actual simulation and never instantiate a system in the parent process unless a maximum checkpoint count is reached (in which case we just simulate the system to completion in the parent).
Checkpoint testing is currently only enabled 32- and 64-bit ARM systems using atomic CPUs.
Note: An unfortunate side-effect of forking is that every new process will overwrite the stats and terminal output from the previous process. This means that the output directory only contains data from the last checkpoint. |
10736:4433fb00fa7d |
09-Mar-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes to due to recent set of patches |
10726:8a20e2a1562d |
02-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache and interconnect changes
This is a bulk update of stats to match the changes to cache timing, interconnect timing, and a few minor changes to the o3 CPU. |
10645:cd95d4d51659 |
10-Jan-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes due to recent changesets. |
10639:469cf1ea40f5 |
07-Jan-2015 |
Gabe Black <gabeblack@google.com> |
stats: x86: Update stats for the CPUID change. |
10636:9ac724889705 |
04-Jan-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes due to recent changesets. |
10628:c9b7e0c69f88 |
23-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes
Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller. |
10585:1c9d5d9417b3 |
02-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for fixes, mostly TLB and WriteInvalidate |
10549:6317351a288c |
21-Nov-2014 |
Gabe Black <gabeblack@google.com> |
x86: Update stats for the new Linux delay port. |
10540:45204db420c0 |
17-Nov-2014 |
Gabe Black <gabeblack@google.com> |
x86: Update the stats for the x86 FS o3 boot test. |
10535:4ccec5baf82c |
12-Nov-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump regressions to match latest changes
Updates after timezone hick-up and sorting of dictionary items in the SimObject. |
10517:ba51f8572571 |
03-Nov-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
tests: Update stats no match.
Bootloader I had on my sytem was an older version with a couple of instruction differences. |
10516:cae494887847 |
30-Oct-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
arm, tests: Forgot the system.terminal files for the new regressions. |
10515:bd7c2aa12122 |
30-Oct-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
arm, tests: Add 64-bit ARM regression tests |
10513:ca4438b6e39a |
30-Oct-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
tests: Update regressions for the new kernels and various preceeding fixes. |
10451:3a87241adfb8 |
11-Oct-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to changes to x86, stale configs. |
10433:821cbe4a183b |
09-Oct-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Add DRAM power statistics to reference output |
10409:8c80b91944c5 |
20-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for filter, crossbar and config changes
This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs. |
10352:5f1f92bf76ee |
03-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for CPU and cache changes
This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches. |
10315:9e02c14446bb |
01-Sep-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent ruby and x86 changes Also updates many out of date config files. |
10220:9eab5efc02e8 |
09-May-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for the fixes, and mostly DRAM controller changes |
10148:4574d5882066 |
23-Mar-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for DRAM changes
This patch updates the stats to reflect the changes to the DRAM controller. |
10072:fa5c8a8a7bab |
19-Feb-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
arm: Bump stats after FS config script update
This patch updates the stats to reflect the change in kernel options needed for armv8 (but used for all FS regressions). |
10063:9595c7a1d837 |
16-Feb-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to branch predictor warming |
10038:7eccd14e2610 |
24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for ARMv8 changes |
10036:80e84beef3bb |
24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for cache occupancy and clock domain changes |
9988:0b2e590c85be |
26-Nov-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to changes to ticksToCycles() |
9978:81d7551dd3be |
01-Nov-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats to match DRAM controller changes
This patch encompasses all the stats updates needed to reflect the changes to the DRAM controller. |
9962:7aef35367a21 |
01-Nov-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats after shifting to SimpleMemory
Match stats with new regression configs. |
9924:31ef410b6843 |
16-Oct-2013 |
Steve Reinhardt <steve.reinhardt@amd.com> |
test: update stats
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses. |
9901:13c5fea24be1 |
02-Oct-2013 |
Andreas Sandberg <andreas@sandberg.pp.se> |
stats: Update x86 stats after x87 fixes
The updates to the x87 caused the stats for several regressions to change. This was mainly caused by the addition of a working 32-bit and 80-bit FP load instruction and xsave support. |
9885:afd9ea6101d9 |
28-Sep-2013 |
Steve Reinhardt <stever@gmail.com> |
tests: update reference outputs
Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority. |
9838:43d22d746e7a |
19-Aug-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models.
The main reason for bundling them up is to minimise the changeset size. |
9797:9cd5f91e7a79 |
27-Jun-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for monitor, cache and bus changes
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index. |
9729:e2fafd224f43 |
30-May-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate. |
9702:094d0280e481 |
21-May-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
x86, regressions: updates stats This is due to op class, function call, walker patches. |
9672:4a4294822ec5 |
23-Apr-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
x86, stats: updates due to lret bugfix |
9661:18755c467503 |
22-Apr-2013 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: Update stats for O3 switching fix. |
9625:47591444a7c5 |
29-Mar-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: updates due to changes to o3 cpu, x86 memory map |
9620:89aa34e10625 |
27-Mar-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update due to cache latency fix |
9615:daa8a14ec85e |
26-Mar-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for cache retry event check
This patch updates the stats for the affected stats. All the changes are minimal (in the <0.01% range). |
9613:0245dca0f2a2 |
26-Mar-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect bus retry changes
This patch updates the stats after splitting the bus retry into waiting for the bus and waiting for the peer. |
9568:cd1351d4d850 |
01-Mar-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect SimpleDRAM changes
This patch bumps the stats to reflect the slight change in how the retry is handled, and also the pruning of some redundant stats. |
9490:e6a09d97bdc9 |
31-Jan-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for regressions using SimpleDDR3
This patch updates the regression stats to reflect that they are using the SimpleDDR3 controller by default. |
9481:b0fa6b872f40 |
24-Jan-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables. |
9474:23c3e1c0e9e4 |
15-Jan-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
x86 regressions: updates due to new instructions and cpuid |
9449:56610ab73040 |
07-Jan-2013 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for previous changes. |
9447:156f74caf0d4 |
07-Jan-2013 |
Andreas Sandberg <Andreas.Sandberg@ARM.com> |
tests: Add CPU switching tests
This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations:
* tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3)
Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process.
The in-order CPU model was not included in any of the tests as it does not support CPU handover. |
9361:5b6087e0750f |
06-Dec-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
regression test: update a couple of config.ini files |
9314:63e7cfff4188 |
25-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update the stats to reflect the 1GHz default system clock
This patch updates the stats to reflect the change in the default system clock from 1 THz to 1GHz. The changes are due to the DMA devices now injecting requests at a lower pace. |
9312:e05e1b69ebf2 |
25-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect use of SimpleDRAM
This patch bumps the stats to match the use of SimpleDRAM instead of SimpleMemory in all inorder and O3 regressions, and also all full-system regressions. A number of performance-related stats change, and a whole bunch of stats are added for the memory controller. |
9308:f634a34f2f0b |
23-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for DMA port send
This patch updates the stats after removing the zero-time send used in the DMA port. |
9289:a31a1243a3ed |
15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for cache timings in cycles
This patch updates the stats to reflect the change in how cache latencies are expressed. In addition, the latencies are now rounded to multiples of the clock period, thus also affecting other stats. |
9285:9901180cd573 |
15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for new default L1-to-L2 bus clock and width
This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
9283:490958b032d6 |
15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for use of two-level builder
This patch updates the name of the l2 stats. |
9265:8fe936e937bd |
25-Sep-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: update stats for bp and squash fixes. |
9247:73c3eb0dd733 |
24-Sep-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for twosys-tsunami after setting CPU clock
This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick. |
9229:65f927bda74d |
18-Sep-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats to reflect SimpleMemory bandwidth
This patch simply bumps the stats to reflect the introduction of a bandwidth limit of 12.8GB/s for SimpleMemory. |
9213:5cab5448909c |
11-Sep-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
x86 Regressions: Update stats due to register predication |
9199:2a5516167688 |
10-Sep-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Device: Update stats for PIO and PCI latency change
This patch merely updates the regression stats to reflect the change in PIO and PCI latency. |
9134:275232ad377d |
27-Jul-2012 |
Ali Saidi <saidi@eecs.umich.edu> |
stats: update stats for icache change not allowing dirty data |
9125:65423863d963 |
22-Jul-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
Regression: Update stats due to changes to x86 cpuid instruction |
9096:8971a998190a |
09-Jul-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Updates due to bus changes
This patch bumps all the stats to reflect the bus changes, i.e. the introduction of the state variable, the division into a request and response layer, and the new default bus width of 8 bytes. |
9079:9a244ebdc3c9 |
29-Jun-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
Stats: Update stats for RAS and LRU fixes. |
9055:38f1926fb599 |
05-Jun-2012 |
Ali Saidi <saidi@eecs.umich.edu> |
all: Update stats for memory per master and total fix. |
9039:9a22621c741c |
04-Jun-2012 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Update stats for the CPUID change. |
9013:afa278317136 |
22-May-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
X86 Regression: update stats due to cc register split |
9005:f681719e2e99 |
10-May-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: update stats for clock frequency fix. |
8983:8800b05e1cb3 |
09-May-2012 |
Nathan Binkert <nate@binkert.org> |
stats: update stats for no_value -> nan Lots of accumulated older changes too. |
8977:42ea79acf35f |
04-May-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
Regression: Move x86 fs ruby simulation from quick to long |
8974:fe542ba8a878 |
30-Apr-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
Regression: Stats update for X86 Ruby FS test The kernel originally used to generate the stats is different from the one at use on zizzer. This patch updates the stats with the correct kernel in use. |
8968:6d11b01e2c53 |
25-Apr-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
Regression: Add a test for x86 timing full system ruby simulation |
8911:4da2ea94319f |
21-Mar-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Update stats for IT and conditional branch changes |
8893:e29c604a2582 |
09-Mar-2012 |
Ali Saidi <saidi@eecs.umich.edu> |
ARM: Update stats for CBNZ fix. |
8891:b4249e884de4 |
09-Mar-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Update stats for valgrind fix and replace config.inis which are out of date. |
8875:ad681c92b07d |
02-Mar-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Fix the realview regression stats after nvmem move
This patch updates the realview regressions stats to reflect that nvmem moved in the object hierarchy and is now under system.realview. |
8844:a451e4eda591 |
13-Feb-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
bp: fix up stats for changes to branch predictor |
8835:7c68f84d7c4e |
12-Feb-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for insts/ops and master id changes |
8802:ef66a9083bc4 |
28-Jan-2012 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Make both SE and FS tests available all the time. |