History log of /gem5/src/unittest/
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13675:afeab32b3655 24-Jan-2019 Andreas Sandberg <andreas.sandberg@arm.com>

python: Replace dict.has_key with 'key in dict'

Python 3 has removed dict.has_key in favour of 'key in dict'.

Change-Id: I9852a5f57d672bea815308eb647a0ce45624fad5
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15987
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

13540:da30e62884ee 10-Jan-2019 Andrea Mondelli <andrea.mondelli@ucf.edu>

misc: updated shabang for python script

The default python on MacOS doesn’t have an alias to python2.
The official python version supported in gem5 is Python2.7.

This patch updates the shabang according to the version required in gem5.

Change-Id: I9533c0f7858b5b3cab0ef101be1ee5cd718105b0
Reviewed-on: https://gem5-review.googlesource.com/c/15375
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

13451:b7bae7b7495a 22-Nov-2018 Giacomo Travaglini <giacomo.travaglini@arm.com>

tests: Convert IniFile unit test to a GTest

Change-Id: I47d6c9cbae21877420a15ffcf8489e3c26959139
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/14615
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

13360:a2254720ecf3 23-Oct-2018 Andreas Sandberg <andreas.sandberg@arm.com>

tests: Convert AddrRangeMap unit test to a GTest

Change-Id: Ifeb0b57c0cda77706691286f78325e50edb31c0d
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13736
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

13359:4f3ab46cc7c7 24-Oct-2018 Andreas Sandberg <andreas.sandberg@arm.com>

tests: Convert CircleBuf unit test to a GTest

Change-Id: I028c6b8d8e0ec06cac3d636689ae647f717096cd
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13735
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

12776:410b60d8a397 18-Apr-2018 Nikos Nikoleris <nikos.nikoleris@arm.com>

base, mem: Disambiguate if an addr range is contained or overlaps

We need to determined whether an address range is fully contained or
it overlaps with an address range in the address range in the mmap. As
an example, we use address range maps to associate ports to address
ranges and we determine which port we will forward the request based
on which address range contains the addresses accessed by the
request. We also need to make sure that when we add a new port to the
address range map, its address range does not overlap with any of the
existing ports.

This patch splits the function find() into two functions contains()
and intersects() to implement this distinct functionality. It also
changes the xbar and the physical memory to use the right function.

Change-Id: If3fd3f774a16b27db2df76dc04f1d61824938008
Reviewed-on: https://gem5-review.googlesource.com/11115
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

12757:114f34a90feb 02-Jun-2018 Gabe Black <gabeblack@google.com>

tests: Make "UnitTest"s more like GTest so they can be in other dirs.

The original implementation of UnitTest forced all the output binaries
to live in the unittest directory, effectively forcing a flat
namespace, and seperating the tests from the things they were supposed
to be testing.

This changes makes them work more like the newer GTest tests in that
they can be based out of whatever directory makes sense, although
they're currently all still in unittest for the time being.

This change also gets rid of automatically tagging the sources
associated with a test with the tests name. The first reason for that
was that this also forced a flat namespace, since the tests names
didn't have any reference to the test's path. Second, this way of
pulling in additional files wasn't necessary any more, now that the
UnitTest sources could be source filters like they can be for GTests.

Change-Id: I3d96ed766ac5170842dbd6daee39f2873bcd6c75
Reviewed-on: https://gem5-review.googlesource.com/10701
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

12563:8d59ed22ae79 06-Mar-2018 Gabe Black <gabeblack@google.com>

scons: Switch from the print statement to the print function.

Starting with version 3, scons imposes using the print function instead
of the print statement in code it processes. To get things building
again, this change moves all python code within gem5 to use the
function version. Another change by another author separately made this
same change to the site_tools and site_init.py files.

Change-Id: I2de7dc3b1be756baad6f60574c47c8b7e80ea3b0
Reviewed-on: https://gem5-review.googlesource.com/8761
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

12382:face556c9c47 04-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Turn fbtest into a gtest and move it to src/base.

Change-Id: I9ca57e24f27e0eb747d1f27262972a8abcd10fc8
Reviewed-on: https://gem5-review.googlesource.com/6342
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12381:2f845ce45c9d 04-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Move the cprintftest unit test into src/base.

That way it will live alongside the code it tests.

Change-Id: I00baad2206870a4619b7cee792a1d4c303dad04d
Reviewed-on: https://gem5-review.googlesource.com/6324
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12380:659afcb603ca 04-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Convert the cprintf unit test into a gtest.

Change-Id: I0f78a202d1f5fd29cda94ca93b540618831fe898
Reviewed-on: https://gem5-review.googlesource.com/6323
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12379:52b13ae47c42 03-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Move the trietest unit test into base.

This puts it alongside trie.hh, the header file it tests.

Change-Id: Id8ca0c1d68bdc01807c5ba4b51c0142b1221385d
Reviewed-on: https://gem5-review.googlesource.com/6281
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>

12378:de797bb43b04 03-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Plumb dumps of the test trie into the gtest macros.

With this change, when one of the tests fails, it will output a dump
of the trie data structure, making it a little easier to tell what
happened.

Change-Id: I0816ed727ef0b50fefd7ec485356b4fe8790bfe1
Reviewed-on: https://gem5-review.googlesource.com/6267
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>

12377:bcb7a7f969db 03-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Convert the trie unit test into a gtest.

Change-Id: Idcf60260d9bda1b8ef5b6f5d59b74ca218395f0c
Reviewed-on: https://gem5-review.googlesource.com/6265
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>

12366:3b4b6fa339a9 04-Dec-2017 Gabe Black <gabeblack@google.com>

base: Split out the pixel class in framebuffer.(cc|hh).

These are really two separate things. Also, while it's realitively
straightforward to write a unit test for the pixel conversion code, the
framebuffer object is serializable and brings in more dependencies.

Change-Id: If954caeb0bfedb1002cfb1a7a115a00c90d56d19
Reviewed-on: https://gem5-review.googlesource.com/6341
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12364:8cba43b89bcb 04-Dec-2017 Gabe Black <gabeblack@google.com>

tests: Fix the source file for the cprintftime test.

It was using the source file for the cprintftest unit test.

Change-Id: I534798e892ad55cef2f48be2ba9d732aa1993819
Reviewed-on: https://gem5-review.googlesource.com/6321
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12334:e0ab29a34764 30-Nov-2017 Gabe Black <gabeblack@google.com>

misc: Rename misc.(hh|cc) to logging.(hh|cc)

These files aren't a collection of miscellaneous stuff, they're the
definition of the Logger interface, and a few utility macros for
calling into that interface (panic, warn, etc.).

Change-Id: I84267ac3f45896a83c0ef027f8f19c5e9a5667d1
Reviewed-on: https://gem5-review.googlesource.com/6226
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>


/gem5/ext/sst/gem5.cc
/gem5/src/arch/alpha/isa.cc
/gem5/src/arch/alpha/locked_mem.hh
/gem5/src/arch/alpha/mt.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/pseudo_inst.hh
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/arm/faults.hh
/gem5/src/arch/arm/isa_device.cc
/gem5/src/arch/arm/miscregs.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/pseudo_inst.hh
/gem5/src/arch/arm/types.hh
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/generic/debugfaults.hh
/gem5/src/arch/generic/pseudo_inst.cc
/gem5/src/arch/generic/tlb.hh
/gem5/src/arch/generic/vec_reg.hh
/gem5/src/arch/hsail/gpu_isa.hh
/gem5/src/arch/mips/decoder.hh
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/interrupts.hh
/gem5/src/arch/mips/locked_mem.hh
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/pagetable.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/pseudo_inst.hh
/gem5/src/arch/mips/registers.hh
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/power/interrupts.hh
/gem5/src/arch/power/isa.hh
/gem5/src/arch/power/process.cc
/gem5/src/arch/power/pseudo_inst.hh
/gem5/src/arch/power/utility.cc
/gem5/src/arch/riscv/decoder.hh
/gem5/src/arch/riscv/interrupts.hh
/gem5/src/arch/riscv/isa.hh
/gem5/src/arch/riscv/locked_mem.hh
/gem5/src/arch/riscv/pagetable.hh
/gem5/src/arch/riscv/process.cc
/gem5/src/arch/riscv/pseudo_inst.hh
/gem5/src/arch/sparc/isa/includes.isa
/gem5/src/arch/sparc/mt.hh
/gem5/src/arch/sparc/pagetable.hh
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/pseudo_inst.hh
/gem5/src/arch/sparc/tlb.hh
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/decoder.cc
/gem5/src/arch/x86/decoder.hh
/gem5/src/arch/x86/emulenv.cc
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/regs/int.hh
/gem5/src/base/SConscript
/gem5/src/base/addr_range.hh
/gem5/src/base/bigint.hh
/gem5/src/base/bmpwriter.cc
/gem5/src/base/circlebuf.hh
/gem5/src/base/debug.cc
/gem5/src/base/hostinfo.cc
/gem5/src/base/imgwriter.cc
/gem5/src/base/intmath.hh
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/base/loader/symtab.cc
/gem5/src/base/logging.cc
/gem5/src/base/logging.hh
/gem5/src/base/misc.cc
/gem5/src/base/misc.hh
/gem5/src/base/output.cc
/gem5/src/base/pngwriter.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/random.cc
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/time.cc
/gem5/src/base/trace.cc
/gem5/src/base/trie.hh
/gem5/src/base/vnc/vncinput.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/cpu/base.cc
/gem5/src/cpu/func_unit.cc
/gem5/src/cpu/intr_control.hh
/gem5/src/cpu/kvm/device.cc
/gem5/src/cpu/kvm/perfevent.cc
/gem5/src/cpu/kvm/timer.cc
/gem5/src/cpu/minor/buffers.hh
/gem5/src/cpu/o3/free_list.hh
/gem5/src/cpu/o3/store_set.cc
/gem5/src/cpu/pc_event.hh
/gem5/src/cpu/pred/2bit_local.cc
/gem5/src/cpu/pred/btb.hh
/gem5/src/cpu/pred/ltage.cc
/gem5/src/cpu/pred/sat_counter.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc
/gem5/src/cpu/testers/rubytest/RubyTester.cc
/gem5/src/cpu/thread_context.cc
/gem5/src/dev/intel_8254_timer.cc
/gem5/src/dev/mc146818.hh
/gem5/src/dev/net/dist_iface.hh
/gem5/src/dev/net/etherbus.cc
/gem5/src/dev/net/etherdump.cc
/gem5/src/dev/net/etherint.cc
/gem5/src/dev/net/etherpkt.cc
/gem5/src/dev/net/ethertap.cc
/gem5/src/dev/net/pktfifo.cc
/gem5/src/dev/net/pktfifo.hh
/gem5/src/dev/pci/device.cc
/gem5/src/dev/platform.cc
/gem5/src/dev/ps2.cc
/gem5/src/dev/serial/serial.cc
/gem5/src/dev/serial/terminal.cc
/gem5/src/dev/storage/disk_image.cc
/gem5/src/dev/storage/simple_disk.cc
/gem5/src/gpu-compute/brig_object.cc
/gem5/src/gpu-compute/gpu_tlb.hh
/gem5/src/gpu-compute/hsa_object.cc
/gem5/src/gpu-compute/misc.hh
/gem5/src/gpu-compute/of_scheduling_policy.hh
/gem5/src/gpu-compute/rr_scheduling_policy.hh
/gem5/src/gpu-compute/simple_pool_manager.cc
/gem5/src/gpu-compute/tlb_coalescer.hh
/gem5/src/gpu-compute/vector_register_file.cc
/gem5/src/gpu-compute/wavefront.hh
/gem5/src/kern/operatingsystem.cc
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/cache.cc
/gem5/src/mem/cache/cache.hh
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/tags/fa_lru.cc
/gem5/src/mem/cache/write_queue_entry.cc
/gem5/src/mem/coherent_xbar.cc
/gem5/src/mem/dramsim2_wrapper.cc
/gem5/src/mem/mem_checker.hh
/gem5/src/mem/noncoherent_xbar.cc
/gem5/src/mem/packet.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/request.hh
/gem5/src/mem/ruby/common/Set.hh
/gem5/src/mem/ruby/network/MessageBuffer.cc
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/fault_model/FaultModel.cc
/gem5/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
/gem5/src/mem/ruby/structures/AbstractReplacementPolicy.cc
/gem5/src/mem/ruby/system/GPUCoalescer.cc
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/VIPERCoalescer.cc
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/slicc/symbols/Type.py
/gem5/src/mem/snoop_filter.cc
/gem5/src/mem/xbar.cc
/gem5/src/proto/protoio.cc
/gem5/src/python/pybind11/core.cc
/gem5/src/python/pybind11/event.cc
/gem5/src/sim/clocked_object.cc
/gem5/src/sim/drain.cc
/gem5/src/sim/dvfs_handler.cc
/gem5/src/sim/eventq.cc
/gem5/src/sim/faults.cc
/gem5/src/sim/fd_array.cc
/gem5/src/sim/init.cc
/gem5/src/sim/init_signals.cc
/gem5/src/sim/mathexpr.cc
/gem5/src/sim/microcode_rom.cc
/gem5/src/sim/root.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/syscall_emul.hh
cprintftest.cc
nmtest.cc
stattest.cc
/gem5/util/systemc/sc_module.cc
12332:2adbc3f0f65a 29-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Remove trietest's dependence on cprintf.

Dumping the structure of the tries being constructed was useful for
debugging when the trie data structure was being developed, but the
output can't be automatically verified easily, and what's considered
correct depends on the specific implementation of the trie itself.

To make some of the earlier tests more meaningful, additional lookups
were added which verified that the correct values were returned when
the nodes of the trie were in particular arrangements.

Change-Id: Ib464ad1804d13fe40882da2190d7bf452da83818
Reviewed-on: https://gem5-review.googlesource.com/6223
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

12331:3ba1ed8afb0d 29-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Add a ptr helper function trietest.

This function casts an integer constant into a uint32_t * to make the
actual test lines a bit less verbose.

Change-Id: I9307dfd3d5861ddb9c0f6dcf4b28c846004f0a8d
Reviewed-on: https://gem5-review.googlesource.com/6222
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

12330:9d9880d7ca55 27-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Get rid of the bitvectest unit test.

This test doesn't really test anything other than the STL vector
implementation.

Change-Id: I1b932640b1be4fb92a44d314d0b51a94a6a324a2
Reviewed-on: https://gem5-review.googlesource.com/6221
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

12316:c498e2d5403e 27-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Move the bituniontest to be alongside the bitunion header.

Change-Id: I7c1a49c41672a1108fcf67c5505b0441f90588ef
Reviewed-on: https://gem5-review.googlesource.com/6142
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12314:0dc997974f15 22-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Reimplement the bituniontest as a googletest.

The implementation is very similar to the old test structurally, and
should test all the same things.

Change-Id: I58f1559d0943f2494ef06ee1d7ee5314a3852a8c
Reviewed-on: https://gem5-review.googlesource.com/6085
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12308:92870cd88b18 22-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Build the input file into the initest unit test.

This breaks an external dependency and makes the expected command line
conform to the other unit tests. Also get rid of some ancient tests
which test adding to the ini's contents based on command line
arguments.

This test still needs to be modified so that it actually checks whether
what happened was correct.

Change-Id: I2c9ea9fa79781bceb5cd3d1419870924e8bbd45f
Reviewed-on: https://gem5-review.googlesource.com/6081
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12302:5771c4c65b23 18-Nov-2017 Gabe Black <gabeblack@google.com>

scons: Switch from "guards" to "tags" on source files.

Tags are just arbitrary strings which are attached to source files
which mark them as having some property. By default, all source files
have the "gem5 lib" tag added to them which marks them as part of the
gem5 library, the primary component of the gem5 binary but also a
seperable component for use in, for example, system C.

The tags can be completely overridden by setting the "tags" parameter
on Source, etc., functions, and can be augmented by setting "add_tags"
which are tags that will be added, or alternatively additional tags.
It's possible to specify both, in which case the tags will be set to
the union of tags and add_tags. add_tags is supposed to be a way to
add extra tags to the default without actually overriding the default.
Both tags and add_tags can be a list/tuple/etc of tags, or a single
string which will be converted into a set internally.

Other existing tags include:
1. "python" for files that need or are used with python and are
excluded when the --without-python option is set
2. "main" for the file(s) which implement the gem5 binary's main
function.
3. The name of a unit test to group its files together.
4. Tags which group source files for partial linking.

By grouping the "tags" into a single parameter instead of taking all
extra parameters as tags, the extra parameters can, in the future, be
passed to the underlying scons environment. Also, the tags are either
present or not. With guards, they could be present and True, present
and False, or not present at all.

Change-Id: I6d0404211a393968df66f7eddfe019897b6573a2
Reviewed-on: https://gem5-review.googlesource.com/5822
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12301:141d9cb27320 21-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Resurrect initest input file(s).

Delete the current version of foo.ini which was modified, restore the
previous version, and initest.ini. Preprocess initest.ini which
includes foo.ini, and tidy up the resulting file. This file will
(mostly) get the initest unit test to work. Some other cleanups are
still necessary.

Change-Id: I4e46abc73ac89f88177eec92f572452f63ba8019
Reviewed-on: https://gem5-review.googlesource.com/6041
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

12300:32bc912e44df 21-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Fix the stats unit test.

This has been broken since February. The interface for opening
initializing where the stats output should go was changed, but the
test wasn't updated.

Change-Id: I54bd8be15bf870352d5fcfad95ded28d87c7cc5a
Reviewed-on: https://gem5-review.googlesource.com/6001
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

12273:a8ce8bf55bd2 18-Nov-2017 Gabe Black <gabeblack@google.com>

tests: Fix compilation of cprinftest.

This test has been broken since 70176fecd1ff04 in 2014. The problem was
that the array size in the test was technically not constant because it
was based on an int variable that wasn't declared as const. That
prevented g++ from resolving it as a template parameter. Before the
change mentioned above, the implementation wasn't based on templates.

Change-Id: I6819cf522f9ba4636ac661da368b9bcbae0a813f
Reviewed-on: https://gem5-review.googlesource.com/5821
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

11988:665cd5f8b52b 27-Feb-2017 Andreas Sandberg <andreas.sandberg@arm.com>

python: Use PyBind11 instead of SWIG for Python wrappers

Use the PyBind11 wrapping infrastructure instead of SWIG to generate
wrappers for functionality that needs to be exported to Python. This
has several benefits:

* PyBind11 can be redistributed with gem5, which means that we have
full control of the version used. This avoid a large number of
hard-to-debug SWIG issues we have seen in the past.

* PyBind11 doesn't rely on a custom C++ parser, instead it relies on
wrappers being explicitly declared in C++. The leads to slightly
more boiler-plate code in manually created wrappers, but doesn't
doesn't increase the overall code size. A big benefit is that this
avoids strange compilation errors when SWIG doesn't understand
modern language features.

* Unlike SWIG, there is no risk that the wrapper code incorporates
incorrect type casts (this has happened on numerous occasions in
the past) since these will result in compile-time errors.

As a part of this change, the mechanism to define exported methods has
been redesigned slightly. New methods can be exported either by
declaring them in the SimObject declaration and decorating them with
the cxxMethod decorator or by adding an instance of
PyBindMethod/PyBindProperty to the cxx_exports class variable. The
decorator has the added benefit of making it possible to add a
docstring and naming the method's parameters.

The new wrappers have the following known issues:

* Global events can't be memory managed correctly. This was the
case in SWIG as well.

Change-Id: I88c5a95b6cf6c32fa9e1ad31dfc08b2e8199a763
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Reviewed-by: Andrew Bardsley <andrew.bardsley@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2231
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Pierre-Yves PĂ©neau <pierre-yves.peneau@lirmm.fr>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

11828:36b064696175 10-Feb-2017 Jason Lowe-Power <jason@lowepower.com>

misc: Update #!env calls for python to explicit version

In some newer Linux distributions, env python default to Python 3.0. This
patch explicitly uses "python2" instead of just "python" for all scripts
that use #!

Reported-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>

11802:be62996c95d1 26-Jan-2017 Andreas Sandberg <andreas.sandberg@arm.com>

python: Move native wrappers to the _m5 namespace

Swig wrappers for native objects currently share the _m5.internal name
space with Python code. This is undesirable if we ever want to switch
from Swig to some other framework for native binding (e.g., PyBind11
or Boost::Python). This changeset moves all of such wrappers to the
_m5 namespace, which is now reserved for native code.

Change-Id: I2d2bc12dbc05b57b7c5a75f072e08124413d77f3
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

11793:ef606668d247 09-Nov-2016 Brandon Potter <brandon.potter@amd.com>

style: [patch 1/22] use /r/3648/ to reorganize includes


/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/idle_event.cc
/gem5/src/arch/alpha/ipr.cc
/gem5/src/arch/alpha/isa.cc
/gem5/src/arch/alpha/kernel_stats.cc
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/pagetable.cc
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/stacktrace.cc
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/alpha/vtophys.cc
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/mem.cc
/gem5/src/arch/arm/insts/mem64.cc
/gem5/src/arch/arm/insts/misc.cc
/gem5/src/arch/arm/insts/pseudo.cc
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/interrupts.cc
/gem5/src/arch/arm/isa.cc
/gem5/src/arch/arm/kvm/base_cpu.cc
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/miscregs.cc
/gem5/src/arch/arm/nativetrace.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/stacktrace.cc
/gem5/src/arch/arm/stage2_lookup.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/arm/vtophys.cc
/gem5/src/arch/generic/decode_cache.cc
/gem5/src/arch/generic/mmapped_ipr.cc
/gem5/src/arch/generic/pseudo_inst.cc
/gem5/src/arch/mips/bare_iron/system.cc
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/faults.cc
/gem5/src/arch/mips/idle_event.cc
/gem5/src/arch/mips/interrupts.cc
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/pagetable.cc
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/remote_gdb.cc
/gem5/src/arch/mips/stacktrace.cc
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/vtophys.cc
/gem5/src/arch/power/insts/branch.cc
/gem5/src/arch/power/insts/mem.cc
/gem5/src/arch/power/insts/static_inst.cc
/gem5/src/arch/power/isa.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/pagetable.cc
/gem5/src/arch/power/process.cc
/gem5/src/arch/power/stacktrace.cc
/gem5/src/arch/power/tlb.cc
/gem5/src/arch/power/utility.cc
/gem5/src/arch/sparc/faults.cc
/gem5/src/arch/sparc/isa.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/nativetrace.cc
/gem5/src/arch/sparc/pagetable.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/ua2005.cc
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/e820.cc
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/cpuid.cc
/gem5/src/arch/x86/decoder.cc
/gem5/src/arch/x86/emulenv.cc
/gem5/src/arch/x86/faults.cc
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/micromediaop.cc
/gem5/src/arch/x86/insts/microop.cc
/gem5/src/arch/x86/insts/microregop.cc
/gem5/src/arch/x86/insts/static_inst.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/isa.cc
/gem5/src/arch/x86/linux/process.cc
/gem5/src/arch/x86/linux/system.cc
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/pseudo_inst.cc
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/stacktrace.cc
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/types.cc
/gem5/src/arch/x86/utility.cc
/gem5/src/arch/x86/vtophys.cc
/gem5/src/base/atomicio.cc
/gem5/src/base/bigint.cc
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cprintf.cc
/gem5/src/base/debug.cc
/gem5/src/base/hostinfo.cc
/gem5/src/base/inet.cc
/gem5/src/base/inifile.cc
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/dtb_object.cc
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/raw_object.cc
/gem5/src/base/loader/symtab.cc
/gem5/src/base/match.cc
/gem5/src/base/misc.cc
/gem5/src/base/output.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/random.cc
/gem5/src/base/remote_gdb.cc
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/str.cc
/gem5/src/base/time.cc
/gem5/src/base/trace.cc
/gem5/src/base/vnc/vncinput.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/cpu/activity.cc
/gem5/src/cpu/base.cc
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/dummy_checker.cc
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/func_unit.cc
/gem5/src/cpu/inteltrace.cc
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/kvm/base.cc
/gem5/src/cpu/kvm/perfevent.cc
/gem5/src/cpu/kvm/timer.cc
/gem5/src/cpu/kvm/vm.cc
/gem5/src/cpu/kvm/x86_cpu.cc
/gem5/src/cpu/minor/activity.cc
/gem5/src/cpu/minor/cpu.cc
/gem5/src/cpu/minor/decode.cc
/gem5/src/cpu/minor/dyn_inst.cc
/gem5/src/cpu/minor/execute.cc
/gem5/src/cpu/minor/fetch1.cc
/gem5/src/cpu/minor/fetch2.cc
/gem5/src/cpu/minor/func_unit.cc
/gem5/src/cpu/minor/lsq.cc
/gem5/src/cpu/minor/pipeline.cc
/gem5/src/cpu/minor/scoreboard.cc
/gem5/src/cpu/nativetrace.cc
/gem5/src/cpu/o3/base_dyn_inst.cc
/gem5/src/cpu/o3/checker.cc
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/deriv.cc
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/fu_pool.cc
/gem5/src/cpu/o3/probe/simple_trace.cc
/gem5/src/cpu/o3/regfile.cc
/gem5/src/cpu/o3/rename_map.cc
/gem5/src/cpu/o3/scoreboard.cc
/gem5/src/cpu/o3/store_set.cc
/gem5/src/cpu/o3/thread_context.cc
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/pred/2bit_local.cc
/gem5/src/cpu/pred/bi_mode.cc
/gem5/src/cpu/pred/btb.cc
/gem5/src/cpu/pred/tournament.cc
/gem5/src/cpu/profile.cc
/gem5/src/cpu/quiesce_event.cc
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/probes/simpoint.cc
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple_thread.cc
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/testers/directedtest/DirectedGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.cc
/gem5/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
/gem5/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/rubytest/Check.cc
/gem5/src/cpu/testers/rubytest/CheckTable.cc
/gem5/src/cpu/testers/rubytest/RubyTester.cc
/gem5/src/cpu/thread_context.cc
/gem5/src/cpu/thread_state.cc
/gem5/src/cpu/timing_expr.cc
/gem5/src/dev/alpha/backdoor.cc
/gem5/src/dev/alpha/tsunami.cc
/gem5/src/dev/alpha/tsunami_cchip.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/arm/a9scu.cc
/gem5/src/dev/arm/amba_device.cc
/gem5/src/dev/arm/amba_fake.cc
/gem5/src/dev/arm/energy_ctrl.cc
/gem5/src/dev/arm/gic_pl390.cc
/gem5/src/dev/arm/hdlcd.cc
/gem5/src/dev/arm/kmi.cc
/gem5/src/dev/arm/pl011.cc
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/arm/realview.cc
/gem5/src/dev/arm/rtc_pl031.cc
/gem5/src/dev/arm/timer_cpulocal.cc
/gem5/src/dev/arm/timer_sp804.cc
/gem5/src/dev/arm/vgic.cc
/gem5/src/dev/baddev.cc
/gem5/src/dev/intel_8254_timer.cc
/gem5/src/dev/io_device.cc
/gem5/src/dev/isa_fake.cc
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mips/malta.cc
/gem5/src/dev/mips/malta_cchip.cc
/gem5/src/dev/mips/malta_io.cc
/gem5/src/dev/pci/device.cc
/gem5/src/dev/pci/host.cc
/gem5/src/dev/platform.cc
/gem5/src/dev/ps2.cc
/gem5/src/dev/ps2.hh
/gem5/src/dev/sparc/dtod.cc
/gem5/src/dev/sparc/iob.cc
/gem5/src/dev/sparc/mm_disk.cc
/gem5/src/dev/sparc/t1000.cc
/gem5/src/dev/uart.cc
/gem5/src/dev/uart8250.cc
/gem5/src/dev/virtio/base.cc
/gem5/src/dev/virtio/block.cc
/gem5/src/dev/virtio/console.cc
/gem5/src/dev/virtio/fs9p.cc
/gem5/src/dev/virtio/pci.cc
/gem5/src/dev/x86/cmos.cc
/gem5/src/dev/x86/i8042.cc
/gem5/src/dev/x86/i82094aa.cc
/gem5/src/dev/x86/i8237.cc
/gem5/src/dev/x86/i8254.cc
/gem5/src/dev/x86/i8259.cc
/gem5/src/dev/x86/pc.cc
/gem5/src/dev/x86/south_bridge.cc
/gem5/src/dev/x86/speaker.cc
/gem5/src/kern/linux/linux.cc
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/system_events.cc
/gem5/src/mem/abstract_mem.cc
/gem5/src/mem/bridge.cc
/gem5/src/mem/cache/prefetch/base.cc
/gem5/src/mem/cache/prefetch/queued.cc
/gem5/src/mem/cache/prefetch/stride.cc
/gem5/src/mem/coherent_xbar.cc
/gem5/src/mem/comm_monitor.cc
/gem5/src/mem/dram_ctrl.cc
/gem5/src/mem/drampower.cc
/gem5/src/mem/dramsim2.cc
/gem5/src/mem/dramsim2_wrapper.cc
/gem5/src/mem/external_master.cc
/gem5/src/mem/external_slave.cc
/gem5/src/mem/fs_translating_port_proxy.cc
/gem5/src/mem/hmc_controller.cc
/gem5/src/mem/mem_checker.cc
/gem5/src/mem/mem_checker_monitor.cc
/gem5/src/mem/noncoherent_xbar.cc
/gem5/src/mem/packet.cc
/gem5/src/mem/packet_queue.cc
/gem5/src/mem/page_table.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/port.cc
/gem5/src/mem/port_proxy.cc
/gem5/src/mem/probes/base.cc
/gem5/src/mem/ruby/common/Histogram.cc
/gem5/src/mem/ruby/common/NetDest.cc
/gem5/src/mem/ruby/common/SubBlock.cc
/gem5/src/mem/ruby/filters/BlockBloomFilter.cc
/gem5/src/mem/ruby/filters/BulkBloomFilter.cc
/gem5/src/mem/ruby/filters/H3BloomFilter.cc
/gem5/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
/gem5/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
/gem5/src/mem/ruby/filters/MultiGrainBloomFilter.cc
/gem5/src/mem/ruby/filters/NonCountingBloomFilter.cc
/gem5/src/mem/ruby/network/MessageBuffer.cc
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/Topology.cc
/gem5/src/mem/ruby/network/simple/PerfectSwitch.cc
/gem5/src/mem/ruby/network/simple/PerfectSwitch.hh
/gem5/src/mem/ruby/network/simple/SimpleNetwork.cc
/gem5/src/mem/ruby/network/simple/Switch.cc
/gem5/src/mem/ruby/network/simple/Throttle.cc
/gem5/src/mem/ruby/profiler/AccessTraceForAddress.cc
/gem5/src/mem/ruby/profiler/AddressProfiler.cc
/gem5/src/mem/ruby/profiler/StoreTrace.cc
/gem5/src/mem/ruby/slicc_interface/AbstractController.cc
/gem5/src/mem/ruby/slicc_interface/AbstractController.hh
/gem5/src/mem/ruby/slicc_interface/RubyRequest.cc
/gem5/src/mem/ruby/structures/BankedArray.cc
/gem5/src/mem/ruby/structures/CacheMemory.cc
/gem5/src/mem/ruby/structures/DirectoryMemory.cc
/gem5/src/mem/ruby/structures/LRUPolicy.cc
/gem5/src/mem/ruby/structures/Prefetcher.cc
/gem5/src/mem/ruby/structures/PseudoLRUPolicy.cc
/gem5/src/mem/ruby/structures/WireBuffer.cc
/gem5/src/mem/ruby/system/CacheRecorder.cc
/gem5/src/mem/ruby/system/DMASequencer.cc
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/se_translating_port_proxy.cc
/gem5/src/mem/serial_link.cc
/gem5/src/mem/simple_mem.cc
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/snoop_filter.cc
/gem5/src/mem/tport.cc
/gem5/src/mem/xbar.cc
/gem5/src/proto/protoio.cc
/gem5/src/python/swig/pyevent.cc
/gem5/src/python/swig/pyevent.hh
/gem5/src/python/swig/pyobject.cc
/gem5/src/sim/arguments.cc
/gem5/src/sim/backtrace_glibc.cc
/gem5/src/sim/clock_domain.cc
/gem5/src/sim/core.cc
/gem5/src/sim/cxx_manager.cc
/gem5/src/sim/debug.cc
/gem5/src/sim/dvfs_handler.cc
/gem5/src/sim/faults.cc
/gem5/src/sim/init.cc
/gem5/src/sim/probe/probe.cc
/gem5/src/sim/process.cc
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/py_interact.cc
/gem5/src/sim/root.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/sim_events.cc
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/stat_control.cc
/gem5/src/sim/stat_control.hh
/gem5/src/sim/sub_system.cc
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/system.cc
/gem5/src/sim/voltage_domain.cc
circlebuf.cc
unittest.cc
11320:42ecb523c64a 06-Feb-2016 Steve Reinhardt <steve.reinhardt@amd.com>

style: remove trailing whitespace

Result of running 'hg m5style --skip-all --fix-white -a'.


/gem5/configs/common/CacheConfig.py
/gem5/configs/common/Simulation.py
/gem5/configs/example/ruby_mem_test.py
/gem5/src/arch/alpha/isa/decoder.isa
/gem5/src/arch/alpha/linux/linux.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/arm/SConscript
/gem5/src/arch/arm/interrupts.cc
/gem5/src/arch/arm/isa/bitfields.isa
/gem5/src/arch/arm/isa/formats/pred.isa
/gem5/src/arch/arm/linux/linux.hh
/gem5/src/arch/arm/stacktrace.cc
/gem5/src/arch/mips/isa/decoder.isa
/gem5/src/arch/mips/linux/linux.hh
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/pagetable.hh
/gem5/src/arch/power/SConscript
/gem5/src/arch/sparc/interrupts.cc
/gem5/src/arch/sparc/linux/linux.hh
/gem5/src/arch/sparc/pagetable.hh
/gem5/src/arch/x86/cpuid.cc
/gem5/src/arch/x86/faults.cc
/gem5/src/arch/x86/insts/micromediaop.hh
/gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py
/gem5/src/arch/x86/isa/insts/romutil.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py
/gem5/src/arch/x86/isa/microops/base.isa
/gem5/src/arch/x86/isa/microops/mediaop.isa
/gem5/src/arch/x86/isa/microops/regop.isa
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cp_annotate.hh
/gem5/src/base/cprintf.hh
/gem5/src/base/flags.hh
/gem5/src/base/inet.cc
/gem5/src/base/inet.hh
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/statistics.cc
/gem5/src/cpu/o3/decode_impl.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/testers/directedtest/DirectedGenerator.cc
/gem5/src/cpu/testers/directedtest/DirectedGenerator.hh
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.hh
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.cc
/gem5/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
/gem5/src/cpu/testers/directedtest/SeriesRequestGenerator.hh
/gem5/src/cpu/testers/networktest/networktest.cc
/gem5/src/cpu/timebuf.hh
/gem5/src/dev/mc146818.cc
/gem5/src/dev/net/i8254xGBe.cc
/gem5/src/dev/net/i8254xGBe.hh
/gem5/src/dev/net/i8254xGBe_defs.hh
/gem5/src/dev/x86/i8042.cc
/gem5/src/dev/x86/i8254.hh
/gem5/src/dev/x86/intdev.hh
/gem5/src/mem/mport.hh
/gem5/src/mem/ruby/network/Topology.cc
/gem5/src/mem/ruby/network/Topology.hh
/gem5/src/mem/ruby/network/fault_model/FaultModel.cc
/gem5/src/mem/ruby/network/fault_model/FaultModel.hh
/gem5/src/mem/ruby/network/fault_model/FaultModel.py
/gem5/src/mem/ruby/network/fault_model/SConscript
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetLink.py
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.hh
/gem5/src/mem/ruby/network/simple/SimpleLink.cc
/gem5/src/mem/slicc/ast/StallAndWaitStatementAST.py
/gem5/src/mem/slicc/ast/TypeFieldEnumAST.py
/gem5/src/mem/slicc/ast/TypeFieldStateAST.py
/gem5/src/python/m5/util/__init__.py
/gem5/src/python/swig/event.i
/gem5/src/sim/Root.py
/gem5/src/sim/eventq.cc
/gem5/src/sim/eventq.hh
/gem5/src/sim/insttracer.hh
/gem5/src/sim/pseudo_inst.cc
cprintftest.cc
/gem5/system/alpha/console/console.c
/gem5/tests/configs/memtest-ruby.py
/gem5/util/checkpoint-tester.py
/gem5/util/compile
/gem5/util/m5/m5.c
/gem5/util/qdo
/gem5/util/statetrace/SConstruct
11008:be3b60b52b31 07-Aug-2015 Andreas Sandberg <andreas.sandberg@arm.com>

base: Rewrite the CircleBuf to fix bugs and add serialization

The CircleBuf class has at least one bug causing it to overwrite the
wrong elements when wrapping. The current code has a lot of unused
functionality and duplicated code. This changeset replaces the old
implementation with a new version that supports serialization and
arbitrary types in the buffer (not just char).

10839:10cac0f0f419 23-May-2015 Andreas Sandberg <andreas.sandberg@arm.com>

base: Redesign internal frame buffer handling

Currently, frame buffer handling in gem5 is quite ad hoc. In practice,
we pass around naked pointers to raw pixel data and expect consumers
to convert frame buffers using the (broken) VideoConverter.

This changeset completely redesigns the way we handle frame buffers
internally. In summary, it fixes several color conversion bugs, adds
support for more color formats (e.g., big endian), and makes the code
base easier to follow.

In the new world, gem5 always represents pixel data using the Pixel
struct when pixels need to be passed between different classes (e.g.,
a display controller and the VNC server). Producers of entire frames
(e.g., display controllers) should use the FrameBuffer class to
represent a frame.

Frame producers are expected to create one instance of the FrameBuffer
class in their constructors and register it with its consumers
once. Consumers are expected to check the dimensions of the frame
buffer when they consume it.

Conversion between the external representation and the internal
representation is supported for all common "true color" RGB formats of
up to 32-bit color depth. The external pixel representation is
expected to be between 1 and 4 bytes in either big endian or little
endian. Color channels are assumed to be contiguous ranges of bits
within each pixel word. The external pixel value is scaled to an 8-bit
internal representation using a floating multiplication to map it to
the entire 8-bit range.

10641:04923a93f2b5 07-Jan-2015 Gabe Black <gabeblack@google.com>

test: Add a unittest for the BitUnion types.

10055:6153b582c9b5 30-Jan-2014 Ola Jeppsson <ola.jeppsson@gmail.com>

unittest: Fix build errors

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

9850:87d6b41749e9 04-Sep-2013 Andreas Hansson <andreas.hansson@arm.com>

arch: Resurrect the NOISA build target and rename it NULL

This patch makes it possible to once again build gem5 without any
ISA. The main purpose is to enable work around the interconnect and
memory system without having to build any CPU models or device models.

The regress script is updated to include the NULL ISA target. Currently
no regressions make use of it, but all the testers could (and perhaps
should) transition to it.

9235:5aa4896ed55a 19-Sep-2012 Andreas Hansson <andreas.hansson@arm.com>

AddrRange: Transition from Range<T> to AddrRange

This patch takes the final plunge and transitions from the templated
Range class to the more specific AddrRange. In doing so it changes the
obvious Range<Addr> to AddrRange, and also bumps the range_map to be
AddrRangeMap.

In addition to the obvious changes, including the removal of redundant
includes, this patch also does some house keeping in preparing for the
introduction of address interleaving support in the ranges. The Range
class is also stripped of all the functionality that is never used.

9234:49df6e096beb 19-Sep-2012 Andreas Hansson <andreas.hansson@arm.com>

AddrRange: Simplify Range by removing stream input/output

This patch simplifies the Range class in preparation for the
introduction of a more specific AddrRange class that allows
interleaving/striping.

The only place where the parsing was used was in the unit test.

9233:d45a88688bd7 19-Sep-2012 Andreas Hansson <andreas.hansson@arm.com>

AddrRange: Remove unused range_multimap

This patch simply removes the unused range_multimap in preparation for
a more specific AddrRangeMap that also allows interleaving in addition
to pure ranges.

9047:cf9fb00b6aad 05-Jun-2012 Ali Saidi <Ali.Saidi@ARM.com>

stats: Add stats unittest for total calculations.

9003:37b7913d2d35 10-May-2012 Ali Saidi <Ali.Saidi@ARM.com>

stats: fix compilation of unit test.

8951:4347de090956 15-Apr-2012 Gabe Black <gblack@eecs.umich.edu>

sim: A trie data structure specifically to speed up paging lookups.

This change adds a trie data structure which stores an arbitrary pointer type
based on an address and a number of relevant bits. Then lookups can be done
against the trie where the tree is traversed and the first legitimate match
found is returned.

8514:57c96df312a1 19-Aug-2011 Thomas Grass <Thomas.Grass@ARM.com>

Stats: Add a sparse histogram stat object.

8332:23711432221f 02-Jun-2011 Nathan Binkert <nate@binkert.org>

copyright: clean up copyright blocks


/gem5/src/arch/alpha/kgdb.h
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/generic/debugfaults.hh
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/badmicroop.hh
/gem5/src/arch/x86/isa/formats/nop.isa
/gem5/src/base/random_mt.cc
/gem5/src/base/remote_gdb.cc
/gem5/src/dev/ide_wdcreg.h
/gem5/src/dev/sparc/dtod.hh
/gem5/src/mem/ruby/network/orion/Allocator/Arbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/Arbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/MatrixArbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/MatrixArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/SWAllocator.cc
/gem5/src/mem/ruby/network/orion/Allocator/SWAllocator.hh
/gem5/src/mem/ruby/network/orion/Allocator/VCAllocator.cc
/gem5/src/mem/ruby/network/orion/Allocator/VCAllocator.hh
/gem5/src/mem/ruby/network/orion/Buffer/AmpUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/AmpUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/BitlineUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/BitlineUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/Buffer.cc
/gem5/src/mem/ruby/network/orion/Buffer/Buffer.hh
/gem5/src/mem/ruby/network/orion/Buffer/DecoderUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/DecoderUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/MemUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/MemUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/OutdrvUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/OutdrvUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/PrechargeUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/PrechargeUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/Register.cc
/gem5/src/mem/ruby/network/orion/Buffer/Register.hh
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.hh
/gem5/src/mem/ruby/network/orion/Buffer/WordlineUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/WordlineUnit.hh
/gem5/src/mem/ruby/network/orion/Clock.cc
/gem5/src/mem/ruby/network/orion/Clock.hh
/gem5/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/Crossbar.hh
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh
/gem5/src/mem/ruby/network/orion/FlipFlop.cc
/gem5/src/mem/ruby/network/orion/FlipFlop.hh
/gem5/src/mem/ruby/network/orion/OrionLink.cc
/gem5/src/mem/ruby/network/orion/OrionLink.hh
/gem5/src/mem/ruby/network/orion/OrionRouter.cc
/gem5/src/mem/ruby/network/orion/OrionRouter.hh
/gem5/src/mem/ruby/network/orion/TechParameter.cc
/gem5/src/mem/ruby/network/orion/TechParameter.hh
/gem5/src/mem/ruby/network/orion/Type.hh
/gem5/src/mem/ruby/network/orion/Wire.cc
/gem5/src/mem/ruby/network/orion/Wire.hh
/gem5/src/sim/fault_fwd.hh
/gem5/src/sim/root.cc
/gem5/src/sim/root.hh
unittest.cc
unittest.hh
8235:6381dc8bcfcc 15-Apr-2011 Nathan Binkert <nate@binkert.org>

unittest: Make unit tests capable of using swig and python, convert stattest

8229:78bf55f23338 15-Apr-2011 Nathan Binkert <nate@binkert.org>

includes: sort all includes


/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/isa.hh
/gem5/src/arch/alpha/isa/main.isa
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/mt.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/remote_gdb.hh
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/faults.hh
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/intregs.hh
/gem5/src/arch/arm/isa/includes.isa
/gem5/src/arch/arm/linux/atag.hh
/gem5/src/arch/arm/linux/linux.cc
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/process.hh
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/locked_mem.hh
/gem5/src/arch/arm/pagetable.hh
/gem5/src/arch/arm/predecoder.hh
/gem5/src/arch/arm/process.hh
/gem5/src/arch/arm/registers.hh
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/system.hh
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/vtophys.hh
/gem5/src/arch/generic/debugfaults.hh
/gem5/src/arch/generic/types.hh
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/isa.hh
/gem5/src/arch/mips/isa/includes.isa
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/linux.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/process.hh
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/system.hh
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/mips/vtophys.hh
/gem5/src/arch/power/insts/floating.hh
/gem5/src/arch/power/insts/integer.hh
/gem5/src/arch/power/isa/includes.isa
/gem5/src/arch/power/linux/linux.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/linux/process.hh
/gem5/src/arch/power/process.hh
/gem5/src/arch/power/tlb.hh
/gem5/src/arch/power/vtophys.hh
/gem5/src/arch/sparc/isa.hh
/gem5/src/arch/sparc/isa/includes.isa
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/linux.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/locked_mem.hh
/gem5/src/arch/sparc/mmapped_ipr.hh
/gem5/src/arch/sparc/nativetrace.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/remote_gdb.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/solaris/solaris.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/tlb_map.hh
/gem5/src/arch/sparc/types.hh
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/macroop.hh
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/micromediaop.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/interrupts.hh
/gem5/src/arch/x86/isa.hh
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/linux/linux.cc
/gem5/src/arch/x86/linux/process.cc
/gem5/src/arch/x86/linux/process.hh
/gem5/src/arch/x86/linux/syscalls.cc
/gem5/src/arch/x86/linux/system.cc
/gem5/src/arch/x86/linux/system.hh
/gem5/src/arch/x86/microcode_rom.hh
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.hh
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/arch/x86/registers.hh
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cp_annotate.hh
/gem5/src/base/cprintf.hh
/gem5/src/base/debug.cc
/gem5/src/base/fast_alloc.hh
/gem5/src/base/fenv.c
/gem5/src/base/hostinfo.cc
/gem5/src/base/inet.hh
/gem5/src/base/inifile.cc
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/symtab.cc
/gem5/src/base/misc.cc
/gem5/src/base/mysql.hh
/gem5/src/base/output.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/pollevent.hh
/gem5/src/base/range_map.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/base/remote_gdb.hh
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/info.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/stats/text.hh
/gem5/src/base/str.hh
/gem5/src/base/time.hh
/gem5/src/base/trace.cc
/gem5/src/base/vnc/convert.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/base/vnc/vncserver.hh
/gem5/src/cpu/activity.cc
/gem5/src/cpu/activity.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/base_dyn_inst_impl.hh
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/checker/cpu.hh
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/cpuevent.hh
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/func_unit.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/first_stage.cc
/gem5/src/cpu/inorder/first_stage.hh
/gem5/src/cpu/inorder/inorder_cpu_builder.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.hh
/gem5/src/cpu/inorder/inorder_trace.cc
/gem5/src/cpu/inorder/pipeline_stage.cc
/gem5/src/cpu/inorder/pipeline_stage.hh
/gem5/src/cpu/inorder/pipeline_traits.5stage.cc
/gem5/src/cpu/inorder/pipeline_traits.5stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.hh
/gem5/src/cpu/inorder/pipeline_traits.hh
/gem5/src/cpu/inorder/reg_dep_map.cc
/gem5/src/cpu/inorder/resource.cc
/gem5/src/cpu/inorder/resource.hh
/gem5/src/cpu/inorder/resource_pool.9stage.cc
/gem5/src/cpu/inorder/resource_pool.cc
/gem5/src/cpu/inorder/resource_pool.hh
/gem5/src/cpu/inorder/resource_sked.cc
/gem5/src/cpu/inorder/resource_sked.hh
/gem5/src/cpu/inorder/resources/agen_unit.hh
/gem5/src/cpu/inorder/resources/bpred_unit.hh
/gem5/src/cpu/inorder/resources/branch_predictor.hh
/gem5/src/cpu/inorder/resources/cache_unit.cc
/gem5/src/cpu/inorder/resources/cache_unit.hh
/gem5/src/cpu/inorder/resources/decode_unit.hh
/gem5/src/cpu/inorder/resources/execution_unit.cc
/gem5/src/cpu/inorder/resources/execution_unit.hh
/gem5/src/cpu/inorder/resources/fetch_seq_unit.hh
/gem5/src/cpu/inorder/resources/fetch_unit.cc
/gem5/src/cpu/inorder/resources/fetch_unit.hh
/gem5/src/cpu/inorder/resources/graduation_unit.hh
/gem5/src/cpu/inorder/resources/inst_buffer.cc
/gem5/src/cpu/inorder/resources/inst_buffer.hh
/gem5/src/cpu/inorder/resources/mem_dep_unit.hh
/gem5/src/cpu/inorder/resources/mult_div_unit.cc
/gem5/src/cpu/inorder/resources/mult_div_unit.hh
/gem5/src/cpu/inorder/resources/resource_list.hh
/gem5/src/cpu/inorder/resources/tlb_unit.cc
/gem5/src/cpu/inorder/resources/tlb_unit.hh
/gem5/src/cpu/inorder/resources/use_def.cc
/gem5/src/cpu/inorder/resources/use_def.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/inorder/thread_state.cc
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/intr_control.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/base_dyn_inst.cc
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/bpred_unit_impl.hh
/gem5/src/cpu/o3/checker_builder.cc
/gem5/src/cpu/o3/commit.cc
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/cpu_policy.hh
/gem5/src/cpu/o3/decode.cc
/gem5/src/cpu/o3/dyn_inst.hh
/gem5/src/cpu/o3/fetch.cc
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/fu_pool.hh
/gem5/src/cpu/o3/iew.cc
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/impl.hh
/gem5/src/cpu/o3/inst_queue.cc
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/isa_specific.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/o3/scoreboard.hh
/gem5/src/cpu/o3/thread_context.cc
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/back_end_impl.hh
/gem5/src/cpu/ozone/base_dyn_inst.cc
/gem5/src/cpu/ozone/checker_builder.cc
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_builder.cc
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/dyn_inst.hh
/gem5/src/cpu/ozone/dyn_inst_impl.hh
/gem5/src/cpu/ozone/ea_list.cc
/gem5/src/cpu/ozone/front_end.hh
/gem5/src/cpu/ozone/front_end_impl.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/inorder_back_end_impl.hh
/gem5/src/cpu/ozone/inst_queue.cc
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/inst_queue_impl.hh
/gem5/src/cpu/ozone/lsq_unit.cc
/gem5/src/cpu/ozone/lsq_unit.hh
/gem5/src/cpu/ozone/lw_back_end.hh
/gem5/src/cpu/ozone/lw_lsq.cc
/gem5/src/cpu/ozone/lw_lsq.hh
/gem5/src/cpu/ozone/lw_lsq_impl.hh
/gem5/src/cpu/ozone/ozone_base_dyn_inst.cc
/gem5/src/cpu/ozone/ozone_impl.hh
/gem5/src/cpu/ozone/rename_table.cc
/gem5/src/cpu/ozone/simple_base_dyn_inst.cc
/gem5/src/cpu/ozone/simple_cpu_builder.cc
/gem5/src/cpu/ozone/simple_impl.hh
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/profile.cc
/gem5/src/cpu/profile.hh
/gem5/src/cpu/quiesce_event.cc
/gem5/src/cpu/sched_list.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.hh
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.hh
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/memtest/memtest.hh
/gem5/src/cpu/testers/networktest/networktest.cc
/gem5/src/cpu/testers/networktest/networktest.hh
/gem5/src/cpu/testers/rubytest/CheckTable.cc
/gem5/src/cpu/testers/rubytest/RubyTester.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/cpu/thread_state.hh
/gem5/src/cpu/trace/opt_cpu.cc
/gem5/src/cpu/trace/reader/ibm_reader.hh
/gem5/src/cpu/trace/reader/itx_reader.hh
/gem5/src/cpu/trace/reader/mem_trace_reader.hh
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/dev/alpha/tsunami.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/alpha/tsunami_io.hh
/gem5/src/dev/alpha/tsunami_pchip.cc
/gem5/src/dev/arm/amba_device.cc
/gem5/src/dev/arm/amba_device.hh
/gem5/src/dev/arm/kmi.cc
/gem5/src/dev/arm/kmi.hh
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/etherbus.hh
/gem5/src/dev/etherdump.hh
/gem5/src/dev/etherint.cc
/gem5/src/dev/etherlink.cc
/gem5/src/dev/etherlink.hh
/gem5/src/dev/ethertap.cc
/gem5/src/dev/ethertap.hh
/gem5/src/dev/ide_ctrl.hh
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/io_device.cc
/gem5/src/dev/isa_fake.hh
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mips/malta.cc
/gem5/src/dev/mips/malta_cchip.hh
/gem5/src/dev/mips/malta_io.cc
/gem5/src/dev/mips/malta_pchip.cc
/gem5/src/dev/mips/malta_pchip.hh
/gem5/src/dev/pciconfigall.hh
/gem5/src/dev/platform.hh
/gem5/src/dev/ps2.cc
/gem5/src/dev/simple_disk.hh
/gem5/src/dev/sparc/iob.cc
/gem5/src/dev/sparc/iob.hh
/gem5/src/dev/sparc/mm_disk.cc
/gem5/src/dev/sparc/mm_disk.hh
/gem5/src/dev/terminal.cc
/gem5/src/dev/terminal.hh
/gem5/src/dev/x86/i8042.hh
/gem5/src/dev/x86/i82094aa.hh
/gem5/src/dev/x86/i8259.hh
/gem5/src/dev/x86/intdev.hh
/gem5/src/dev/x86/pc.cc
/gem5/src/dev/x86/south_bridge.hh
/gem5/src/kern/kernel_stats.cc
/gem5/src/kern/kernel_stats.hh
/gem5/src/kern/linux/events.cc
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/printf.cc
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/mem/bridge.hh
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/builder.cc
/gem5/src/mem/cache/cache.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr_queue.hh
/gem5/src/mem/cache/prefetch/base.cc
/gem5/src/mem/cache/prefetch/stride.hh
/gem5/src/mem/cache/tags/base.cc
/gem5/src/mem/cache/tags/base.hh
/gem5/src/mem/cache/tags/cacheset.hh
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/iic.hh
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/cache/tags/lru.cc
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/packet.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/ruby/buffers/MessageBuffer.hh
/gem5/src/mem/ruby/common/NetDest.cc
/gem5/src/mem/ruby/common/Set.hh
/gem5/src/mem/ruby/filters/GenericBloomFilter.hh
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/garnet/BaseGarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh
/gem5/src/mem/ruby/network/orion/Allocator/Arbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/MatrixArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/SWAllocator.cc
/gem5/src/mem/ruby/network/orion/Allocator/VCAllocator.cc
/gem5/src/mem/ruby/network/orion/Buffer/Buffer.cc
/gem5/src/mem/ruby/network/orion/Buffer/DecoderUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/OutdrvUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/PrechargeUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/Register.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.hh
/gem5/src/mem/ruby/network/orion/Buffer/WordlineUnit.cc
/gem5/src/mem/ruby/network/orion/Clock.cc
/gem5/src/mem/ruby/network/orion/ConfigFile.hh
/gem5/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh
/gem5/src/mem/ruby/network/orion/FlipFlop.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.hh
/gem5/src/mem/ruby/network/orion/OrionConfig.cc
/gem5/src/mem/ruby/network/orion/OrionConfig.hh
/gem5/src/mem/ruby/network/orion/OrionLink.cc
/gem5/src/mem/ruby/network/orion/OrionRouter.cc
/gem5/src/mem/ruby/network/orion/TechParameter.cc
/gem5/src/mem/ruby/network/orion/Wire.cc
/gem5/src/mem/ruby/network/orion/orion.hh
/gem5/src/mem/ruby/network/simple/PerfectSwitch.hh
/gem5/src/mem/ruby/network/simple/Switch.cc
/gem5/src/mem/ruby/network/simple/Throttle.cc
/gem5/src/mem/ruby/network/simple/Throttle.hh
/gem5/src/mem/ruby/network/simple/Topology.cc
/gem5/src/mem/ruby/profiler/CacheProfiler.hh
/gem5/src/mem/ruby/profiler/Profiler.cc
/gem5/src/mem/ruby/profiler/Profiler.hh
/gem5/src/mem/ruby/recorder/CacheRecorder.cc
/gem5/src/mem/ruby/recorder/CacheRecorder.hh
/gem5/src/mem/ruby/recorder/Tracer.hh
/gem5/src/mem/ruby/slicc_interface/AbstractEntry.hh
/gem5/src/mem/ruby/slicc_interface/RubyRequest.hh
/gem5/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc
/gem5/src/mem/ruby/slicc_interface/RubySlicc_includes.hh
/gem5/src/mem/ruby/system/CacheMemory.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/RubyPort.hh
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/Sequencer.hh
/gem5/src/mem/ruby/system/WireBuffer.hh
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/tport.hh
/gem5/src/mem/translating_port.cc
/gem5/src/mem/vport.hh
/gem5/src/python/swig/core.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/inet.i
/gem5/src/python/swig/pyobject.cc
/gem5/src/python/swig/sim_object.i
/gem5/src/python/swig/stats.i
/gem5/src/python/swig/system.i
/gem5/src/sim/faults.cc
/gem5/src/sim/faults.hh
/gem5/src/sim/init.cc
/gem5/src/sim/process.cc
/gem5/src/sim/process_impl.hh
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/stat_control.cc
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.cc
/gem5/src/sim/tlb.cc
/gem5/src/sim/vptr.hh
cprintftest.cc
cprintftime.cc
initest.cc
rangemaptest.cc
stattest.cc
symtest.cc
/gem5/util/ccdrv/devtime.c
/gem5/util/m5/m5.c
/gem5/util/statetrace/arch/amd64/tracechild.cc
/gem5/util/statetrace/arch/amd64/tracechild.hh
/gem5/util/statetrace/arch/arm/tracechild.cc
/gem5/util/statetrace/arch/arm/tracechild.hh
/gem5/util/statetrace/arch/i686/tracechild.cc
/gem5/util/statetrace/arch/i686/tracechild.hh
/gem5/util/statetrace/arch/sparc/tracechild.cc
/gem5/util/statetrace/arch/sparc/tracechild.hh
/gem5/util/statetrace/base/regstate.hh
/gem5/util/statetrace/base/statetrace.cc
/gem5/util/statetrace/base/tracechild.cc
/gem5/util/tap/tap.cc
/gem5/util/term/term.c
7842:4c0f7929ee33 18-Jan-2011 Gabe Black <gblack@eecs.umich.edu>

Unit tests: Convert the refcnttest unit test to use the new EXPECT macros.

7841:703fbf20c620 18-Jan-2011 Gabe Black <gblack@eecs.umich.edu>

Unit tests: Define a header file for common unit testing functions/macros.

7831:c1e158414648 10-Jan-2011 Nathan Binkert <nate@binkert.org>

stats: Add a histogram statistic type

7830:8bdcec97b36b 10-Jan-2011 Nathan Binkert <nate@binkert.org>

stats: fix stat test from curTick change

7824:b36af60dcb91 10-Jan-2011 Gabe Black <gblack@eecs.umich.edu>

RefCount: Add a unit test for reference counting pointers.

This test exercises each of the functions in the reference counting pointer
implementation individually (except get()) and verifies they have some
minimially expected behavior. It also checks that reference counted objects
are freed when their usage count goes to 0 in some basic situations,
specifically a pointer being set to NULL and a pointer being deleted.

7823:dac01f14f20f 08-Jan-2011 Steve Reinhardt <steve.reinhardt@amd.com>

Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.


/gem5/src/arch/alpha/isa/decoder.isa
/gem5/src/arch/alpha/kernel_stats.cc
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/isa/formats/mt.isa
/gem5/src/arch/mips/locked_mem.hh
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/sparc/ua2005.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cp_annotate.hh
/gem5/src/base/fast_alloc.cc
/gem5/src/base/misc.cc
/gem5/src/base/remote_gdb.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/base/trace.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/inorder_dyn_inst.cc
/gem5/src/cpu/inorder/pipeline_stage.cc
/gem5/src/cpu/inorder/reg_dep_map.cc
/gem5/src/cpu/inorder/resource.cc
/gem5/src/cpu/inorder/resource_pool.9stage.cc
/gem5/src/cpu/inorder/resource_pool.cc
/gem5/src/cpu/inorder/resources/branch_predictor.cc
/gem5/src/cpu/inorder/resources/cache_unit.cc
/gem5/src/cpu/inorder/resources/execution_unit.cc
/gem5/src/cpu/inorder/resources/fetch_seq_unit.cc
/gem5/src/cpu/inorder/resources/graduation_unit.cc
/gem5/src/cpu/inorder/resources/mult_div_unit.cc
/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/inst_queue_impl.hh
/gem5/src/cpu/o3/lsq_impl.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/o3/thread_context_impl.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/front_end_impl.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/inst_queue_impl.hh
/gem5/src/cpu/ozone/lsq_unit.hh
/gem5/src/cpu/ozone/lsq_unit_impl.hh
/gem5/src/cpu/ozone/lw_back_end_impl.hh
/gem5/src/cpu/ozone/lw_lsq.hh
/gem5/src/cpu/ozone/lw_lsq_impl.hh
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple_thread.cc
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.cc
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/rubytest/Check.cc
/gem5/src/cpu/testers/rubytest/RubyTester.cc
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/dev/alpha/backdoor.cc
/gem5/src/dev/arm/pl011.cc
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/arm/rv_ctrl.cc
/gem5/src/dev/arm/timer_sp804.cc
/gem5/src/dev/etherbus.cc
/gem5/src/dev/etherdump.cc
/gem5/src/dev/etherlink.cc
/gem5/src/dev/ethertap.cc
/gem5/src/dev/i8254xGBe.cc
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/intel_8254_timer.cc
/gem5/src/dev/io_device.cc
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mc146818.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/sinic.cc
/gem5/src/dev/uart8250.cc
/gem5/src/kern/kernel_stats.cc
/gem5/src/mem/bridge.cc
/gem5/src/mem/bus.cc
/gem5/src/mem/cache/base.cc
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/mshr.hh
/gem5/src/mem/cache/mshr_queue.hh
/gem5/src/mem/cache/tags/fa_lru.cc
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/lru.cc
/gem5/src/mem/dram.cc
/gem5/src/mem/mport.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/request.hh
/gem5/src/mem/ruby/eventqueue/RubyEventQueue.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/System.cc
/gem5/src/mem/tport.cc
/gem5/src/mem/tport.hh
/gem5/src/python/m5/simulate.py
/gem5/src/python/swig/core.i
/gem5/src/python/swig/stats.i
/gem5/src/sim/core.cc
/gem5/src/sim/core.hh
/gem5/src/sim/eventq.cc
/gem5/src/sim/eventq.hh
/gem5/src/sim/init.cc
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/sim_events.cc
/gem5/src/sim/sim_exit.hh
/gem5/src/sim/sim_object.hh
/gem5/src/sim/simulate.cc
/gem5/src/sim/stat_control.cc
/gem5/src/sim/stat_control.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
stattest.cc
7768:cdb18c1b51ea 19-Nov-2010 Ali Saidi <Ali.Saidi@ARM.com>

SCons: Support building without an ISA

7504:ad631c296c9b 21-Jul-2010 Nathan Binkert <nate@binkert.org>

stats: cleanup a few small problems in stats

6216:2f4020838149 17-May-2009 Nathan Binkert <nate@binkert.org>

includes: sort includes again


/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/predecoder.hh
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/predecoder.hh
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/arch/x86/intmessage.hh
/gem5/src/arch/x86/miscregfile.hh
/gem5/src/arch/x86/pagetable.hh
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.cc
/gem5/src/arch/x86/regfile.hh
/gem5/src/arch/x86/utility.hh
/gem5/src/arch/x86/x86_traits.hh
/gem5/src/base/cp_annotate.hh
/gem5/src/base/crc.cc
/gem5/src/base/inet.cc
/gem5/src/base/inet.hh
/gem5/src/base/intmath.hh
/gem5/src/base/misc.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/res_list.hh
/gem5/src/base/statistics.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/cpu/exetrace.hh
/gem5/src/cpu/inorder/comm.hh
/gem5/src/cpu/inorder/inorder_trace.hh
/gem5/src/cpu/inteltrace.hh
/gem5/src/cpu/legiontrace.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/2bit_local_pred.hh
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/comm.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/ras.hh
/gem5/src/cpu/o3/store_set.hh
/gem5/src/cpu/o3/tournament_pred.hh
/gem5/src/cpu/ozone/ea_list.hh
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/null_predictor.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/dev/alpha/backdoor.hh
/gem5/src/dev/etherlink.hh
/gem5/src/dev/etherpkt.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/mips/backdoor.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/sinic.cc
/gem5/src/dev/x86/intdev.hh
/gem5/src/dev/x86/south_bridge.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/mbuf.hh
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/tags/fa_lru.cc
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/gems_common/util.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.hh
/gem5/src/mem/physical.cc
/gem5/src/mem/ruby/common/Debug.hh
/gem5/src/mem/ruby/common/Global.hh
/gem5/src/mem/ruby/network/orion/power_ll.cc
/gem5/src/mem/ruby/network/orion/power_utils.cc
/gem5/src/mem/rubymem.cc
/gem5/src/mem/slicc/slicc_global.hh
/gem5/src/python/swig/core.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/pyobject.hh
/gem5/src/python/swig/sim_object.i
/gem5/src/sim/arguments.hh
/gem5/src/sim/eventq.hh
/gem5/src/sim/init.cc
/gem5/src/sim/insttracer.hh
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/syscall_emul.hh
rangemaptest.cc
rangemultimaptest.cc
/gem5/util/statetrace/arch/tracechild_amd64.hh
/gem5/util/statetrace/arch/tracechild_i386.hh
/gem5/util/statetrace/arch/tracechild_sparc.hh
6214:1ec0ec8933ae 17-May-2009 Nathan Binkert <nate@binkert.org>

types: Move stuff for global types into src/base/types.hh


/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/miscregfile.hh
/gem5/src/arch/alpha/predecoder.hh
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/arm/isa_traits.hh
/gem5/src/arch/arm/predecoder.hh
/gem5/src/arch/arm/types.hh
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/predecoder.hh
/gem5/src/arch/mips/types.hh
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/predecoder.hh
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/arch/x86/intmessage.hh
/gem5/src/arch/x86/isa_traits.hh
/gem5/src/arch/x86/miscregfile.hh
/gem5/src/arch/x86/pagetable.hh
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.cc
/gem5/src/arch/x86/predecoder.hh
/gem5/src/arch/x86/regfile.hh
/gem5/src/arch/x86/utility.hh
/gem5/src/arch/x86/vtophys.hh
/gem5/src/arch/x86/x86_traits.hh
/gem5/src/base/cp_annotate.hh
/gem5/src/base/crc.cc
/gem5/src/base/crc.hh
/gem5/src/base/fast_alloc.hh
/gem5/src/base/hashmap.hh
/gem5/src/base/hostinfo.cc
/gem5/src/base/hostinfo.hh
/gem5/src/base/inet.cc
/gem5/src/base/inet.hh
/gem5/src/base/intmath.hh
/gem5/src/base/loader/hex_file.hh
/gem5/src/base/loader/object_file.hh
/gem5/src/base/loader/symtab.cc
/gem5/src/base/loader/symtab.hh
/gem5/src/base/misc.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/random.hh
/gem5/src/base/socket.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/events.cc
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/mysql_run.hh
/gem5/src/base/stats/output.cc
/gem5/src/base/stats/types.hh
/gem5/src/base/stats/visit.hh
/gem5/src/base/trace.hh
/gem5/src/base/types.hh
/gem5/src/cpu/exetrace.hh
/gem5/src/cpu/inorder/comm.hh
/gem5/src/cpu/inorder/inorder_trace.hh
/gem5/src/cpu/inteltrace.hh
/gem5/src/cpu/legiontrace.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/2bit_local_pred.hh
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/btb.hh
/gem5/src/cpu/o3/comm.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/ras.hh
/gem5/src/cpu/o3/sat_counter.hh
/gem5/src/cpu/o3/store_set.hh
/gem5/src/cpu/o3/tournament_pred.hh
/gem5/src/cpu/ozone/ea_list.hh
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/null_predictor.hh
/gem5/src/cpu/pc_event.hh
/gem5/src/cpu/profile.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/dev/alpha/backdoor.hh
/gem5/src/dev/etherlink.hh
/gem5/src/dev/etherpkt.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/mips/backdoor.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/sinic.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/mbuf.hh
/gem5/src/kern/tru64/printf.cc
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.hh
/gem5/src/mem/physical.cc
/gem5/src/mem/request.hh
/gem5/src/mem/rubymem.cc
/gem5/src/python/m5/params.py
/gem5/src/python/swig/core.i
/gem5/src/python/swig/debug.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/pyobject.hh
/gem5/src/python/swig/random.i
/gem5/src/python/swig/range.i
/gem5/src/python/swig/sim_object.i
/gem5/src/python/swig/trace.i
/gem5/src/sim/arguments.hh
/gem5/src/sim/byteswap.hh
/gem5/src/sim/core.hh
/gem5/src/sim/debug.hh
/gem5/src/sim/eventq.hh
/gem5/src/sim/host.hh
/gem5/src/sim/init.cc
/gem5/src/sim/insttracer.hh
/gem5/src/sim/process.hh
/gem5/src/sim/pseudo_inst.hh
/gem5/src/sim/serialize.hh
/gem5/src/sim/sim_exit.hh
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/simulate.hh
/gem5/src/sim/syscall_emul.hh
rangemaptest.cc
rangemultimaptest.cc
stattest.cc
6020:0647c8b31a99 06-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

Merge ARM into the head. ARM will compile but may not actually work.


/gem5/ext/dnet/dnet/addr.h
/gem5/ext/dnet/dnet/arp.h
/gem5/ext/dnet/dnet/blob.h
/gem5/ext/dnet/dnet/eth.h
/gem5/ext/dnet/dnet/fw.h
/gem5/ext/dnet/dnet/icmp.h
/gem5/ext/dnet/dnet/intf.h
/gem5/ext/dnet/dnet/ip.h
/gem5/ext/dnet/dnet/ip6.h
/gem5/ext/dnet/dnet/os.h
/gem5/ext/dnet/dnet/rand.h
/gem5/ext/dnet/dnet/route.h
/gem5/ext/dnet/dnet/tcp.h
/gem5/ext/dnet/dnet/udp.h
/gem5/src/arch/alpha/syscallreturn.hh
/gem5/src/arch/arm/ArmTLB.py
/gem5/src/arch/arm/isa_traits.hh
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/process.hh
/gem5/src/arch/arm/regfile/regfile.cc
/gem5/src/arch/arm/regfile/regfile.hh
/gem5/src/arch/arm/syscallreturn.hh
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/mips/syscallreturn.hh
/gem5/src/arch/sparc/syscallreturn.hh
/gem5/src/arch/x86/isa/insts/general_purpose/processor_information.py
/gem5/src/arch/x86/smbios.cc
/gem5/src/arch/x86/smbios.hh
/gem5/src/arch/x86/syscallreturn.hh
/gem5/src/base/annotate.cc
/gem5/src/base/annotate.hh
/gem5/src/base/stats/statdb.cc
/gem5/src/base/stats/statdb.hh
/gem5/src/cpu/o3/alpha/cpu.cc
/gem5/src/cpu/o3/alpha/cpu.hh
/gem5/src/cpu/o3/alpha/cpu_builder.cc
/gem5/src/cpu/o3/alpha/cpu_impl.hh
/gem5/src/cpu/o3/alpha/dyn_inst.cc
/gem5/src/cpu/o3/alpha/dyn_inst.hh
/gem5/src/cpu/o3/alpha/dyn_inst_impl.hh
/gem5/src/cpu/o3/alpha/impl.hh
/gem5/src/cpu/o3/alpha/params.hh
/gem5/src/cpu/o3/alpha/thread_context.cc
/gem5/src/cpu/o3/alpha/thread_context.hh
/gem5/src/cpu/o3/mips/cpu.cc
/gem5/src/cpu/o3/mips/cpu.hh
/gem5/src/cpu/o3/mips/cpu_builder.cc
/gem5/src/cpu/o3/mips/cpu_impl.hh
/gem5/src/cpu/o3/mips/dyn_inst.cc
/gem5/src/cpu/o3/mips/dyn_inst.hh
/gem5/src/cpu/o3/mips/dyn_inst_impl.hh
/gem5/src/cpu/o3/mips/impl.hh
/gem5/src/cpu/o3/mips/params.hh
/gem5/src/cpu/o3/mips/thread_context.cc
/gem5/src/cpu/o3/mips/thread_context.hh
/gem5/src/cpu/o3/params.hh
/gem5/src/cpu/o3/sparc/cpu.cc
/gem5/src/cpu/o3/sparc/cpu.hh
/gem5/src/cpu/o3/sparc/cpu_builder.cc
/gem5/src/cpu/o3/sparc/cpu_impl.hh
/gem5/src/cpu/o3/sparc/dyn_inst.cc
/gem5/src/cpu/o3/sparc/dyn_inst.hh
/gem5/src/cpu/o3/sparc/dyn_inst_impl.hh
/gem5/src/cpu/o3/sparc/impl.hh
/gem5/src/cpu/o3/sparc/params.hh
/gem5/src/cpu/o3/sparc/thread_context.cc
/gem5/src/cpu/o3/sparc/thread_context.hh
/gem5/src/dev/SimConsole.py
/gem5/src/dev/alpha/AlphaConsole.py
/gem5/src/dev/alpha/console.cc
/gem5/src/dev/alpha/console.hh
/gem5/src/dev/mips/MipsConsole.py
/gem5/src/dev/mips/console.cc
/gem5/src/dev/mips/console.hh
/gem5/src/dev/pitreg.h
/gem5/src/dev/simconsole.cc
/gem5/src/dev/simconsole.hh
/gem5/src/dev/x86/Opteron.py
/gem5/src/dev/x86/opteron.cc
/gem5/src/dev/x86/opteron.hh
/gem5/src/mem/cache/tags/split.cc
/gem5/src/mem/cache/tags/split.hh
/gem5/src/mem/cache/tags/split_blk.hh
/gem5/src/mem/cache/tags/split_lifo.cc
/gem5/src/mem/cache/tags/split_lifo.hh
/gem5/src/mem/cache/tags/split_lru.cc
/gem5/src/mem/cache/tags/split_lru.hh
/gem5/src/mem/config/prefetch.hh
/gem5/src/python/generate.py
/gem5/src/python/m5/attrdict.py
/gem5/src/python/m5/multidict.py
/gem5/src/python/m5/util.py
/gem5/src/python/swig/init.hh
Makefile
initest.ini
lru_test.cc
offtest.cc
paramtest.cc
rangemaptest2.cc
sized_test.cc
tracetest.cc
/gem5/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt
/gem5/tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr
/gem5/tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr
/gem5/tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout
/gem5/tests/long/00.gzip/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/long/00.gzip/ref/x86/linux/simple-atomic/stderr
/gem5/tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-timing/stderr
/gem5/tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout
/gem5/tests/long/10.mcf/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/long/10.mcf/ref/x86/linux/simple-atomic/stderr
/gem5/tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout
/gem5/tests/long/20.parser/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/long/20.parser/ref/x86/linux/simple-atomic/stderr
/gem5/tests/long/20.parser/ref/x86/linux/simple-atomic/stdout
/gem5/tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr
/gem5/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
/gem5/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/60.bzip2/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stderr
/gem5/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout
/gem5/tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-timing/stderr
/gem5/tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout
/gem5/tests/long/70.twolf/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/long/70.twolf/ref/x86/linux/simple-atomic/stderr
/gem5/tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout
/gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/console.system.t1000.hconsole
/gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/console.system.t1000.pconsole
/gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/m5stats.txt
/gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stderr
/gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
/gem5/tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr
/gem5/tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr
/gem5/tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout
/gem5/tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr
/gem5/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr
/gem5/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout
/gem5/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt
/gem5/tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr
/gem5/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout
/gem5/tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/mips/linux/simple-timing/stderr
/gem5/tests/quick/00.hello/ref/mips/linux/simple-timing/stdout
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-timing/stderr
/gem5/tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout
/gem5/tests/quick/00.hello/ref/x86/linux/simple-atomic/m5stats.txt
/gem5/tests/quick/00.hello/ref/x86/linux/simple-atomic/stderr
/gem5/tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout
/gem5/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt
/gem5/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr
/gem5/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout
/gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt
/gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr
/gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr
/gem5/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/console.system.sim_console
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
/gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
/gem5/tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt
/gem5/tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr
/gem5/tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr
/gem5/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
/gem5/tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt
/gem5/tests/quick/50.memtest/ref/alpha/linux/memtest/stderr
/gem5/tests/quick/50.memtest/ref/alpha/linux/memtest/stdout
/gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console
/gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console
/gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt
/gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr
/gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout
/gem5/util/batch/jobfile.py
/gem5/util/pbs/jobfile.py
/gem5/util/stats/orderdict.py
5999:3cf8e71257e0 05-Mar-2009 Nathan Binkert <nate@binkert.org>

stats: Fix all stats usages to deal with template fixes


/gem5/src/arch/alpha/kernel_stats.hh
/gem5/src/arch/alpha/tlb.hh
/gem5/src/arch/mips/tlb.hh
/gem5/src/base/hybrid_pred.hh
/gem5/src/base/sat_counter.hh
/gem5/src/cpu/base.hh
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/pipeline_stage.hh
/gem5/src/cpu/inorder/resource.hh
/gem5/src/cpu/inorder/resources/bpred_unit.hh
/gem5/src/cpu/inorder/resources/branch_predictor.hh
/gem5/src/cpu/inorder/resources/execution_unit.hh
/gem5/src/cpu/inorder/resources/inst_buffer.hh
/gem5/src/cpu/inorder/resources/mult_div_unit.hh
/gem5/src/cpu/memtest/memtest.hh
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/decode.hh
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/mem_dep_unit.hh
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/front_end.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/lsq_unit.hh
/gem5/src/cpu/ozone/lw_back_end.hh
/gem5/src/cpu/ozone/lw_lsq.hh
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/thread_state.hh
/gem5/src/dev/copy_engine.hh
/gem5/src/dev/etherdevice.hh
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/sinic.hh
/gem5/src/kern/kernel_stats.hh
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/prefetch/base.hh
/gem5/src/mem/cache/tags/base.hh
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic.hh
/gem5/src/mem/cache/tags/iic_repl/gen.hh
/gem5/src/mem/dram.hh
/gem5/src/sim/faults.hh
/gem5/src/sim/process.hh
stattest.cc
5885:1db89432381b 23-Feb-2009 Nathan Binkert <nate@binkert.org>

stats: clean up the statistics unittest

5756:88038cdbb9e1 03-Dec-2008 Nathan Binkert <nate@binkert.org>

cprintf: support a configurable width and precision ("*" in printf)

5624:6af9ce00486e 11-Oct-2008 Nathan Binkert <nate@binkert.org>

cprintf: properly deal with pointer types

5584:e08e65fd0f76 02-Oct-2008 Nathan Binkert <nate@binkert.org>

unittest: Add unit tests to the scons framework.
Also fix the unit tests so they actually compile correctly.

5583:6c1f3155f16b 02-Oct-2008 Nathan Binkert <nate@binkert.org>

unittest: Cleanup unit tests. Follow style. Garbage Collect.

4038:c6ff99162387 08-Feb-2007 Nathan Binkert <binkertn@umich.edu>

Quick program to time how long ccprintf takes to write
to a stream compared to sprintf to a buffer.

4025:7b5d767191ba 07-Feb-2007 Nathan Binkert <binkertn@umich.edu>

Initialize the variable to something.

3970:d54945bab95d 03-Jan-2007 Gabe Black <gblack@eecs.umich.edu>

Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem

3874:964682aaad3d 24-Dec-2006 Nathan Binkert <binkertn@umich.edu>

remove some output formatting stuff that we don't use

3858:a2fb4f52c0d9 18-Dec-2006 Nathan Binkert <binkertn@umich.edu>

Fix unittest compiles

3857:2d724684bef3 18-Dec-2006 Nathan Binkert <binkertn@umich.edu>

cast chars to int when we want to print integers so we get a number
instead of a character

3832:49c95a73e29c 12-Dec-2006 Ali Saidi <saidi@eecs.umich.edu>

Fix bugs in tlbmap (and thus rangemap since the code is nearly identical)
Deal with block initializing stores (by doing nothing, at some point we might want to do the write hint 64 like thing)
Fix tcc instruction igoner in legion-lock stuff to be correct in all cases
Have console interrupts warn rather than panicing until we figure out what to do with interrupts

src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
add a magic miscreg which reads all the bits the tlb needs in one go
src/arch/sparc/tlb.cc:
initialized the context type and id to reasonable values and handle block init stores
src/arch/sparc/tlb_map.hh:
fix bug in tlb map code
src/base/range_map.hh:
fix bug in rangemap code and add range_multimap
(these are probably useful for bus range stuff)
src/cpu/exetrace.cc:
fixup tcc ignore code to be correct
src/dev/sparc/t1000.cc:
make console interrupt stuff warn instead of panicing until we get interrupt stuff figured out
src/unittest/rangemaptest.cc:
fix up the rangemap unit test to catch the missing case

3804:fa7a01dddc7a 23-Nov-2006 Ali Saidi <saidi@eecs.umich.edu>

first cut at a sparc tlb

src/arch/sparc/SConscript:
Add code to serialize/unserialze tlb entries
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
update asi names for how they're listed in the supplement
add asis
add more asi functions
src/arch/sparc/isa_traits.hh:
move the interrupt stuff and some basic address space stuff into isa traits
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
add mmu registers to tlb
get rid of implicit asi stuff... the tlb will handle it
src/arch/sparc/regfile.hh:
make isnt/dataAsid return ints not asis
src/arch/sparc/tlb.cc:
src/arch/sparc/tlb.hh:
first cut at sparc tlb
src/arch/sparc/vtophys.hh:
pagatable nedes to be included here
src/mem/request.hh:
add asi and if the request is a memory mapped register to the requset object
src/sim/host.hh:
fix incorrect definition of LL

2716:b9114064d77a 11-Jun-2006 Nathan Binkert <binkertn@umich.edu>

Merge iceaxe.:/Volumes/work/research/m5/head
into iceaxe.:/Volumes/work/research/m5/merge

src/cpu/simple/base.cc:
src/kern/kernel_stats.cc:
src/kern/kernel_stats.hh:
src/kern/system_events.cc:
src/kern/system_events.hh:
src/python/m5/objects/System.py:
src/sim/system.cc:
src/sim/system.hh:
hand merge

2665:a124942bacb8 31-May-2006 Ali Saidi <saidi@eecs.umich.edu>

Updated Authors from bk prs info


/gem5/SConstruct
/gem5/docs/stl.hh
/gem5/src/SConscript
/gem5/src/arch/SConscript
/gem5/src/arch/alpha/SConscript
/gem5/src/arch/alpha/aout_machdep.h
/gem5/src/arch/alpha/arguments.cc
/gem5/src/arch/alpha/arguments.hh
/gem5/src/arch/alpha/ev5.cc
/gem5/src/arch/alpha/ev5.hh
/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/faults.hh
/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/freebsd/system.hh
/gem5/src/arch/alpha/isa/branch.isa
/gem5/src/arch/alpha/isa/decoder.isa
/gem5/src/arch/alpha/isa/fp.isa
/gem5/src/arch/alpha/isa/int.isa
/gem5/src/arch/alpha/isa/main.isa
/gem5/src/arch/alpha/isa/mem.isa
/gem5/src/arch/alpha/isa/opcdec.isa
/gem5/src/arch/alpha/isa/pal.isa
/gem5/src/arch/alpha/isa/unimp.isa
/gem5/src/arch/alpha/isa/unknown.isa
/gem5/src/arch/alpha/isa/util.isa
/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/linux/aligned.hh
/gem5/src/arch/alpha/linux/linux.cc
/gem5/src/arch/alpha/linux/linux.hh
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/linux/process.hh
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/linux/system.hh
/gem5/src/arch/alpha/linux/thread_info.hh
/gem5/src/arch/alpha/linux/threadinfo.hh
/gem5/src/arch/alpha/osfpal.cc
/gem5/src/arch/alpha/osfpal.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/process.hh
/gem5/src/arch/alpha/regfile.hh
/gem5/src/arch/alpha/stacktrace.cc
/gem5/src/arch/alpha/stacktrace.hh
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/system.hh
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tlb.hh
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/tru64/process.hh
/gem5/src/arch/alpha/tru64/system.cc
/gem5/src/arch/alpha/tru64/system.hh
/gem5/src/arch/alpha/tru64/tru64.cc
/gem5/src/arch/alpha/tru64/tru64.hh
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/alpha/vtophys.cc
/gem5/src/arch/alpha/vtophys.hh
/gem5/src/arch/isa_parser.py
/gem5/src/arch/isa_specific.hh
/gem5/src/arch/mips/SConscript
/gem5/src/arch/mips/faults.cc
/gem5/src/arch/mips/faults.hh
/gem5/src/arch/mips/isa/formats/mem.isa
/gem5/src/arch/mips/isa/formats/unimp.isa
/gem5/src/arch/mips/isa/formats/unknown.isa
/gem5/src/arch/mips/isa/main.isa
/gem5/src/arch/mips/isa_traits.cc
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/process.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/mips/regfile/float_regfile.hh
/gem5/src/arch/mips/regfile/int_regfile.hh
/gem5/src/arch/mips/regfile/misc_regfile.hh
/gem5/src/arch/mips/regfile/regfile.hh
/gem5/src/arch/mips/stacktrace.hh
/gem5/src/arch/mips/types.hh
/gem5/src/arch/sparc/SConscript
/gem5/src/arch/sparc/faults.cc
/gem5/src/arch/sparc/faults.hh
/gem5/src/arch/sparc/isa/main.isa
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/linux.cc
/gem5/src/arch/sparc/linux/linux.hh
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/linux/process.hh
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/solaris/process.hh
/gem5/src/arch/sparc/solaris/solaris.cc
/gem5/src/arch/sparc/solaris/solaris.hh
/gem5/src/arch/sparc/stacktrace.hh
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/system.hh
/gem5/src/arch/sparc/ua2005.cc
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/sparc/vtophys.hh
/gem5/src/base/bitfield.hh
/gem5/src/base/callback.hh
/gem5/src/base/chunk_generator.hh
/gem5/src/base/circlebuf.cc
/gem5/src/base/circlebuf.hh
/gem5/src/base/compression/lzss_compression.cc
/gem5/src/base/compression/lzss_compression.hh
/gem5/src/base/compression/null_compression.hh
/gem5/src/base/cprintf.cc
/gem5/src/base/cprintf.hh
/gem5/src/base/cprintf_formats.hh
/gem5/src/base/crc.hh
/gem5/src/base/date.cc
/gem5/src/base/dbl_list.hh
/gem5/src/base/endian.hh
/gem5/src/base/fast_alloc.cc
/gem5/src/base/fast_alloc.hh
/gem5/src/base/fenv.hh
/gem5/src/base/fifo_buffer.cc
/gem5/src/base/fifo_buffer.hh
/gem5/src/base/hashmap.hh
/gem5/src/base/hostinfo.cc
/gem5/src/base/hostinfo.hh
/gem5/src/base/hybrid_pred.cc
/gem5/src/base/hybrid_pred.hh
/gem5/src/base/inet.cc
/gem5/src/base/inet.hh
/gem5/src/base/inifile.cc
/gem5/src/base/inifile.hh
/gem5/src/base/intmath.cc
/gem5/src/base/intmath.hh
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/aout_object.hh
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/ecoff_object.hh
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/base/loader/symtab.cc
/gem5/src/base/loader/symtab.hh
/gem5/src/base/match.cc
/gem5/src/base/match.hh
/gem5/src/base/misc.cc
/gem5/src/base/misc.hh
/gem5/src/base/mod_num.hh
/gem5/src/base/mysql.cc
/gem5/src/base/mysql.hh
/gem5/src/base/output.cc
/gem5/src/base/output.hh
/gem5/src/base/pollevent.cc
/gem5/src/base/pollevent.hh
/gem5/src/base/predictor.hh
/gem5/src/base/random.cc
/gem5/src/base/random.hh
/gem5/src/base/range.cc
/gem5/src/base/range.hh
/gem5/src/base/refcnt.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/base/remote_gdb.hh
/gem5/src/base/res_list.hh
/gem5/src/base/sat_counter.cc
/gem5/src/base/sat_counter.hh
/gem5/src/base/sched_list.hh
/gem5/src/base/socket.cc
/gem5/src/base/socket.hh
/gem5/src/base/statistics.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/events.cc
/gem5/src/base/stats/events.hh
/gem5/src/base/stats/flags.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/mysql.hh
/gem5/src/base/stats/mysql_run.hh
/gem5/src/base/stats/output.hh
/gem5/src/base/stats/statdb.cc
/gem5/src/base/stats/statdb.hh
/gem5/src/base/stats/text.cc
/gem5/src/base/stats/text.hh
/gem5/src/base/stats/types.hh
/gem5/src/base/stats/visit.cc
/gem5/src/base/stats/visit.hh
/gem5/src/base/str.cc
/gem5/src/base/str.hh
/gem5/src/base/time.cc
/gem5/src/base/time.hh
/gem5/src/base/timebuf.hh
/gem5/src/base/trace.cc
/gem5/src/base/trace.hh
/gem5/src/base/traceflags.py
/gem5/src/base/userinfo.cc
/gem5/src/base/userinfo.hh
/gem5/src/cpu/SConscript
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/base_dyn_inst.cc
/gem5/src/cpu/base_dyn_inst.hh
/gem5/src/cpu/cpu_exec_context.cc
/gem5/src/cpu/cpu_exec_context.hh
/gem5/src/cpu/cpu_models.py
/gem5/src/cpu/exec_context.hh
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/exetrace.hh
/gem5/src/cpu/inst_seq.hh
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/intr_control.hh
/gem5/src/cpu/memtest/memtest.cc
/gem5/src/cpu/memtest/memtest.hh
/gem5/src/cpu/o3/2bit_local_pred.cc
/gem5/src/cpu/o3/2bit_local_pred.hh
/gem5/src/cpu/o3/alpha_cpu.cc
/gem5/src/cpu/o3/alpha_cpu.hh
/gem5/src/cpu/o3/alpha_cpu_builder.cc
/gem5/src/cpu/o3/alpha_cpu_impl.hh
/gem5/src/cpu/o3/alpha_dyn_inst.cc
/gem5/src/cpu/o3/alpha_dyn_inst.hh
/gem5/src/cpu/o3/alpha_dyn_inst_impl.hh
/gem5/src/cpu/o3/alpha_impl.hh
/gem5/src/cpu/o3/alpha_params.hh
/gem5/src/cpu/o3/bpred_unit.cc
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/bpred_unit_impl.hh
/gem5/src/cpu/o3/btb.cc
/gem5/src/cpu/o3/btb.hh
/gem5/src/cpu/o3/comm.hh
/gem5/src/cpu/o3/commit.cc
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/cpu_policy.hh
/gem5/src/cpu/o3/decode.cc
/gem5/src/cpu/o3/decode.hh
/gem5/src/cpu/o3/decode_impl.hh
/gem5/src/cpu/o3/fetch.cc
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/free_list.hh
/gem5/src/cpu/o3/iew.cc
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/inst_queue.cc
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/inst_queue_impl.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/mem_dep_unit.hh
/gem5/src/cpu/o3/mem_dep_unit_impl.hh
/gem5/src/cpu/o3/ras.cc
/gem5/src/cpu/o3/ras.hh
/gem5/src/cpu/o3/regfile.hh
/gem5/src/cpu/o3/rename.cc
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/o3/rename_impl.hh
/gem5/src/cpu/o3/rename_map.cc
/gem5/src/cpu/o3/rename_map.hh
/gem5/src/cpu/o3/rob.cc
/gem5/src/cpu/o3/rob.hh
/gem5/src/cpu/o3/rob_impl.hh
/gem5/src/cpu/o3/sat_counter.cc
/gem5/src/cpu/o3/sat_counter.hh
/gem5/src/cpu/o3/store_set.cc
/gem5/src/cpu/o3/store_set.hh
/gem5/src/cpu/o3/tournament_pred.cc
/gem5/src/cpu/o3/tournament_pred.hh
/gem5/src/cpu/op_class.cc
/gem5/src/cpu/op_class.hh
/gem5/src/cpu/ozone/cpu.cc
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/ea_list.cc
/gem5/src/cpu/ozone/ea_list.hh
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/pc_event.hh
/gem5/src/cpu/profile.cc
/gem5/src/cpu/profile.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/atomic.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/smt.hh
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/trace/opt_cpu.cc
/gem5/src/cpu/trace/opt_cpu.hh
/gem5/src/cpu/trace/reader/ibm_reader.cc
/gem5/src/cpu/trace/reader/ibm_reader.hh
/gem5/src/cpu/trace/reader/itx_reader.cc
/gem5/src/cpu/trace/reader/itx_reader.hh
/gem5/src/cpu/trace/reader/m5_reader.cc
/gem5/src/cpu/trace/reader/m5_reader.hh
/gem5/src/cpu/trace/reader/mem_trace_reader.cc
/gem5/src/cpu/trace/reader/mem_trace_reader.hh
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/cpu/trace/trace_cpu.hh
/gem5/src/dev/alpha_access.h
/gem5/src/dev/alpha_console.cc
/gem5/src/dev/alpha_console.hh
/gem5/src/dev/baddev.cc
/gem5/src/dev/baddev.hh
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/etherbus.cc
/gem5/src/dev/etherbus.hh
/gem5/src/dev/etherdump.cc
/gem5/src/dev/etherdump.hh
/gem5/src/dev/etherint.cc
/gem5/src/dev/etherint.hh
/gem5/src/dev/etherlink.cc
/gem5/src/dev/etherlink.hh
/gem5/src/dev/etherpkt.cc
/gem5/src/dev/etherpkt.hh
/gem5/src/dev/ethertap.cc
/gem5/src/dev/ethertap.hh
/gem5/src/dev/ide_ctrl.cc
/gem5/src/dev/ide_ctrl.hh
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/io_device.cc
/gem5/src/dev/io_device.hh
/gem5/src/dev/isa_fake.cc
/gem5/src/dev/isa_fake.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/ns_gige.hh
/gem5/src/dev/ns_gige_reg.h
/gem5/src/dev/pciconfigall.cc
/gem5/src/dev/pciconfigall.hh
/gem5/src/dev/pcidev.cc
/gem5/src/dev/pcidev.hh
/gem5/src/dev/pcireg.h
/gem5/src/dev/pitreg.h
/gem5/src/dev/pktfifo.cc
/gem5/src/dev/pktfifo.hh
/gem5/src/dev/platform.cc
/gem5/src/dev/platform.hh
/gem5/src/dev/rtcreg.h
/gem5/src/dev/simconsole.cc
/gem5/src/dev/simconsole.hh
/gem5/src/dev/simple_disk.cc
/gem5/src/dev/simple_disk.hh
/gem5/src/dev/sinic.cc
/gem5/src/dev/sinic.hh
/gem5/src/dev/sinicreg.hh
/gem5/src/dev/tsunami.cc
/gem5/src/dev/tsunami.hh
/gem5/src/dev/tsunami_cchip.cc
/gem5/src/dev/tsunami_cchip.hh
/gem5/src/dev/tsunami_io.cc
/gem5/src/dev/tsunami_io.hh
/gem5/src/dev/tsunami_pchip.cc
/gem5/src/dev/tsunami_pchip.hh
/gem5/src/dev/tsunamireg.h
/gem5/src/dev/uart.cc
/gem5/src/dev/uart.hh
/gem5/src/dev/uart8250.cc
/gem5/src/dev/uart8250.hh
/gem5/src/kern/kernel_stats.cc
/gem5/src/kern/kernel_stats.hh
/gem5/src/kern/linux/events.cc
/gem5/src/kern/linux/events.hh
/gem5/src/kern/linux/linux.hh
/gem5/src/kern/linux/linux_syscalls.cc
/gem5/src/kern/linux/linux_syscalls.hh
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/linux/printk.hh
/gem5/src/kern/linux/sched.hh
/gem5/src/kern/solaris/solaris.hh
/gem5/src/kern/system_events.cc
/gem5/src/kern/system_events.hh
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/dump_mbuf.hh
/gem5/src/kern/tru64/mbuf.hh
/gem5/src/kern/tru64/printf.cc
/gem5/src/kern/tru64/printf.hh
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/kern/tru64/tru64_events.hh
/gem5/src/kern/tru64/tru64_syscalls.cc
/gem5/src/kern/tru64/tru64_syscalls.hh
/gem5/src/mem/bridge.cc
/gem5/src/mem/bridge.hh
/gem5/src/mem/bus.cc
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/prefetch/tagged_prefetcher_impl.hh
/gem5/src/mem/config/prefetch.hh
/gem5/src/mem/mem_object.cc
/gem5/src/mem/mem_object.hh
/gem5/src/mem/packet.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.cc
/gem5/src/mem/page_table.hh
/gem5/src/mem/physical.cc
/gem5/src/mem/physical.hh
/gem5/src/mem/port.cc
/gem5/src/mem/port.hh
/gem5/src/mem/request.hh
/gem5/src/mem/translating_port.cc
/gem5/src/mem/translating_port.hh
/gem5/src/mem/vport.cc
/gem5/src/mem/vport.hh
/gem5/src/python/SConscript
/gem5/src/python/m5/__init__.py
/gem5/src/python/m5/config.py
/gem5/src/python/m5/convert.py
/gem5/src/python/m5/multidict.py
/gem5/src/python/m5/smartdict.py
/gem5/src/sim/async.hh
/gem5/src/sim/builder.cc
/gem5/src/sim/builder.hh
/gem5/src/sim/byteswap.hh
/gem5/src/sim/debug.cc
/gem5/src/sim/debug.hh
/gem5/src/sim/eventq.cc
/gem5/src/sim/eventq.hh
/gem5/src/sim/faults.cc
/gem5/src/sim/faults.hh
/gem5/src/sim/host.hh
/gem5/src/sim/main.cc
/gem5/src/sim/param.cc
/gem5/src/sim/param.hh
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/pseudo_inst.hh
/gem5/src/sim/root.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/sim_events.cc
/gem5/src/sim/sim_events.hh
/gem5/src/sim/sim_exit.hh
/gem5/src/sim/sim_object.cc
/gem5/src/sim/sim_object.hh
/gem5/src/sim/startup.cc
/gem5/src/sim/startup.hh
/gem5/src/sim/stat_control.cc
/gem5/src/sim/stat_control.hh
/gem5/src/sim/stats.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.hh
/gem5/src/sim/vptr.hh
bitvectest.cc
circletest.cc
cprintftest.cc
genini.py
initest.cc
lru_test.cc
nmtest.cc
offtest.cc
paramtest.cc
rangetest.cc
sized_test.cc
stattest.cc
strnumtest.cc
symtest.cc
tokentest.cc
tracetest.cc
/gem5/util/ccdrv/devtime.c
/gem5/util/m5/Makefile
/gem5/util/m5/m5.c
/gem5/util/m5/m5op.S
/gem5/util/m5/m5op.h
/gem5/util/oprofile-top.py
/gem5/util/qdo
/gem5/util/rundiff
/gem5/util/stats/db.py
/gem5/util/stats/dbinit.py
/gem5/util/stats/display.py
/gem5/util/stats/info.py
/gem5/util/stats/orderdict.py
/gem5/util/stats/print.py
/gem5/util/stats/profile.py
/gem5/util/stats/stats.py
/gem5/util/tap/tap.cc
2632:1bb2f91485ea 22-May-2006 Steve Reinhardt <stever@eecs.umich.edu>

New directory structure:
- simulator source now in 'src' subdirectory
- imported files from 'ext' repository
- support building in arbitrary places, including
outside of the source tree. See comment at top
of SConstruct file for more details.
Regression tests are temporarily disabled; that
syetem needs more extensive revisions.

SConstruct:
Update for new directory structure.
Modify to support build trees that are not subdirectories
of the source tree. See comment at top of file for
more details.
Regression tests are temporarily disabled.
src/arch/SConscript:
src/arch/isa_parser.py:
src/python/SConscript:
Update for new directory structure.


/gem5/Doxyfile
/gem5/SConscript
/gem5/SConstruct
/gem5/arch/SConscript
/gem5/arch/alpha/SConscript
/gem5/arch/alpha/aout_machdep.h
/gem5/arch/alpha/arguments.cc
/gem5/arch/alpha/arguments.hh
/gem5/arch/alpha/ecoff_machdep.h
/gem5/arch/alpha/ev5.cc
/gem5/arch/alpha/ev5.hh
/gem5/arch/alpha/faults.cc
/gem5/arch/alpha/faults.hh
/gem5/arch/alpha/freebsd/system.cc
/gem5/arch/alpha/freebsd/system.hh
/gem5/arch/alpha/isa/branch.isa
/gem5/arch/alpha/isa/decoder.isa
/gem5/arch/alpha/isa/fp.isa
/gem5/arch/alpha/isa/int.isa
/gem5/arch/alpha/isa/main.isa
/gem5/arch/alpha/isa/mem.isa
/gem5/arch/alpha/isa/opcdec.isa
/gem5/arch/alpha/isa/pal.isa
/gem5/arch/alpha/isa/unimp.isa
/gem5/arch/alpha/isa/unknown.isa
/gem5/arch/alpha/isa/util.isa
/gem5/arch/alpha/isa_traits.hh
/gem5/arch/alpha/linux/aligned.hh
/gem5/arch/alpha/linux/hwrpb.hh
/gem5/arch/alpha/linux/linux.cc
/gem5/arch/alpha/linux/linux.hh
/gem5/arch/alpha/linux/process.cc
/gem5/arch/alpha/linux/process.hh
/gem5/arch/alpha/linux/system.cc
/gem5/arch/alpha/linux/system.hh
/gem5/arch/alpha/linux/thread_info.hh
/gem5/arch/alpha/linux/threadinfo.hh
/gem5/arch/alpha/osfpal.cc
/gem5/arch/alpha/osfpal.hh
/gem5/arch/alpha/process.cc
/gem5/arch/alpha/process.hh
/gem5/arch/alpha/regfile.hh
/gem5/arch/alpha/stacktrace.cc
/gem5/arch/alpha/stacktrace.hh
/gem5/arch/alpha/system.cc
/gem5/arch/alpha/system.hh
/gem5/arch/alpha/tlb.cc
/gem5/arch/alpha/tlb.hh
/gem5/arch/alpha/tru64/process.cc
/gem5/arch/alpha/tru64/process.hh
/gem5/arch/alpha/tru64/system.cc
/gem5/arch/alpha/tru64/system.hh
/gem5/arch/alpha/tru64/tru64.cc
/gem5/arch/alpha/tru64/tru64.hh
/gem5/arch/alpha/types.hh
/gem5/arch/alpha/utility.hh
/gem5/arch/alpha/vtophys.cc
/gem5/arch/alpha/vtophys.hh
/gem5/arch/isa_parser.py
/gem5/arch/isa_specific.hh
/gem5/arch/mips/SConscript
/gem5/arch/mips/faults.cc
/gem5/arch/mips/faults.hh
/gem5/arch/mips/isa/base.isa
/gem5/arch/mips/isa/bitfields.isa
/gem5/arch/mips/isa/decoder.isa
/gem5/arch/mips/isa/formats/basic.isa
/gem5/arch/mips/isa/formats/branch.isa
/gem5/arch/mips/isa/formats/formats.isa
/gem5/arch/mips/isa/formats/fp.isa
/gem5/arch/mips/isa/formats/int.isa
/gem5/arch/mips/isa/formats/mem.isa
/gem5/arch/mips/isa/formats/noop.isa
/gem5/arch/mips/isa/formats/tlbop.isa
/gem5/arch/mips/isa/formats/trap.isa
/gem5/arch/mips/isa/formats/unimp.isa
/gem5/arch/mips/isa/formats/unknown.isa
/gem5/arch/mips/isa/formats/util.isa
/gem5/arch/mips/isa/includes.isa
/gem5/arch/mips/isa/main.isa
/gem5/arch/mips/isa/operands.isa
/gem5/arch/mips/isa_traits.cc
/gem5/arch/mips/isa_traits.hh
/gem5/arch/mips/linux/linux.cc
/gem5/arch/mips/linux/linux.hh
/gem5/arch/mips/linux/process.cc
/gem5/arch/mips/linux/process.hh
/gem5/arch/mips/process.cc
/gem5/arch/mips/process.hh
/gem5/arch/mips/regfile/float_regfile.hh
/gem5/arch/mips/regfile/int_regfile.hh
/gem5/arch/mips/regfile/misc_regfile.hh
/gem5/arch/mips/regfile/regfile.hh
/gem5/arch/mips/stacktrace.hh
/gem5/arch/mips/types.hh
/gem5/arch/mips/utility.hh
/gem5/arch/sparc/SConscript
/gem5/arch/sparc/faults.cc
/gem5/arch/sparc/faults.hh
/gem5/arch/sparc/isa/base.isa
/gem5/arch/sparc/isa/bitfields.isa
/gem5/arch/sparc/isa/decoder.isa
/gem5/arch/sparc/isa/formats.isa
/gem5/arch/sparc/isa/formats/basic.isa
/gem5/arch/sparc/isa/formats/branch.isa
/gem5/arch/sparc/isa/formats/integerop.isa
/gem5/arch/sparc/isa/formats/mem.isa
/gem5/arch/sparc/isa/formats/nop.isa
/gem5/arch/sparc/isa/formats/priv.isa
/gem5/arch/sparc/isa/formats/trap.isa
/gem5/arch/sparc/isa/formats/unknown.isa
/gem5/arch/sparc/isa/includes.isa
/gem5/arch/sparc/isa/main.isa
/gem5/arch/sparc/isa/operands.isa
/gem5/arch/sparc/isa_traits.hh
/gem5/arch/sparc/linux/linux.cc
/gem5/arch/sparc/linux/linux.hh
/gem5/arch/sparc/linux/process.cc
/gem5/arch/sparc/linux/process.hh
/gem5/arch/sparc/process.cc
/gem5/arch/sparc/process.hh
/gem5/arch/sparc/regfile.hh
/gem5/arch/sparc/solaris/process.cc
/gem5/arch/sparc/solaris/process.hh
/gem5/arch/sparc/solaris/solaris.cc
/gem5/arch/sparc/solaris/solaris.hh
/gem5/arch/sparc/stacktrace.hh
/gem5/arch/sparc/system.cc
/gem5/arch/sparc/system.hh
/gem5/arch/sparc/utility.hh
/gem5/base/bitfield.hh
/gem5/base/callback.hh
/gem5/base/chunk_generator.hh
/gem5/base/circlebuf.cc
/gem5/base/circlebuf.hh
/gem5/base/compression/lzss_compression.cc
/gem5/base/compression/lzss_compression.hh
/gem5/base/compression/null_compression.hh
/gem5/base/cprintf.cc
/gem5/base/cprintf.hh
/gem5/base/cprintf_formats.hh
/gem5/base/crc.cc
/gem5/base/crc.hh
/gem5/base/date.cc
/gem5/base/dbl_list.hh
/gem5/base/endian.hh
/gem5/base/fast_alloc.cc
/gem5/base/fast_alloc.hh
/gem5/base/fenv.hh
/gem5/base/fifo_buffer.cc
/gem5/base/fifo_buffer.hh
/gem5/base/hashmap.hh
/gem5/base/hostinfo.cc
/gem5/base/hostinfo.hh
/gem5/base/hybrid_pred.cc
/gem5/base/hybrid_pred.hh
/gem5/base/inet.cc
/gem5/base/inet.hh
/gem5/base/inifile.cc
/gem5/base/inifile.hh
/gem5/base/intmath.cc
/gem5/base/intmath.hh
/gem5/base/kgdb.h
/gem5/base/loader/aout_object.cc
/gem5/base/loader/aout_object.hh
/gem5/base/loader/coff_sym.h
/gem5/base/loader/coff_symconst.h
/gem5/base/loader/ecoff_object.cc
/gem5/base/loader/ecoff_object.hh
/gem5/base/loader/elf_object.cc
/gem5/base/loader/elf_object.hh
/gem5/base/loader/exec_aout.h
/gem5/base/loader/exec_ecoff.h
/gem5/base/loader/object_file.cc
/gem5/base/loader/object_file.hh
/gem5/base/loader/symtab.cc
/gem5/base/loader/symtab.hh
/gem5/base/match.cc
/gem5/base/match.hh
/gem5/base/misc.cc
/gem5/base/misc.hh
/gem5/base/mod_num.hh
/gem5/base/mysql.cc
/gem5/base/mysql.hh
/gem5/base/output.cc
/gem5/base/output.hh
/gem5/base/pollevent.cc
/gem5/base/pollevent.hh
/gem5/base/predictor.hh
/gem5/base/random.cc
/gem5/base/random.hh
/gem5/base/range.cc
/gem5/base/range.hh
/gem5/base/refcnt.hh
/gem5/base/remote_gdb.cc
/gem5/base/remote_gdb.hh
/gem5/base/res_list.hh
/gem5/base/sat_counter.cc
/gem5/base/sat_counter.hh
/gem5/base/sched_list.hh
/gem5/base/socket.cc
/gem5/base/socket.hh
/gem5/base/statistics.cc
/gem5/base/statistics.hh
/gem5/base/stats/events.cc
/gem5/base/stats/events.hh
/gem5/base/stats/flags.hh
/gem5/base/stats/mysql.cc
/gem5/base/stats/mysql.hh
/gem5/base/stats/mysql_run.hh
/gem5/base/stats/output.hh
/gem5/base/stats/statdb.cc
/gem5/base/stats/statdb.hh
/gem5/base/stats/text.cc
/gem5/base/stats/text.hh
/gem5/base/stats/types.hh
/gem5/base/stats/visit.cc
/gem5/base/stats/visit.hh
/gem5/base/str.cc
/gem5/base/str.hh
/gem5/base/time.cc
/gem5/base/time.hh
/gem5/base/timebuf.hh
/gem5/base/trace.cc
/gem5/base/trace.hh
/gem5/base/traceflags.py
/gem5/base/userinfo.cc
/gem5/base/userinfo.hh
/gem5/build/SConstruct
/gem5/build/default_options/ALPHA_FS
/gem5/build/default_options/ALPHA_FS_TL
/gem5/build/default_options/ALPHA_SE
/gem5/build/default_options/MIPS_SE
/gem5/build/default_options/SPARC_SE
/gem5/build_opts/ALPHA_FS
/gem5/build_opts/ALPHA_FS_TL
/gem5/build_opts/ALPHA_SE
/gem5/build_opts/MIPS_SE
/gem5/build_opts/SPARC_SE
/gem5/cpu/SConscript
/gem5/cpu/base.cc
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/gem5/src/arch/sparc/solaris/solaris.cc
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/gem5/src/arch/sparc/stacktrace.hh
/gem5/src/arch/sparc/system.cc
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/gem5/src/base/bitfield.hh
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/gem5/src/base/chunk_generator.hh
/gem5/src/base/circlebuf.cc
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/gem5/src/base/compression/lzss_compression.cc
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/gem5/src/base/date.cc
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/gem5/src/base/hybrid_pred.cc
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/gem5/src/base/loader/object_file.cc
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/gem5/src/cpu/SConscript
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/gem5/src/cpu/memtest/memtest.cc
/gem5/src/cpu/memtest/memtest.hh
/gem5/src/cpu/o3/2bit_local_pred.cc
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/gem5/src/cpu/o3/alpha_cpu.cc
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/gem5/src/cpu/o3/alpha_cpu_builder.cc
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/gem5/src/cpu/o3/alpha_dyn_inst.cc
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/gem5/src/cpu/o3/alpha_impl.hh
/gem5/src/cpu/o3/alpha_params.hh
/gem5/src/cpu/o3/bpred_unit.cc
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/bpred_unit_impl.hh
/gem5/src/cpu/o3/btb.cc
/gem5/src/cpu/o3/btb.hh
/gem5/src/cpu/o3/comm.hh
/gem5/src/cpu/o3/commit.cc
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/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/cpu_policy.hh
/gem5/src/cpu/o3/decode.cc
/gem5/src/cpu/o3/decode.hh
/gem5/src/cpu/o3/decode_impl.hh
/gem5/src/cpu/o3/fetch.cc
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/free_list.hh
/gem5/src/cpu/o3/iew.cc
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/inst_queue.cc
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/inst_queue_impl.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/mem_dep_unit.hh
/gem5/src/cpu/o3/mem_dep_unit_impl.hh
/gem5/src/cpu/o3/ras.cc
/gem5/src/cpu/o3/ras.hh
/gem5/src/cpu/o3/regfile.hh
/gem5/src/cpu/o3/rename.cc
/gem5/src/cpu/o3/rename.hh
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/gem5/src/cpu/o3/rename_map.cc
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/gem5/src/cpu/o3/rob.cc
/gem5/src/cpu/o3/rob.hh
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/gem5/src/cpu/o3/tournament_pred.cc
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/gem5/src/cpu/op_class.cc
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/gem5/src/cpu/ozone/ea_list.cc
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/gem5/src/cpu/pc_event.cc
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/gem5/src/cpu/simple/timing.cc
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/gem5/src/cpu/static_inst.cc
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/gem5/src/cpu/trace/opt_cpu.cc
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/gem5/src/cpu/trace/reader/ibm_reader.cc
/gem5/src/cpu/trace/reader/ibm_reader.hh
/gem5/src/cpu/trace/reader/itx_reader.cc
/gem5/src/cpu/trace/reader/itx_reader.hh
/gem5/src/cpu/trace/reader/m5_reader.cc
/gem5/src/cpu/trace/reader/m5_reader.hh
/gem5/src/cpu/trace/reader/mem_trace_reader.cc
/gem5/src/cpu/trace/reader/mem_trace_reader.hh
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/cpu/trace/trace_cpu.hh
/gem5/src/dev/alpha_access.h
/gem5/src/dev/alpha_console.cc
/gem5/src/dev/alpha_console.hh
/gem5/src/dev/baddev.cc
/gem5/src/dev/baddev.hh
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/etherbus.cc
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/gem5/src/dev/etherdump.cc
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/gem5/src/dev/etherint.cc
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/gem5/src/dev/etherlink.cc
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/gem5/src/dev/etherpkt.cc
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/gem5/src/dev/ethertap.cc
/gem5/src/dev/ethertap.hh
/gem5/src/dev/ide_atareg.h
/gem5/src/dev/ide_ctrl.cc
/gem5/src/dev/ide_ctrl.hh
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/ide_wdcreg.h
/gem5/src/dev/io_device.cc
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/gem5/src/dev/isa_fake.cc
/gem5/src/dev/isa_fake.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/ns_gige.hh
/gem5/src/dev/ns_gige_reg.h
/gem5/src/dev/pciconfigall.cc
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/gem5/src/dev/pcidev.cc
/gem5/src/dev/pcidev.hh
/gem5/src/dev/pcireg.h
/gem5/src/dev/pitreg.h
/gem5/src/dev/pktfifo.cc
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/gem5/src/dev/platform.cc
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/gem5/src/dev/rtcreg.h
/gem5/src/dev/simconsole.cc
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/gem5/src/dev/simple_disk.cc
/gem5/src/dev/simple_disk.hh
/gem5/src/dev/sinic.cc
/gem5/src/dev/sinic.hh
/gem5/src/dev/sinicreg.hh
/gem5/src/dev/tsunami.cc
/gem5/src/dev/tsunami.hh
/gem5/src/dev/tsunami_cchip.cc
/gem5/src/dev/tsunami_cchip.hh
/gem5/src/dev/tsunami_io.cc
/gem5/src/dev/tsunami_io.hh
/gem5/src/dev/tsunami_pchip.cc
/gem5/src/dev/tsunami_pchip.hh
/gem5/src/dev/tsunamireg.h
/gem5/src/dev/uart.cc
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/gem5/src/dev/uart8250.cc
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/gem5/src/kern/kernel_stats.cc
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/gem5/src/kern/linux/events.hh
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/gem5/src/kern/linux/linux_syscalls.cc
/gem5/src/kern/linux/linux_syscalls.hh
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/linux/printk.hh
/gem5/src/kern/linux/sched.hh
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/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/kern/tru64/tru64_events.hh
/gem5/src/kern/tru64/tru64_syscalls.cc
/gem5/src/kern/tru64/tru64_syscalls.hh
/gem5/src/mem/bridge.cc
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/gem5/src/mem/cache/prefetch/tagged_prefetcher_impl.hh
/gem5/src/mem/config/prefetch.hh
/gem5/src/mem/mem_object.cc
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/gem5/src/mem/packet.cc
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/gem5/src/mem/page_table.cc
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/gem5/src/mem/physical.cc
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/gem5/src/mem/port.cc
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/gem5/src/mem/request.hh
/gem5/src/mem/translating_port.cc
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/gem5/src/python/SConscript
/gem5/src/python/m5/__init__.py
/gem5/src/python/m5/config.py
/gem5/src/python/m5/convert.py
/gem5/src/python/m5/multidict.py
/gem5/src/python/m5/objects/AlphaConsole.py
/gem5/src/python/m5/objects/AlphaFullCPU.py
/gem5/src/python/m5/objects/AlphaTLB.py
/gem5/src/python/m5/objects/BadDevice.py
/gem5/src/python/m5/objects/BaseCPU.py
/gem5/src/python/m5/objects/BaseCache.py
/gem5/src/python/m5/objects/Bridge.py
/gem5/src/python/m5/objects/Bus.py
/gem5/src/python/m5/objects/CoherenceProtocol.py
/gem5/src/python/m5/objects/Device.py
/gem5/src/python/m5/objects/DiskImage.py
/gem5/src/python/m5/objects/Ethernet.py
/gem5/src/python/m5/objects/Ide.py
/gem5/src/python/m5/objects/IntrControl.py
/gem5/src/python/m5/objects/MemObject.py
/gem5/src/python/m5/objects/MemTest.py
/gem5/src/python/m5/objects/Pci.py
/gem5/src/python/m5/objects/PhysicalMemory.py
/gem5/src/python/m5/objects/Platform.py
/gem5/src/python/m5/objects/Process.py
/gem5/src/python/m5/objects/Repl.py
/gem5/src/python/m5/objects/Root.py
/gem5/src/python/m5/objects/SimConsole.py
/gem5/src/python/m5/objects/SimpleDisk.py
/gem5/src/python/m5/objects/System.py
/gem5/src/python/m5/objects/Tsunami.py
/gem5/src/python/m5/objects/Uart.py
/gem5/src/python/m5/smartdict.py
/gem5/src/sim/async.hh
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/gem5/src/sim/eventq.cc
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/gem5/src/sim/faults.cc
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/gem5/src/sim/param.cc
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/gem5/src/sim/process.cc
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/gem5/src/sim/sim_events.cc
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/gem5/src/sim/vptr.hh
Makefile
bitvectest.cc
circletest.cc
cprintftest.cc
foo.ini
genini.py
initest.cc
initest.ini
lru_test.cc
nmtest.cc
offtest.cc
paramtest.cc
rangetest.cc
sized_test.cc
stattest.cc
strnumtest.cc
symtest.cc
tokentest.cc
tracetest.cc
/gem5/test/Makefile
/gem5/test/bitvectest.cc
/gem5/test/circletest.cc
/gem5/test/cprintftest.cc
/gem5/test/foo.ini
/gem5/test/genini.py
/gem5/test/initest.cc
/gem5/test/initest.ini
/gem5/test/lru_test.cc
/gem5/test/nmtest.cc
/gem5/test/offtest.cc
/gem5/test/paramtest.cc
/gem5/test/rangetest.cc
/gem5/test/sized_test.cc
/gem5/test/stattest.cc
/gem5/test/strnumtest.cc
/gem5/test/symtest.cc
/gem5/test/tokentest.cc
/gem5/test/tracetest.cc