13981:577196ddd040 |
02-May-2019 |
Gabe Black <gabeblack@google.com> |
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
This code will be preserved through version control, but otherwise creates clutter and will rot in place since it's never compiled.
Change-Id: Id265f6deac445116843956ea5cf1210d8127274e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18608 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com> |
13872:34607c4cd380 |
15-Apr-2019 |
Gabe Black <gabeblack@google.com> |
dev: Use the new Port role mechanism to make an EtherInt Port type.
This type always uses the same "ETHERNET" role, and all connections are symmetric and self compatible.
Change-Id: I1d060f8c098d52ae9f65c052f816bc813590ff9c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18171 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13784:1941dc118243 |
07-Mar-2019 |
Gabe Black <gabeblack@google.com> |
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
Replace the getMasterPort, getSlavePort, and getEthPort functions with getPort, and remove extraneous mechanisms that are no longer necessary.
Change-Id: Iab7e3c02d2f3a0cf33e7e824e18c28646b5bc318 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17040 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13782:9f6654f478e2 |
07-Mar-2019 |
Gabe Black <gabeblack@google.com> |
mem: Move bind() and unbind() into the Port class.
These are now pure virtual methods which more specialized port subclasses will need to implement. The SlavePort class implements them by ignoring them and then providing parallel functions for the MasterPort to call. The MasterPort's methods do basically what they did before, except now bind() uses dynamic cast to check if its peer is of the appropriate type and also to convert it into that type before connecting to it.
Change-Id: I0948799bc954acaebf371e6b6612cee1d3023bc4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17038 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13770:ca0cf0ef7051 |
07-Mar-2019 |
Gabe Black <gabeblack@google.com> |
dev: Make EtherInt inherit from Port.
This way a common function can return EtherInt (and master and slave ports).
Change-Id: I1215baaad918ef0352b228877241b2b6dd2503fc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17035 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
13767:85278a98657c |
06-Mar-2019 |
Gabe Black <gabeblack@google.com> |
dev: Make the EtherDevice class inherit EtherObject.
This avoids having to define two parallel versions of the getEthPort function, and the complex dynamic_cast macrame in connectPorts().
Change-Id: I24c09864005ff39a049e50d7245ff17e9480edea Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17029 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13766:4ecebdee8da4 |
06-Mar-2019 |
Gabe Black <gabeblack@google.com> |
dev: Turn EtherObject into an interface class.
This class used to drive from SimObject so that it could be derived from to get both the interface and SimObject while still using single inheritance.
With this change, EtherObject is now just an interface class with only one pure virtual function which can be inherited alongside SimObject. This makes it more flexible so that it can be used in places where you might want a different inheritance hierarchy, for instance to inherit from MemObject.
Change-Id: I0f07664d104eed012cf4ce6e30c416ada19505a7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17028 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13665:9c7fe3811b88 |
25-Jan-2019 |
Andreas Sandberg <andreas.sandberg@arm.com> |
python: Don't assume SimObjects live in the global namespace
The importer in Python 3 doesn't like the way we import SimObjects from the global namespace. Convert the existing SimObject declarations to import from m5.objects. As a side-effect, this makes these files consistent with configuration files.
Change-Id: I11153502b430822130722839e1fa767b82a027aa Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/15981 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> |
13342:1ddb43f47325 |
12-Oct-2018 |
Gabe Black <gabeblack@google.com> |
dev: Explicitly specify the endianness for packet accessors.
Generally speaking, the endianness of the data devices provide or accept is dependent on the device and not the ISA the system executes. This change makes the devices in dev pick an endianness rather than using the guest's.
For the ISA bus and the UART, accesses are byte sized and so endianness doesn't matter. The ISA and PCI busses and the devices which use them are defined to be little endian.
Change-Id: Ib0aa70f192e1d6f3b886d9f3ad41ae03bddb583f Reviewed-on: https://gem5-review.googlesource.com/c/13462 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
13340:2c95525a40f9 |
11-Oct-2018 |
Gabe Black <gabeblack@google.com> |
dev: Build most of the networking devices in the NULL_ISA build.
The only part of these devices which are incompatible with other ISAs, with the possible exception of endianness transformation, is that the dist_iface implementation refers to ThreadContext methods and that class is heavily tied to the guest ISA. Only those few lines are excluded in a NULL_ISA build.
Change-Id: Ic6d643fdbb792d0a996a37d75e027c5ce0ecd460 Reviewed-on: https://gem5-review.googlesource.com/c/13469 Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
12978:3acf5f78d541 |
14-Aug-2018 |
Pin-Yen Lin <treapking@google.com> |
net: Fix a bug when receiving fragamented packets
In the previous implementation, the function EtherTap::recvReal will only read one packet when received some ``interrupt'' (explicitly, when async_IO set to true). When someone tries to send a large message to the simulated device, the message will be divided to several packets due to packet fragmentation. In this situation recvReal will only read one packet and left the other packets in the buffer. This significantly increases the networking latency. So before reading from socket, I change the socket into non-blocking mode and keep reading from it until there's no packet left.
Change-Id: Ieb94a8532cd3994862b6f3eb9474caf7ccf617da Reviewed-on: https://gem5-review.googlesource.com/12338 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
12963:214e39f63149 |
13-Aug-2018 |
Pin-Yen Lin <treapking@google.com> |
net: Fix a bug when handling IPv6 packets
When gem5 runs with the networking support, it will run into an assertion fail and aborted. This is because it tries to calculate checksum for IPv6 packet and this makes the IpPtr pointer ``ip'' become NULL. For that there is functions and classes for IPv6 in base/inet.cc, I added IPv6 support for i8254xGBe.cc. Because IPv6 header does not have identification number, I ignored some of the debug messages using ip->id().
Change-Id: Ida5e36aefd2c5c26053f8152a0aac24191e7757c Reviewed-on: https://gem5-review.googlesource.com/12339 Reviewed-by: Earl Ou <shunhsingou@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> |
12632:a00c27d2256b |
28-Mar-2018 |
Gabe Black <gabeblack@google.com> |
dev: Make sure the EtherTap device uses the right event queue.
The EtherTap device may be called into from an event on the PollQueue when some event queue other than its own is active. This change ensures that it switches event queues if necessary before doing anything that may cause more events to be scheduled.
Change-Id: If8666542d7664780c0b371230e1e5fba93fbc1c0 Reviewed-on: https://gem5-review.googlesource.com/9521 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
12561:7227dc3a0715 |
18-Feb-2018 |
Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> |
dev: Don't fall through into BRAR after RFDR case
If the switch block inside the RFDR case selects the non-default case and breaks out, it will fall through into the BRAR case, which seems incorrect. Put in a break to ensure that it breaks out of the parent switch block as well.
Change-Id: Ie4cedf66954b7e8f4b884ad9e3a653968bbfaef7 Signed-off-by: Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/8563 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
12559:55550caed7f0 |
18-Feb-2018 |
Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> |
dev: Leave last byte in strncpy for NULL
The length of the strncpy should be one less than the destination to ensure that there is space for the last NULL byte in case the source is longer than the destination.
Change-Id: Iea65fa6327c8242bd8ddf4bf9a5a2b5164996495 Signed-off-by: Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/8561 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
12392:e0dbdf30a2a5 |
13-Dec-2017 |
Jason Lowe-Power <jason@lowepower.com> |
misc: Updates for gcc7.2 for x86
GCC 7.2 is much stricter than previous GCC versions. The following changes are needed:
* There is now a warning if there is an implicit fallthrough between two case statments. C++17 adds the [[fallthrough]]; declaration. However, to support non C++17 standards (i.e., C++11), we use M5_FALLTHROUGH. M5_FALLTHROUGH checks for [[fallthrough]] compliant C++17 compiler and if that doesn't exist, it defaults to nothing (no older compilers generate warnings). * The above resulted in a couple of bugs that were found. This is noted in the review request on gerrit. * throw() for dynamic exception specification is deprecated * There were a couple of new uninitialized variable warnings * Can no longer perform bitwise operations on a bool. * Must now include <functional> for std::function * Compiler bug for void* lambda. Changed to auto as work around. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82878
Change-Id: I5d4c782a4e133fa4cdb119e35d9aff68c6e2958e Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/5802 Reviewed-by: Gabe Black <gabeblack@google.com> |
12334:e0ab29a34764 |
30-Nov-2017 |
Gabe Black <gabeblack@google.com> |
misc: Rename misc.(hh|cc) to logging.(hh|cc)
These files aren't a collection of miscellaneous stuff, they're the definition of the Logger interface, and a few utility macros for calling into that interface (panic, warn, etc.).
Change-Id: I84267ac3f45896a83c0ef027f8f19c5e9a5667d1 Reviewed-on: https://gem5-review.googlesource.com/6226 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> |
12130:5e0dd4d7b730 |
28-Jun-2017 |
Sean Wilson <spwilson2@wisc.edu> |
net: Refactor some Event subclasses to lambdas
Change-Id: I0e23f1529b26c36d749bf5211ee8623744d0b10f Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3927 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
12087:0e082672ac6b |
07-Jun-2017 |
Sean Wilson <spwilson2@wisc.edu> |
dev: Replace EventWrapper use with EventFunctionWrapper
Change-Id: I6b03cc6f67e76dffb79940431711ae6171901c6a Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3748 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
12064:39f4d937dd22 |
02-Jun-2017 |
Gabe Black <gabeblack@google.com> |
dev: Avoid arbitrarily deep stack depth in the i8254xGBe model.
When it comes time to send a packet with the i8254xGBe model hooked up to EtherTap and while running in KVM mode, the packet will first go to the EtherTap over the network style port between them. EtherTap, because it's not actually a model of anything in the simulation, will immediately pass the packet off to the real network and report that the transmission was successful to the i8254xGBe. The i8254xGBe will notice that it still has stuff it can send (the KVM mode CPU has no trouble keeping it full) and will, without returning and collapsing the stack, immediately call back into EtherTap with the next packet. This loop repeats, continually deepening the stack, until gem5 crashes with a segfault.
To break this loop, a few small changes have been made. First, txFifoTick has been repurposed slightly so that it continuously keeps track of whether there's still work to do to flush out the fifo during the current tick. The code in txWire has been adjusted slightly so that it clears that variable at the start (also removing some redundancy), so that other code can set it again if more work needs to be done. Specifically, the ethTxDone function will set that flag.
If there's more work to be done flushing the Fifo while in tick(), it will loop until txFifoTick stays cleared, meaning either the Fifo is empty, or the object on the other end hasn't said it's done yet.
Finally, a new bool member called inTick has been added which keeps track of whether the tick() function is still active somewhere in the callstack. If it is, then the tick event shouldn't be rescheduled in ethTxDone, since tick will take care of that before it returns. It won't check to see if it needs to, and so without this check there's a panic from scheduling the same event twice.
It's not completely clear that the Fifo should send packets over and over as fast as the other side accepts them within the same tick, although it's not clear that it shouldn't either. If not, then probably all that would need to change would be to remove the "while" loop so that the tick event would be rescheduled, and the Fifo would be further emptied the next time around.
Change-Id: I653379b43389d0539ecfadb3fc6c40e38a8864c2 Reviewed-on: https://gem5-review.googlesource.com/3642 Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
12056:1ad5b3161819 |
03-Jun-2017 |
Gabe Black <gabeblack@google.com> |
dev: Add a version of EtherTap which uses the tap driver.
The object is called EtherTap (as opposed to EtherTapStub, what the former EtherTap was renamed to), and its existance is gated on the linux/if_tun.h header file existing. That's probably overly strict, but it will hopefully be minimally likely to break the build for other systems.
Change-Id: Ie03507fadf0d843a4d4d52f283c44a416c6f2a74 Reviewed-on: https://gem5-review.googlesource.com/3646 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org> |
12055:945e851d846b |
03-Jun-2017 |
Gabe Black <gabeblack@google.com> |
dev: Refactor the EtherTapStub to make room for using tap.
A lot of the implementation of EtherTapStub can be shared with a version which uses a tap device directly. This change factors out those parts to accommodate that.
Change-Id: I9c2e31f1be139ca73859a83f05457cef90101006 Reviewed-on: https://gem5-review.googlesource.com/3645 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org> |
12054:ab04045965d1 |
03-Jun-2017 |
Gabe Black <gabeblack@google.com> |
dev: Rename EtherTap to be EtherTapStub.
The EtherTap object is going to be reworked so that it connects to a tap device directly, but it's worthwhile to still be able to use the m5tap utility (util/tap) to send/receive packets on systems which don't support tap but do support the pcap API. It can also be used to replay ethernet frames, to capture the ethernet frames coming from gem5 for analysis, to programmatically consume and/or generate the frames, or even to forward them to/from a remote system.
Change-Id: Ic7bd763d86cd913ac373dd10a8d6d1fc6b35f95a Reviewed-on: https://gem5-review.googlesource.com/3644 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org> |
12052:616deda85421 |
01-Jun-2017 |
Gabe Black <gabeblack@google.com> |
dev: Add a missing parameter to the EtherTap device.
There needs to be a SlavePort called "tap" for the ethertap device to be able to connect to the gem5 network successfully.
Change-Id: I1ad81219f612fd1ec278c6148af728d20bc916da Reviewed-on: https://gem5-review.googlesource.com/3580 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org> |
11990:5fad911cc326 |
29-Jan-2017 |
Andreas Sandberg <andreas.sandberg@arm.com> |
base, sim, dev: Remove SWIG
Remove SWIG guards and SWIG-specific C++ code.
Change-Id: Icaad6720513b6f48153727ef3f70e0dba0df4bee Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> |
11810:de0de48a2d1c |
09-Feb-2017 |
Bjoern A. Zeeb <baz21@cam.ac.uk> |
dev: net/i8254xGBe add two more wakeup registers to ignore
There are drivers writing to WUFC uncondtionally of anything. In order to not panic gem5 in these cases, ignore writes to WUFC and WUS as we do for WUC. Similarly return 0 (default reset value) on reads.
Testing Done: Booted in FS with such a driver revision which would previously panic and now boots fine.
Reviewed at http://reviews.gem5.org/r/3791/
Signed-off-by: Jason Lowe-Power <jason@lowepower.com> |
11800:54436a1784dc |
09-Nov-2016 |
Brandon Potter <brandon.potter@amd.com> |
style: [patch 3/22] reduce include dependencies in some headers
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include. |
11757:78ef8daecd81 |
06-Dec-2016 |
Gabor Dozsa <gabor.dozsa@arm.com> |
dev: Fix race conditions at terminating dist-gem5 simulations
Two problems may arise when a distributed gem5 simulation terminates: (i) simulation thread(s) may get stuck in an incomplete synchronisation event which prohibits processing the simulation exit event; and (ii) a stale receiver thread may try to access objects that have already been deleted while exiting gem5. This patch terminates receive threads properly and aborts the processing of any incomplete synchronisation event.
Change-Id: I72337aa12c7926cece00309640d478b61e55a429 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
11719:e832056deaed |
29-Nov-2016 |
Michael LeBeane <michael.lebeane@amd.com> |
dev: Fix buffer length when unserializing an eth pkt
Changeset 11701 only serialized the useful portion of of an ethernet packets' payload. However, the device models expect each ethernet packet to contain a 16KB buffer, even if there is no data in it. This patch adds a 'bufLength' field to EthPacketData so the original size of the packet buffer can always be unserialized.
Reported-by: Gabor Dozsa <Gabor.Dozsa@arm.com> |
11703:08b78e0a3717 |
26-Oct-2016 |
Michael LeBeane <michael.lebeane@amd.com> |
dev: Add m5 op to toggle synchronization for dist-gem5. This patch adds the ability for an application to request dist-gem5 to begin/ end synchronization using an m5 op. When toggling on sync, all nodes agree on the next sync point based on the maximum of all nodes' ticks. CPUs are suspended until the sync point to avoid sending network messages until sync has been enabled. Toggling off sync acts like a global execution barrier, where all CPUs are disabled until every node reaches the toggle off point. This avoids tricky situations such as one node hitting a toggle off followed by a toggle on before the other nodes hit the first toggle off. |
11701:5e7599457b97 |
26-Oct-2016 |
mlebeane <michael.lebeane@amd.com> |
dev: Add 'simLength' parameter in EthPacketData Currently, all the network devices create a 16K buffer for the 'data' field in EthPacketData, and use 'length' to keep track of the size of the packet in the buffer. This patch introduces the 'simLength' parameter to EthPacketData, which is used to hold the effective length of the packet used for all timing calulations in the simulator. Serialization is performed using only the useful data in the packet ('length') and not necessarily the entire original buffer. |
11622:0b2aaf6f5c78 |
13-Sep-2016 |
Michael LeBeane <michael.lebeane@amd.com> |
dev: Exit correctly in dist-gem5 The receiver thread in dist_iface is allowed to directly exit the simulation. This can cause exit to be called twice if the main thread simultaneously wants to exit the simulation. Therefore, have the receiver thread enqueue a request to exit on the primary event queue for the main simulation thread to handle. |
11562:a16337161285 |
19-Jul-2016 |
Mohammad Alian <m.alian1369@gmail.com> |
dev, dist: Fixed a scheduling bug in the etherswitch
This patch fixes a bug in etherswitch. When a packet gets inserted in the output fifo, the txEvent has to always be reschedule, not only when an event is already scheduled. This can raise the assertion in the reschedule function. |
11533:2aa4d7bd47ec |
08-Jun-2016 |
Mohammad Alian <m.alian1369@gmail.com> |
dist, dev: Fixed the packet ordering in etherswitch
This patch fixes the order that packets gets pushed into the output fifo of etherswitch. If two packets arrive at the same tick to the etherswitch, we sort and push them based on their source port id. In dist-gem5 simulations, if there is no ordering inforced while two packets arrive at the same tick, it can lead to non-deterministic simulations
Committed by Jason Lowe-Power <power.jg@gmail.com> |
11522:348411ec525a |
06-Jun-2016 |
Stephan Diestelhorst <stephan.diestelhorst@arm.com> |
sim: Call regStats of base-class as well
We want to extend the stats of objects hierarchically and thus it is necessary to register the statistics of the base-class(es), as well. For now, these are empty, but generic stats will be added there.
Patch originally provided by Akash Bagdia at ARM Ltd. |
11359:b0b976a1ceda |
27-Nov-2015 |
Andreas Sandberg <andreas@sandberg.pp.se> |
base: Add support for changing output directories
This changeset adds support for changing the simulator output directory. This can be useful when the simulation goes through several stages (e.g., a warming phase, a simulation phase, and a verification phase) since it allows the output from each stage to be located in a different directory. Relocation is done by calling core.setOutputDir() from Python or simout.setOutputDirectory() from C++.
This change affects several parts of the design of the gem5's output subsystem. First, files returned by an OutputDirectory instance (e.g., simout) are of the type OutputStream instead of a std::ostream. This allows us to do some more book keeping and control re-opening of files when the output directory is changed. Second, new subdirectories are OutputDirectory instances, which should be used to create files in that sub-directory.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> |
11341:bda2c39fd9fd |
15-Feb-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
misc: Add missing overrides to appease clang
Since the last round of fixes a few new issues have snuck in. We should consider switching the regression runs to clang. |
11325:67cc559d513a |
06-Feb-2016 |
Steve Reinhardt <steve.reinhardt@amd.com> |
style: eliminate explicit boolean comparisons
Result of running 'hg m5style --skip-all --fix-control -a' to get rid of '== true' comparisons, plus trivial manual edits to get rid of '== false'/'== False' comparisons.
Left a couple of explicit comparisons in where they didn't seem unreasonable: invalid boolean comparison in src/arch/mips/interrupts.cc:155 >> DPRINTF(Interrupt, "Interrupts OnCpuTimerINterrupt(tc) == true\n");<< invalid boolean comparison in src/unittest/unittest.hh:110 >> "EXPECT_FALSE(" #expr ")", (expr) == false)<< |
11320:42ecb523c64a |
06-Feb-2016 |
Steve Reinhardt <steve.reinhardt@amd.com> |
style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'. |
11317:766c3eb44fd8 |
06-Feb-2016 |
Mohammad Alian <m.alian1369@gmail.com> |
dist, dev: add an ethernet switch model |
11299:72046b9b3323 |
17-Jan-2016 |
Steve Reinhardt <steve.reinhardt@amd.com> |
sim: don't ignore SIG_TRAP
By ignoring SIG_TRAP, using --debug-break <N> when not connected to a debugger becomes a no-op. Apparently this was intended to be a feature, though the rationale is not clear.
If we don't ignore SIG_TRAP, then using --debug-break <N> when not connected to a debugger causes the simulation process to terminate at tick N. This is occasionally useful, e.g., if you just want to collect a trace for a specific window of execution then you can combine this with --debug-start to do exactly that.
In addition to not ignoring the signal, this patch also updates the --debug-break help message and deletes a handful of unprotected calls to Debug::breakpoint() that relied on the prior behavior. |
11294:a368064a2ab5 |
11-Jan-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
scons: Enable -Wextra by default
Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial. |
11290:1640dd68b0a4 |
07-Jan-2016 |
Gabor Dozsa <gabor.dozsa@arm.com> |
dev: Distributed Ethernet link for distributed gem5 simulations
Distributed gem5 (abbreviated dist-gem5) is the result of the convergence effort between multi-gem5 and pd-gem5 (from Univ. of Wisconsin). It relies on the base multi-gem5 infrastructure for packet forwarding, synchronisation and checkpointing but combines those with the elaborated network switch model from pd-gem5. |
11263:8dcc6b40f164 |
10-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
dev: Move network devices to src/dev/net/ |