History log of /gem5/src/arch/x86/linux/
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
14130:62df30844a66 11-Mar-2019 Brandon Potter <brandon.potter@amd.com>

sim-se: add new getpgrp system call

This changeset adds new (relatively simple) system call
support. The getpgrp call returns a thread context's
pgid.

Change-Id: I361bdbfb9c01b761ddd5a4923d23f86971f8d614
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17111
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>

14129:7a41ca7e465c 12-Mar-2019 Matthew Sinclair <matthew.sinclair@amd.com>

sim-se: adding pipe2 syscall

pipe2 builds on top of the pipe syscall implementation by
adding some extra flags for the files (to avoid have to
make separate calls to fcntl).

Change-Id: I88cf6f1387b9d14e60b33a32db412da9ed93a3e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12310
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>

14024:abe47b13653d 02-May-2019 Gabe Black <gabeblack@google.com>

arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.

These two functions were performing the same function but had two
different names for historical reasons. This change merges them
together, keeping the getVirtProxy name to be consistent with the
getPhysProxy method used to get a non-translating proxy port.

Change-Id: Idd83c6b899f9343795075b030ccbc723a79e52a4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18581
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

14020:c9bf7a011602 02-May-2019 Gabe Black <gabeblack@google.com>

arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s.

Al(most) all of the interesting differences between the two classes
have been removed. There are some control methods which are still
specific to each type which may require treating them as their true
type, but most code that consumes them doesn't need to worry about
which is which.

Change-Id: Ie592676f1e496c7940605b66e55cd7fae18e59d6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18577
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

14014:ce216ee5d886 21-May-2019 Ciro Santilli <ciro.santilli@arm.com>

sim-se: add a release parameter to Process.py

Set the default release to that single value for all ISAs.

glibc has checks for the kernel version based on uname, and refuses
to start any syscall emulation programs if those checks don't pass with
error:

FATAL: kernel too old

The ideal solution to this problem is to actually implement all missing
system calls for the required kernel version and bumping the release
accordingly.

However, it is very hard to implement all missing syscalls and verify
compliance.

Previously, we have simply bumped the version manually from time to
time when major glibc versions started breaking.

This commit alleviates the problem in two ways.

Firstly, having a single kernel version for all versions means that it is
easier to bump all versions at once.

Secondly, it makes it is possible to set the release with a parameter,
which in turn can be set from the command line with:

se.py --param 'system.cpu[:].workload[:].release = "4.18.0"'

Change-Id: I9e3c31073bfe68735f7b0775c8e299aa62b98222
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17849
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>

14010:0e1e887507c0 01-May-2019 Gabe Black <gabeblack@google.com>

arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods.

Change-Id: Ia73b2d86a10d02fa09c924a4571477bb5f200eb7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18572
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

13995:5d459168a680 28-Aug-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: change syscall function signature

The system calls had four parameters. One of the parameters
is ThreadContext and another is Process. The ThreadContext
holds the value of the current process so the Process parameter
is redundant since the system call functions already have
indirect access.

With the old API, it is possible to call into the functions with
the wrong supplied Process which could end up being a confusing
error.

This patch removes the redundancy by forcing access through the
ThreadContext field within each system call.

Change-Id: Ib43d3f65824f6d425260dfd9f67de1892b6e8b7c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12299
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>

13989:e1ebe4024faf 03-May-2019 Gabe Black <gabeblack@google.com>

x86: Add an object file loader for linux.

Change-Id: I283dd1f52fd020ad3c226eb00fc9216ee034c67f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18630
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

13933:b4382461066d 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: add eventfd system call

Change-Id: I7aeb4fe808d0c8f2fb8041e3662d330d8458f09c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12125
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

13613:a19963be12ca 20-Nov-2018 Gabe Black <gabeblack@google.com>

x86: Stop using/defining some ISA specific register types.

These have been replaced with the generic RegVal type.

Change-Id: I75c1134212067dea43aa0903d813633e06f3d6c6
Reviewed-on: https://gem5-review.googlesource.com/c/14476
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

13572:14ddf44aaebc 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se add readv and modifies writev

Change-Id: I6cbce4389d5697da34058dc910306394e48c6582
Reviewed-on: https://gem5-review.googlesource.com/c/12117
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

13571:a320800ceccf 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: add ability to get/set sock metadata

Add getsockopt, getsockname, setsockname, and getpeername
system calls.

Change-Id: Ifa1d9a95f15b4fb12859dbfd3c4bd248de2e3d32
Reviewed-on: https://gem5-review.googlesource.com/c/12116
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

13570:b6484720c6a9 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: add syscalls related to polling

Fix poll so that it will use the syscall retry capability
instead of causing a blocking call.

Add the accept and wait4 system calls.

Add polling to read to remove deadlocks that occur in the
event queue that are caused by blocking system calls.

Modify the write system call to return an error number in
case of error.

Change-Id: I0b4091a2e41e4187ebf69d63e0088f988f37d5da
Reviewed-on: https://gem5-review.googlesource.com/c/12115
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

13569:47a2291177a7 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: add calls for network transmissions

Add recvfrom, sendto, recvmsg, and sendmsg system calls.

Change-Id: I2eb50ea7823c8af57d99b3b8d443d2099418c06c
Reviewed-on: https://gem5-review.googlesource.com/c/12114
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

13568:9c11b79e3223 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

sim-se: add socket-based functionality

Add socket, socketpair, bind, list, connect and shutdown
system calls.

Change-Id: I635af3fca410f96fe28f8fe497e3d457a9dbc470
Reviewed-on: https://gem5-review.googlesource.com/c/12113
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

13536:77e19417e723 09-Jan-2019 Andreas Sandberg <andreas.sandberg@arm.com>

sim-se: Refactor clone to avoid most ifdefs

Some parts of clone are architecture dependent. In some cases, we are
able to use architecture-specific helper functions or register
aliases. However, there is still some architecture-specific that is
protected by ifdefs in the common clone implementation.

Move these architecture-specific bits to the architecture-specific OS
class instead to avoid these ifdefs and make the code a bit more
readable.

Change-Id: Ia0903d738d0ba890863bddfa77e3b717db7f45de
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15435
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

13479:5a1924882c60 30-Nov-2018 Tony Gutierrez <anthony.gutierrez@amd.com>

arch-x86: Add sys/syscall.h to x86 process.cc/syscall_emul.cc

Change a66d12c guards the selection of getdents()
in x86's process.cc file with SYS_getdents, however
process.cc does not include the right header for
SYS_getdents, which leads to x86 choosing the
unimplemented call. This change adds sys/syscall.h to
address the problem.

This change also adds sys/syscall.hh to syscall_emu.cc,
which only includes syscall.hh and may not be supported on
all systems.

Change-Id: If1adcf41e9e455de5f2827ba98c542fdcacdc22e
Reviewed-on: https://gem5-review.googlesource.com/c/14775
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

13448:94861018bb62 20-Nov-2018 Ciro Santilli <ciro.santilli@arm.com>

sim-se: only implement getdentsFunc on supported hosts

The implementation of the getdents syscall relies on SYS_getdents, which
is not available on all archs, because the getdents syscall has been
superseded by getdents64, and does not exist on newer archs such as
aarch64.

This leads the build to break on aarch64 hosts with error:

error: 'SYS_getdents' was not declared in this scope

Change-Id: I8701fb5b61c0418b14a9463ef135a391a7f7a9ba
Reviewed-on: https://gem5-review.googlesource.com/c/14596
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

13031:47510ddc366d 18-Apr-2018 Brandon Potter <brandon.potter@amd.com>

syscall_emul: implement dir-related syscalls

Add getdents, rmdir, chdir, and mknod to SE mode for x86.

Change-Id: I387ea3066869e8999bc0064f74070f4e47c1e9a1
Reviewed-on: https://gem5-review.googlesource.com/12112
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

12796:16dffc0e6c7f 21-Jun-2018 Matt Sinclair <mattdsinclair@gmail.com>

syscall_emul: adding symlink system call

Change-Id: Iebda05c130b4d2ee8434cad1e703933bfda486c8
Reviewed-on: https://gem5-review.googlesource.com/11490
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

12795:6e69f6a3c0c0 21-Jun-2018 Matt Sinclair <mattdsinclair@gmail.com>

syscall_emul: adding link system call

Change-Id: If8922c2233bbe1f6fce35f64d1a44b91d2cfeed2
Reviewed-on: https://gem5-review.googlesource.com/11489
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

12686:cb4323a81859 03-May-2018 Tony Gutierrez <anthony.gutierrez@amd.com>

arch-x86: Enable fstatfs for x86_64

Change-Id: Ic871f852c4892f2228f0d9bb3cc5cb66887d9736
Reviewed-on: https://gem5-review.googlesource.com/10201
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12681:7fca312f8ee6 01-May-2018 Tony Gutierrez <anthony.gutierrez@amd.com>

arch-x86: Enable the umask system call

Change-Id: I309beb1604657e8d1807ac90458709df57f0f819
Reviewed-on: https://gem5-review.googlesource.com/10161
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

12594:fd59092634f8 09-Mar-2018 Jason Lowe-Power <jason@lowepower.com>

arch-x86,sim-se: Enable prlimit syscall

Change-Id: I15f0e5ddb72578de90ed68866c8a0c1501717d61
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/8921
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

12592:29b4451fd0b5 09-Mar-2018 Jason Lowe-Power <jason@lowepower.com>

arch-x86,sim-se: Bump kernel version to 3.2

Current glibc expects at least kernel 3.2. Bump this so syscall emulation
with dynamically-linked binaries works.

Change-Id: I07077ed2de14c308f6ff79cae677915612557332
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/8903
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

11912:548f80d225e6 01-Mar-2017 Brandon Potter <Brandon.Potter@amd.com>

syscall-emul: Ignore unimplemented system calls

This changeset sets the implementation policy for a subset of
system calls to the ignoreFunc implementation (for x86 only).
The ignored system calls likely will never be implemented and
this allows a warning to be issued instead of the simulation
exiting with a fatal.

Change-Id: I8d9741ad683151e88cc71156d3602e2d0ccb0acf
Reviewed-on: https://gem5-review.googlesource.com/2270
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

11910:b33a207489a2 01-Mar-2017 Brandon Potter <Brandon.Potter@amd.com>

syscall-emul: Add the tgkill system call

This changeset adds support to kill a thread group by calling
the tgkill system call. The functionality is needed in some
pthread applications.

Change-Id: I0413a3331be69b74dfab30de95384113ec4efb63
Reviewed-on: https://gem5-review.googlesource.com/2268
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>

11908:2fd0307d03e9 01-Mar-2017 Brandon Potter <Brandon.Potter@amd.com>

syscall-emul: Add or extend dup, dup2, and pipe

This changeset extends the pipe system call to work with
architectures other than Alpha (and enables the syscall for
x86). For the dup system call, it sets the clone-on-exec
flag by default. For the dup2 system call, the changeset
adds an implementation (and enables it for x86).

Change-Id: I00ddb416744ee7dd61a5cd02c4c3d97f30543878
Reviewed-on: https://gem5-review.googlesource.com/2266
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>

11907:48a3d32da9d8 01-Mar-2017 Brandon Potter <Brandon.Potter@amd.com>

syscall-emul: Add functionality to open syscalls

This changeset adds refactors the existing open system call,
adds the openat variant (enabled for x86 builds), and adds
additional "special file" test cases for /proc/meminfo and
/etc/passwd.

Change-Id: I6f429db65bbf2a28ffa3fd12df518c2d0de49663
Reviewed-on: https://gem5-review.googlesource.com/2265
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>

11906:4b99c1bb3b72 01-Mar-2017 Brandon Potter <Brandon.Potter@amd.com>

style: Correct some style issues

This changeset fixes line alignment issues, spacing, spelling,
etc. for files that are used during SE Mode.

Change-Id: Ie61b8d0eb4ebb5af554d72f1297808027833616e
Reviewed-on: https://gem5-review.googlesource.com/2264
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Pierre-Yves PĂ©neau <pierre-yves.peneau@lirmm.fr>

11886:43b882cada33 27-Feb-2017 Brandon Potter <brandon.potter@amd.com>

syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations

Modifies the clone system call and adds execve system call. Requires allowing
processes to steal thread contexts from other processes in the same system
object and the ability to detach pieces of process state (such as MemState)
to allow dynamic sharing.

11885:79af314e9f0d 27-Feb-2017 Brandon Potter <brandon.potter@amd.com>

syscall_emul: [patch 14/22] adds identifier system calls

This changeset add fields to the process object and adds the following
three system calls: setpgid, gettid, getpid.

11875:8e928c0f98d1 20-Jul-2015 Brandon Potter <brandon.potter@amd.com>

syscall_emul: [patch 11/22] extend functionality of fcntl

This changeset adds the ability to set a close-on-exec flag for a given
file descriptor. It also reworks some of the logic surrounding setting and
retrieving flags from the file description.

11851:824055fe6b30 09-Nov-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

The EIOProcess class was removed recently and it was the only other class
which derived from Process. Since every Process invocation is also a
LiveProcess invocation, it makes sense to simplify the organization by
combining the fields from LiveProcess into Process.


/gem5/configs/common/cpu2000.py
/gem5/configs/example/apu_se.py
/gem5/configs/example/se.py
/gem5/configs/learning_gem5/part1/simple.py
/gem5/configs/learning_gem5/part1/two_level.py
/gem5/configs/splash2/cluster.py
/gem5/configs/splash2/run.py
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/linux/process.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/process.hh
/gem5/src/arch/arm/freebsd/process.cc
/gem5/src/arch/arm/freebsd/process.hh
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/process.hh
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/process.hh
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/process.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/linux/process.hh
/gem5/src/arch/power/process.cc
/gem5/src/arch/power/process.hh
/gem5/src/arch/riscv/linux/process.cc
/gem5/src/arch/riscv/linux/process.hh
/gem5/src/arch/riscv/process.cc
/gem5/src/arch/riscv/process.hh
/gem5/src/arch/sparc/faults.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/linux/process.hh
/gem5/src/arch/sparc/linux/syscalls.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/solaris/process.hh
process.cc
process.hh
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/gpu-compute/cl_driver.cc
/gem5/src/gpu-compute/cl_driver.hh
/gem5/src/kern/freebsd/freebsd.hh
/gem5/src/kern/linux/linux.cc
/gem5/src/kern/linux/linux.hh
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/operatingsystem.hh
/gem5/src/sim/Process.py
/gem5/src/sim/emul_driver.hh
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/syscall_desc.cc
/gem5/src/sim/syscall_desc.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/tests/long/se/10.mcf/test.py
/gem5/tests/long/se/20.parser/test.py
/gem5/tests/long/se/30.eon/test.py
/gem5/tests/long/se/40.perlbmk/test.py
/gem5/tests/long/se/50.vortex/test.py
/gem5/tests/long/se/60.bzip2/test.py
/gem5/tests/long/se/70.twolf/test.py
/gem5/tests/quick/se/00.hello.mp/test.py
/gem5/tests/quick/se/00.hello/test.py
/gem5/tests/quick/se/01.hello-2T-smt/test.py
/gem5/tests/quick/se/02.insttest/test.py
/gem5/tests/quick/se/04.gpu/test.py
/gem5/tests/quick/se/10.mcf/test.py
/gem5/tests/quick/se/30.eon/test.py
/gem5/tests/quick/se/40.m5threads-test-atomic/test.py
/gem5/tests/quick/se/50.vortex/test.py
/gem5/tests/quick/se/70.twolf/test.py
11794:97eebddaae84 09-Nov-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .cc

The class was crammed into syscall_emul.hh which has tons of forward
declarations and template definitions. To clean it up a bit, moved the
class into separate files and commented the class with doxygen style
comments. Also, provided some encapsulation by adding some accessors and
a mutator.

The syscallreturn.hh file was renamed syscall_return.hh to make it consistent
with other similarly named files in the src/sim directory.

The DPRINTF_SYSCALL macro was moved into its own header file with the
include the Base and Verbose flags as well.

11793:ef606668d247 09-Nov-2016 Brandon Potter <brandon.potter@amd.com>

style: [patch 1/22] use /r/3648/ to reorganize includes


/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/idle_event.cc
/gem5/src/arch/alpha/ipr.cc
/gem5/src/arch/alpha/isa.cc
/gem5/src/arch/alpha/kernel_stats.cc
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/pagetable.cc
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/stacktrace.cc
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/alpha/vtophys.cc
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/mem.cc
/gem5/src/arch/arm/insts/mem64.cc
/gem5/src/arch/arm/insts/misc.cc
/gem5/src/arch/arm/insts/pseudo.cc
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/interrupts.cc
/gem5/src/arch/arm/isa.cc
/gem5/src/arch/arm/kvm/base_cpu.cc
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/miscregs.cc
/gem5/src/arch/arm/nativetrace.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/stacktrace.cc
/gem5/src/arch/arm/stage2_lookup.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/arm/vtophys.cc
/gem5/src/arch/generic/decode_cache.cc
/gem5/src/arch/generic/mmapped_ipr.cc
/gem5/src/arch/generic/pseudo_inst.cc
/gem5/src/arch/mips/bare_iron/system.cc
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/faults.cc
/gem5/src/arch/mips/idle_event.cc
/gem5/src/arch/mips/interrupts.cc
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/pagetable.cc
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/remote_gdb.cc
/gem5/src/arch/mips/stacktrace.cc
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/vtophys.cc
/gem5/src/arch/power/insts/branch.cc
/gem5/src/arch/power/insts/mem.cc
/gem5/src/arch/power/insts/static_inst.cc
/gem5/src/arch/power/isa.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/pagetable.cc
/gem5/src/arch/power/process.cc
/gem5/src/arch/power/stacktrace.cc
/gem5/src/arch/power/tlb.cc
/gem5/src/arch/power/utility.cc
/gem5/src/arch/sparc/faults.cc
/gem5/src/arch/sparc/isa.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/nativetrace.cc
/gem5/src/arch/sparc/pagetable.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/ua2005.cc
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/e820.cc
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/cpuid.cc
/gem5/src/arch/x86/decoder.cc
/gem5/src/arch/x86/emulenv.cc
/gem5/src/arch/x86/faults.cc
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/micromediaop.cc
/gem5/src/arch/x86/insts/microop.cc
/gem5/src/arch/x86/insts/microregop.cc
/gem5/src/arch/x86/insts/static_inst.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/isa.cc
process.cc
system.cc
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/pseudo_inst.cc
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/stacktrace.cc
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/types.cc
/gem5/src/arch/x86/utility.cc
/gem5/src/arch/x86/vtophys.cc
/gem5/src/base/atomicio.cc
/gem5/src/base/bigint.cc
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cprintf.cc
/gem5/src/base/debug.cc
/gem5/src/base/hostinfo.cc
/gem5/src/base/inet.cc
/gem5/src/base/inifile.cc
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/dtb_object.cc
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/raw_object.cc
/gem5/src/base/loader/symtab.cc
/gem5/src/base/match.cc
/gem5/src/base/misc.cc
/gem5/src/base/output.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/random.cc
/gem5/src/base/remote_gdb.cc
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/str.cc
/gem5/src/base/time.cc
/gem5/src/base/trace.cc
/gem5/src/base/vnc/vncinput.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/cpu/activity.cc
/gem5/src/cpu/base.cc
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/dummy_checker.cc
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/func_unit.cc
/gem5/src/cpu/inteltrace.cc
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/kvm/base.cc
/gem5/src/cpu/kvm/perfevent.cc
/gem5/src/cpu/kvm/timer.cc
/gem5/src/cpu/kvm/vm.cc
/gem5/src/cpu/kvm/x86_cpu.cc
/gem5/src/cpu/minor/activity.cc
/gem5/src/cpu/minor/cpu.cc
/gem5/src/cpu/minor/decode.cc
/gem5/src/cpu/minor/dyn_inst.cc
/gem5/src/cpu/minor/execute.cc
/gem5/src/cpu/minor/fetch1.cc
/gem5/src/cpu/minor/fetch2.cc
/gem5/src/cpu/minor/func_unit.cc
/gem5/src/cpu/minor/lsq.cc
/gem5/src/cpu/minor/pipeline.cc
/gem5/src/cpu/minor/scoreboard.cc
/gem5/src/cpu/nativetrace.cc
/gem5/src/cpu/o3/base_dyn_inst.cc
/gem5/src/cpu/o3/checker.cc
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/deriv.cc
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/fu_pool.cc
/gem5/src/cpu/o3/probe/simple_trace.cc
/gem5/src/cpu/o3/regfile.cc
/gem5/src/cpu/o3/rename_map.cc
/gem5/src/cpu/o3/scoreboard.cc
/gem5/src/cpu/o3/store_set.cc
/gem5/src/cpu/o3/thread_context.cc
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/pred/2bit_local.cc
/gem5/src/cpu/pred/bi_mode.cc
/gem5/src/cpu/pred/btb.cc
/gem5/src/cpu/pred/tournament.cc
/gem5/src/cpu/profile.cc
/gem5/src/cpu/quiesce_event.cc
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/probes/simpoint.cc
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple_thread.cc
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/testers/directedtest/DirectedGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.cc
/gem5/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
/gem5/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/rubytest/Check.cc
/gem5/src/cpu/testers/rubytest/CheckTable.cc
/gem5/src/cpu/testers/rubytest/RubyTester.cc
/gem5/src/cpu/thread_context.cc
/gem5/src/cpu/thread_state.cc
/gem5/src/cpu/timing_expr.cc
/gem5/src/dev/alpha/backdoor.cc
/gem5/src/dev/alpha/tsunami.cc
/gem5/src/dev/alpha/tsunami_cchip.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/arm/a9scu.cc
/gem5/src/dev/arm/amba_device.cc
/gem5/src/dev/arm/amba_fake.cc
/gem5/src/dev/arm/energy_ctrl.cc
/gem5/src/dev/arm/gic_pl390.cc
/gem5/src/dev/arm/hdlcd.cc
/gem5/src/dev/arm/kmi.cc
/gem5/src/dev/arm/pl011.cc
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/arm/realview.cc
/gem5/src/dev/arm/rtc_pl031.cc
/gem5/src/dev/arm/timer_cpulocal.cc
/gem5/src/dev/arm/timer_sp804.cc
/gem5/src/dev/arm/vgic.cc
/gem5/src/dev/baddev.cc
/gem5/src/dev/intel_8254_timer.cc
/gem5/src/dev/io_device.cc
/gem5/src/dev/isa_fake.cc
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mips/malta.cc
/gem5/src/dev/mips/malta_cchip.cc
/gem5/src/dev/mips/malta_io.cc
/gem5/src/dev/pci/device.cc
/gem5/src/dev/pci/host.cc
/gem5/src/dev/platform.cc
/gem5/src/dev/ps2.cc
/gem5/src/dev/ps2.hh
/gem5/src/dev/sparc/dtod.cc
/gem5/src/dev/sparc/iob.cc
/gem5/src/dev/sparc/mm_disk.cc
/gem5/src/dev/sparc/t1000.cc
/gem5/src/dev/uart.cc
/gem5/src/dev/uart8250.cc
/gem5/src/dev/virtio/base.cc
/gem5/src/dev/virtio/block.cc
/gem5/src/dev/virtio/console.cc
/gem5/src/dev/virtio/fs9p.cc
/gem5/src/dev/virtio/pci.cc
/gem5/src/dev/x86/cmos.cc
/gem5/src/dev/x86/i8042.cc
/gem5/src/dev/x86/i82094aa.cc
/gem5/src/dev/x86/i8237.cc
/gem5/src/dev/x86/i8254.cc
/gem5/src/dev/x86/i8259.cc
/gem5/src/dev/x86/pc.cc
/gem5/src/dev/x86/south_bridge.cc
/gem5/src/dev/x86/speaker.cc
/gem5/src/kern/linux/linux.cc
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/system_events.cc
/gem5/src/mem/abstract_mem.cc
/gem5/src/mem/bridge.cc
/gem5/src/mem/cache/prefetch/base.cc
/gem5/src/mem/cache/prefetch/queued.cc
/gem5/src/mem/cache/prefetch/stride.cc
/gem5/src/mem/coherent_xbar.cc
/gem5/src/mem/comm_monitor.cc
/gem5/src/mem/dram_ctrl.cc
/gem5/src/mem/drampower.cc
/gem5/src/mem/dramsim2.cc
/gem5/src/mem/dramsim2_wrapper.cc
/gem5/src/mem/external_master.cc
/gem5/src/mem/external_slave.cc
/gem5/src/mem/fs_translating_port_proxy.cc
/gem5/src/mem/hmc_controller.cc
/gem5/src/mem/mem_checker.cc
/gem5/src/mem/mem_checker_monitor.cc
/gem5/src/mem/noncoherent_xbar.cc
/gem5/src/mem/packet.cc
/gem5/src/mem/packet_queue.cc
/gem5/src/mem/page_table.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/port.cc
/gem5/src/mem/port_proxy.cc
/gem5/src/mem/probes/base.cc
/gem5/src/mem/ruby/common/Histogram.cc
/gem5/src/mem/ruby/common/NetDest.cc
/gem5/src/mem/ruby/common/SubBlock.cc
/gem5/src/mem/ruby/filters/BlockBloomFilter.cc
/gem5/src/mem/ruby/filters/BulkBloomFilter.cc
/gem5/src/mem/ruby/filters/H3BloomFilter.cc
/gem5/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
/gem5/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
/gem5/src/mem/ruby/filters/MultiGrainBloomFilter.cc
/gem5/src/mem/ruby/filters/NonCountingBloomFilter.cc
/gem5/src/mem/ruby/network/MessageBuffer.cc
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/Topology.cc
/gem5/src/mem/ruby/network/simple/PerfectSwitch.cc
/gem5/src/mem/ruby/network/simple/PerfectSwitch.hh
/gem5/src/mem/ruby/network/simple/SimpleNetwork.cc
/gem5/src/mem/ruby/network/simple/Switch.cc
/gem5/src/mem/ruby/network/simple/Throttle.cc
/gem5/src/mem/ruby/profiler/AccessTraceForAddress.cc
/gem5/src/mem/ruby/profiler/AddressProfiler.cc
/gem5/src/mem/ruby/profiler/StoreTrace.cc
/gem5/src/mem/ruby/slicc_interface/AbstractController.cc
/gem5/src/mem/ruby/slicc_interface/AbstractController.hh
/gem5/src/mem/ruby/slicc_interface/RubyRequest.cc
/gem5/src/mem/ruby/structures/BankedArray.cc
/gem5/src/mem/ruby/structures/CacheMemory.cc
/gem5/src/mem/ruby/structures/DirectoryMemory.cc
/gem5/src/mem/ruby/structures/LRUPolicy.cc
/gem5/src/mem/ruby/structures/Prefetcher.cc
/gem5/src/mem/ruby/structures/PseudoLRUPolicy.cc
/gem5/src/mem/ruby/structures/WireBuffer.cc
/gem5/src/mem/ruby/system/CacheRecorder.cc
/gem5/src/mem/ruby/system/DMASequencer.cc
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/se_translating_port_proxy.cc
/gem5/src/mem/serial_link.cc
/gem5/src/mem/simple_mem.cc
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/snoop_filter.cc
/gem5/src/mem/tport.cc
/gem5/src/mem/xbar.cc
/gem5/src/proto/protoio.cc
/gem5/src/python/swig/pyevent.cc
/gem5/src/python/swig/pyevent.hh
/gem5/src/python/swig/pyobject.cc
/gem5/src/sim/arguments.cc
/gem5/src/sim/backtrace_glibc.cc
/gem5/src/sim/clock_domain.cc
/gem5/src/sim/core.cc
/gem5/src/sim/cxx_manager.cc
/gem5/src/sim/debug.cc
/gem5/src/sim/dvfs_handler.cc
/gem5/src/sim/faults.cc
/gem5/src/sim/init.cc
/gem5/src/sim/probe/probe.cc
/gem5/src/sim/process.cc
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/py_interact.cc
/gem5/src/sim/root.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/sim_events.cc
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/stat_control.cc
/gem5/src/sim/stat_control.hh
/gem5/src/sim/sub_system.cc
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/system.cc
/gem5/src/sim/voltage_domain.cc
/gem5/src/unittest/circlebuf.cc
/gem5/src/unittest/unittest.cc
11760:f9aa72424274 15-Dec-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: implement fallocate

11759:deaf82fd2e7c 15-Dec-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: add support for x86 statfs system calls

11594:0d151793b2f3 05-Aug-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

sim: fix issues with pwrite(); don't enable fstatfs

this patch fixes issues with changeset 11593

use the host's pwrite() syscall for pwrite64Func(),
as opposed to pwrite64(), because pwrite64() does
not work well on all distros.

undo the enabling of fstatfs, as we will add this
in a separate pate.

11593:ba45735a726a 04-Aug-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

x86, sim: add some syscalls to X86

this patch adds an implementation for the pwrite64 syscall and
enables it for x86_64, and enables fstatfs for x86_64.

11414:cfad34a15729 01-Apr-2016 Steve Reinhardt <steve.reinhardt@amd.com>

syscall_emul: remove mmapFlagTable

After all this it turns out we don't even use it.

11413:3d47d83a48eb 01-Apr-2016 Steve Reinhardt <steve.reinhardt@amd.com>

syscall_emul: factor out flag tables into common file

The openFlagTable and mmapFlagTables for emulated Linux
platforms are basically identical, but are specified
repetitively for every platform. Use a common file
that gets included for each platform so that we only
have one copy, making them more consistent and simplifying
changes (like adding #ifdefs).

In the process, made some minor fixes that slipped through
due to previous inconsistencies, and added more #ifdefs
to try to fix building on alternative hosts.

11386:94c09b607a84 17-Mar-2016 Steve Reinhardt <steve.reinhardt@amd.com>

syscall_emul: move mmapGrowsDown() to LiveProcess

The mmapGrowsDown() method was a static method on the OperatingSystem
class (and derived classes), which worked OK for the templated syscall
emulation methods, but made it hard to access elsewhere. This patch
moves the method to be a virtual function on the LiveProcess method,
where it can be overridden for specific platforms (for now, Alpha).

This patch also changes the value of mmapGrowsDown() from being false
by default and true only on X86Linux32 to being true by default and
false only on Alpha, which seems closer to reality (though in reality
most people use ASLR and this doesn't really matter anymore).

In the process, also got rid of the unused mmap_start field on
LiveProcess and OperatingSystem mmapGrowsUp variable.

11385:dbbf54058f6f 17-Mar-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: fix bugs for mmap2 system call and x86-32 syscalls

11383:5ac090acd180 17-Mar-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: extend mmap system call to support file backed mmaps

For O3, which has a stat that counts reg reads, there is an additional
reg read per mmap() call since there's an arg we no longer ignore.
Otherwise, stats should not be affected.

11382:654272b82e94 17-Mar-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: add many Linux kernel flags

11381:516213d2f0cf 17-Mar-2016 Brandon Potter <brandon.potter@amd.com>

syscall_emul: rename OpenFlagTransTable struct

The structure definition only had the open system call flag set in mind when
it was named, so we rename it here with the intention of using it to define
additional tables to translate flags for other system calls in the future.

11337:4e3bf51208ba 13-Feb-2016 Michael LeBeane <Michael.Lebeane@amd.com>

syscall_emul: Implement clock_getres() system call

This patch implements the clock_getres() system call for arm and x86 in linux
SE mode.

10955:9abf6a7c14ab 20-Jul-2015 David Hashe <david.hashe@amd.com>

syscall: Add readlink to x86 with special case /proc/self/exe

This patch implements the correct behavior.

10831:fbdaa08aaa42 05-May-2015 Steve Reinhardt <steve.reinhardt@amd.com>

syscall_emul: fix warn_once behavior

The current ignoreWarnOnceFunc doesn't really work as expected,
since it will only generate one warning total, for whichever
"warn-once" syscall is invoked first. This patch fixes that
behavior by keeping a "warned" flag in the SyscallDesc object,
allowing suitably flagged syscalls to warn exactly once per
syscall.

10796:5bcba8001c7e 22-Apr-2015 Brandon Potter <brandon.potter@amd.com>

syscall_emul: implement clock_gettime system call

10795:e9e6352c680f 22-Apr-2015 Monir Mozumder <monir.mozumder@amd.com>

syscall_emul: update x86 syscall table
Update table with additional definitions through Linux 3.13.

10495:75d2f19fecce 22-Oct-2014 Nilay Vaish <nilay@cs.wisc.edu>

sim: revert 6709bbcf564d
The identifier SYS_getdents is not available on Mac OS X. Therefore, its use
results in compilation failure. It seems there is no straight forward way to
implement the system call getdents using readdir() or similar C functions.
Hence the commit 6709bbcf564d is being rolled back.

10494:ffe6ab7141ab 20-Oct-2014 Andreas Hansson <andreas.hansson@arm.com>

x86: Fixes to avoid LTO warnings

This patch fixes a few minor issues that caused link-time warnings
when using LTO, mainly for x86. The most important change is how the
syscall array is created. Previously gcc and clang would complain that
the declaration and definition types did not match. The organisation
is now changed to match how it is done for ARM, moving the code that
was previously in syscalls.cc into process.cc, and having a class
variable pointing to the static array.

With these changes, there are no longer any warnings using gcc 4.6.3
with LTO.

10484:6709bbcf564d 20-Oct-2014 Michael Adler <Michael.Adler@intel.com>

sim: implement getdents/getdents64 in user mode

Has been tested only for alpha.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>

9906:6c1d204d2d22 07-Oct-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86: enables lstat and readlink syscalls

9678:64dc8cc09e63 23-Apr-2013 Michael Levenhagen <mjleven@sandia.gov>

x86: enable gettimeofday and getppid system calls

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

9149:ccf40995e142 15-Aug-2012 Ali Saidi <Ali.Saidi@ARM.com>

sysemul: bump all linux versions of for syscal emulation to 3.0.

New tool chains seem to be looking for kernel versions newer than what
this this was previously set to. Also take this opportunity to change
the hostname we report in uname to sim.gem5.org.

9146:a61fdbbc1d45 06-Aug-2012 Marc Orr <marc.orr@gmail.com>

syscall emulation: Enabled getrlimit and getrusage for x86.
Added/moved rlimit constants to base linux header file.

This patch is a revised version of Vince Weaver's earlier patch.

9141:593fe25c86a6 06-Aug-2012 Marc Orr <marc.orr@gmail.com>

syscall emulation: Clean up ioctl handling, and implement for x86.

Enable different whitelists for different OS/arch combinations,
since some use the generic Linux definitions only, and others
use definitions inherited from earlier Unix flavors on those
architectures.

Also update x86 function pointers so ioctl is no longer
unimplemented on that platform.

This patch is a revised version of Vince Weaver's earlier patch.

9112:6e854ea87bab 11-Jul-2012 Marc Orr <marc.orr@gmail.com>

syscall emulation: Add the futex system call.

8972:9403273a3b46 29-Apr-2012 Vince Weaver <vince@csl.cornell.edu>

X86: Fix up the open system call's flags.

8971:ac4a6b6cdc93 29-Apr-2012 Vince Weaver <vince@csl.cornell.edu>

X86: Make gem5 ignore a bunch of syscalls.

8852:c744483edfcf 24-Feb-2012 Andreas Hansson <andreas.hansson@arm.com>

MEM: Make port proxies use references rather than pointers

This patch is adding a clearer design intent to all objects that would
not be complete without a port proxy by making the proxies members
rathen than dynamically allocated. In essence, if NULL would not be a
valid value for the proxy, then we avoid using a pointer to make this
clear.

The same approach is used for the methods using these proxies, such as
loadSections, that now use references rather than pointers to better
reflect the fact that NULL would not be an acceptable value (in fact
the code would break and that is how this patch started out).

Overall the concept of "using a reference to express unconditional
composition where a NULL pointer is never valid" could be done on a
much broader scale throughout the code base, but for now it is only
done in the locations affected by the proxies.


/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/linux/threadinfo.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/stacktrace.cc
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/tru64/system.cc
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/alpha/vtophys.cc
/gem5/src/arch/alpha/vtophys.hh
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/stacktrace.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/arm/vtophys.cc
/gem5/src/arch/mips/linux/threadinfo.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/stacktrace.cc
/gem5/src/arch/power/process.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/e820.cc
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
syscalls.cc
system.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/stacktrace.cc
/gem5/src/arch/x86/system.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/hex_file.hh
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/cpu/checker/thread_context.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/o3/thread_context_impl.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/cpu/thread_state.cc
/gem5/src/cpu/thread_state.hh
/gem5/src/dev/simple_disk.cc
/gem5/src/kern/tru64/tru64.hh
/gem5/src/mem/fs_translating_port_proxy.cc
/gem5/src/mem/se_translating_port_proxy.hh
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/process_impl.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.cc
/gem5/src/sim/system.hh
/gem5/src/sim/vptr.hh
8837:d492e0bb7e95 12-Feb-2012 Gabe Black <gblack@eecs.umich.edu>

X86: open flags: Another patch from Vince Weaver

8706:b1838faf3bcc 17-Jan-2012 Andreas Hansson <andreas.hansson@arm.com>

MEM: Add port proxies instead of non-structural ports

Port proxies are used to replace non-structural ports, and thus enable
all ports in the system to correspond to a structural entity. This has
the advantage of accessing memory through the normal memory subsystem
and thus allowing any constellation of distributed memories, address
maps, etc. Most accesses are done through the "system port" that is
used for loading binaries, debugging etc. For the entities that belong
to the CPU, e.g. threads and thread contexts, they wrap the CPU data
port in a port proxy.

The following replacements are made:
FunctionalPort > PortProxy
TranslatingPort > SETranslatingPortProxy
VirtualPort > FSTranslatingPortProxy


/gem5/configs/common/FSConfig.py
/gem5/configs/example/se.py
/gem5/configs/ruby/Ruby.py
/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/linux/system.hh
/gem5/src/arch/alpha/linux/threadinfo.hh
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/stacktrace.cc
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/system.hh
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/tru64/system.cc
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/alpha/vtophys.cc
/gem5/src/arch/alpha/vtophys.hh
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/stacktrace.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/system.hh
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/arm/vtophys.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/linux/threadinfo.hh
/gem5/src/arch/mips/stacktrace.cc
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/process.cc
/gem5/src/arch/sparc/linux/syscalls.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/system.hh
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
syscalls.cc
system.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/stacktrace.cc
/gem5/src/arch/x86/system.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/hex_file.hh
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/cpu/checker/thread_context.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/resources/cache_unit.cc
/gem5/src/cpu/inorder/resources/cache_unit.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_impl.hh
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/o3/thread_context_impl.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/atomic.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/simple_thread.cc
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/cpu/thread_state.cc
/gem5/src/cpu/thread_state.hh
/gem5/src/dev/simple_disk.cc
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/mem/SConscript
/gem5/src/mem/fs_translating_port_proxy.cc
/gem5/src/mem/fs_translating_port_proxy.hh
/gem5/src/mem/port.hh
/gem5/src/mem/port_impl.hh
/gem5/src/mem/port_proxy.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/RubyPortProxy.cc
/gem5/src/mem/ruby/system/RubyPortProxy.hh
/gem5/src/mem/ruby/system/SConscript
/gem5/src/mem/ruby/system/Sequencer.py
/gem5/src/mem/se_translating_port_proxy.cc
/gem5/src/mem/se_translating_port_proxy.hh
/gem5/src/mem/translating_port.cc
/gem5/src/mem/translating_port.hh
/gem5/src/mem/vport.cc
/gem5/src/mem/vport.hh
/gem5/src/sim/arguments.hh
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/process_impl.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.cc
/gem5/src/sim/system.hh
/gem5/src/sim/vptr.hh
/gem5/tests/configs/inorder-timing.py
/gem5/tests/configs/memtest-ruby.py
/gem5/tests/configs/memtest.py
/gem5/tests/configs/o3-timing-mp.py
/gem5/tests/configs/o3-timing.py
/gem5/tests/configs/rubytest-ruby.py
/gem5/tests/configs/simple-atomic-mp.py
/gem5/tests/configs/simple-atomic.py
/gem5/tests/configs/simple-timing-mp-ruby.py
/gem5/tests/configs/simple-timing-mp.py
/gem5/tests/configs/simple-timing-ruby.py
/gem5/tests/configs/simple-timing.py
8600:b0d7c64ada19 23-Oct-2011 Steve Reinhardt <steve.reinhardt@amd.com>

syscall_emul: implement MAP_FIXED option to mmap()

8229:78bf55f23338 15-Apr-2011 Nathan Binkert <nate@binkert.org>

includes: sort all includes


/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/isa.hh
/gem5/src/arch/alpha/isa/main.isa
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/mt.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/remote_gdb.hh
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/faults.hh
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/intregs.hh
/gem5/src/arch/arm/isa/includes.isa
/gem5/src/arch/arm/linux/atag.hh
/gem5/src/arch/arm/linux/linux.cc
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/process.hh
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/locked_mem.hh
/gem5/src/arch/arm/pagetable.hh
/gem5/src/arch/arm/predecoder.hh
/gem5/src/arch/arm/process.hh
/gem5/src/arch/arm/registers.hh
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/system.hh
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/vtophys.hh
/gem5/src/arch/generic/debugfaults.hh
/gem5/src/arch/generic/types.hh
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/isa.hh
/gem5/src/arch/mips/isa/includes.isa
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/linux.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/process.hh
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/system.hh
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/mips/vtophys.hh
/gem5/src/arch/power/insts/floating.hh
/gem5/src/arch/power/insts/integer.hh
/gem5/src/arch/power/isa/includes.isa
/gem5/src/arch/power/linux/linux.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/linux/process.hh
/gem5/src/arch/power/process.hh
/gem5/src/arch/power/tlb.hh
/gem5/src/arch/power/vtophys.hh
/gem5/src/arch/sparc/isa.hh
/gem5/src/arch/sparc/isa/includes.isa
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/linux.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/locked_mem.hh
/gem5/src/arch/sparc/mmapped_ipr.hh
/gem5/src/arch/sparc/nativetrace.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/remote_gdb.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/solaris/solaris.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/tlb_map.hh
/gem5/src/arch/sparc/types.hh
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/macroop.hh
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/micromediaop.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/interrupts.hh
/gem5/src/arch/x86/isa.hh
/gem5/src/arch/x86/isa/includes.isa
linux.cc
process.cc
process.hh
syscalls.cc
system.cc
system.hh
/gem5/src/arch/x86/microcode_rom.hh
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.hh
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/arch/x86/registers.hh
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cp_annotate.hh
/gem5/src/base/cprintf.hh
/gem5/src/base/debug.cc
/gem5/src/base/fast_alloc.hh
/gem5/src/base/fenv.c
/gem5/src/base/hostinfo.cc
/gem5/src/base/inet.hh
/gem5/src/base/inifile.cc
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/symtab.cc
/gem5/src/base/misc.cc
/gem5/src/base/mysql.hh
/gem5/src/base/output.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/pollevent.hh
/gem5/src/base/range_map.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/base/remote_gdb.hh
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/info.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/stats/text.hh
/gem5/src/base/str.hh
/gem5/src/base/time.hh
/gem5/src/base/trace.cc
/gem5/src/base/vnc/convert.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/base/vnc/vncserver.hh
/gem5/src/cpu/activity.cc
/gem5/src/cpu/activity.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/base_dyn_inst_impl.hh
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/checker/cpu.hh
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/cpuevent.hh
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/func_unit.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/first_stage.cc
/gem5/src/cpu/inorder/first_stage.hh
/gem5/src/cpu/inorder/inorder_cpu_builder.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.hh
/gem5/src/cpu/inorder/inorder_trace.cc
/gem5/src/cpu/inorder/pipeline_stage.cc
/gem5/src/cpu/inorder/pipeline_stage.hh
/gem5/src/cpu/inorder/pipeline_traits.5stage.cc
/gem5/src/cpu/inorder/pipeline_traits.5stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.hh
/gem5/src/cpu/inorder/pipeline_traits.hh
/gem5/src/cpu/inorder/reg_dep_map.cc
/gem5/src/cpu/inorder/resource.cc
/gem5/src/cpu/inorder/resource.hh
/gem5/src/cpu/inorder/resource_pool.9stage.cc
/gem5/src/cpu/inorder/resource_pool.cc
/gem5/src/cpu/inorder/resource_pool.hh
/gem5/src/cpu/inorder/resource_sked.cc
/gem5/src/cpu/inorder/resource_sked.hh
/gem5/src/cpu/inorder/resources/agen_unit.hh
/gem5/src/cpu/inorder/resources/bpred_unit.hh
/gem5/src/cpu/inorder/resources/branch_predictor.hh
/gem5/src/cpu/inorder/resources/cache_unit.cc
/gem5/src/cpu/inorder/resources/cache_unit.hh
/gem5/src/cpu/inorder/resources/decode_unit.hh
/gem5/src/cpu/inorder/resources/execution_unit.cc
/gem5/src/cpu/inorder/resources/execution_unit.hh
/gem5/src/cpu/inorder/resources/fetch_seq_unit.hh
/gem5/src/cpu/inorder/resources/fetch_unit.cc
/gem5/src/cpu/inorder/resources/fetch_unit.hh
/gem5/src/cpu/inorder/resources/graduation_unit.hh
/gem5/src/cpu/inorder/resources/inst_buffer.cc
/gem5/src/cpu/inorder/resources/inst_buffer.hh
/gem5/src/cpu/inorder/resources/mem_dep_unit.hh
/gem5/src/cpu/inorder/resources/mult_div_unit.cc
/gem5/src/cpu/inorder/resources/mult_div_unit.hh
/gem5/src/cpu/inorder/resources/resource_list.hh
/gem5/src/cpu/inorder/resources/tlb_unit.cc
/gem5/src/cpu/inorder/resources/tlb_unit.hh
/gem5/src/cpu/inorder/resources/use_def.cc
/gem5/src/cpu/inorder/resources/use_def.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/inorder/thread_state.cc
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/intr_control.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/base_dyn_inst.cc
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/bpred_unit_impl.hh
/gem5/src/cpu/o3/checker_builder.cc
/gem5/src/cpu/o3/commit.cc
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/cpu_policy.hh
/gem5/src/cpu/o3/decode.cc
/gem5/src/cpu/o3/dyn_inst.hh
/gem5/src/cpu/o3/fetch.cc
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/fu_pool.hh
/gem5/src/cpu/o3/iew.cc
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/impl.hh
/gem5/src/cpu/o3/inst_queue.cc
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/isa_specific.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/o3/scoreboard.hh
/gem5/src/cpu/o3/thread_context.cc
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/back_end_impl.hh
/gem5/src/cpu/ozone/base_dyn_inst.cc
/gem5/src/cpu/ozone/checker_builder.cc
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_builder.cc
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/dyn_inst.hh
/gem5/src/cpu/ozone/dyn_inst_impl.hh
/gem5/src/cpu/ozone/ea_list.cc
/gem5/src/cpu/ozone/front_end.hh
/gem5/src/cpu/ozone/front_end_impl.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/inorder_back_end_impl.hh
/gem5/src/cpu/ozone/inst_queue.cc
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/inst_queue_impl.hh
/gem5/src/cpu/ozone/lsq_unit.cc
/gem5/src/cpu/ozone/lsq_unit.hh
/gem5/src/cpu/ozone/lw_back_end.hh
/gem5/src/cpu/ozone/lw_lsq.cc
/gem5/src/cpu/ozone/lw_lsq.hh
/gem5/src/cpu/ozone/lw_lsq_impl.hh
/gem5/src/cpu/ozone/ozone_base_dyn_inst.cc
/gem5/src/cpu/ozone/ozone_impl.hh
/gem5/src/cpu/ozone/rename_table.cc
/gem5/src/cpu/ozone/simple_base_dyn_inst.cc
/gem5/src/cpu/ozone/simple_cpu_builder.cc
/gem5/src/cpu/ozone/simple_impl.hh
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/profile.cc
/gem5/src/cpu/profile.hh
/gem5/src/cpu/quiesce_event.cc
/gem5/src/cpu/sched_list.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.hh
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.hh
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/memtest/memtest.hh
/gem5/src/cpu/testers/networktest/networktest.cc
/gem5/src/cpu/testers/networktest/networktest.hh
/gem5/src/cpu/testers/rubytest/CheckTable.cc
/gem5/src/cpu/testers/rubytest/RubyTester.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/cpu/thread_state.hh
/gem5/src/cpu/trace/opt_cpu.cc
/gem5/src/cpu/trace/reader/ibm_reader.hh
/gem5/src/cpu/trace/reader/itx_reader.hh
/gem5/src/cpu/trace/reader/mem_trace_reader.hh
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/dev/alpha/tsunami.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/alpha/tsunami_io.hh
/gem5/src/dev/alpha/tsunami_pchip.cc
/gem5/src/dev/arm/amba_device.cc
/gem5/src/dev/arm/amba_device.hh
/gem5/src/dev/arm/kmi.cc
/gem5/src/dev/arm/kmi.hh
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/etherbus.hh
/gem5/src/dev/etherdump.hh
/gem5/src/dev/etherint.cc
/gem5/src/dev/etherlink.cc
/gem5/src/dev/etherlink.hh
/gem5/src/dev/ethertap.cc
/gem5/src/dev/ethertap.hh
/gem5/src/dev/ide_ctrl.hh
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/io_device.cc
/gem5/src/dev/isa_fake.hh
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mips/malta.cc
/gem5/src/dev/mips/malta_cchip.hh
/gem5/src/dev/mips/malta_io.cc
/gem5/src/dev/mips/malta_pchip.cc
/gem5/src/dev/mips/malta_pchip.hh
/gem5/src/dev/pciconfigall.hh
/gem5/src/dev/platform.hh
/gem5/src/dev/ps2.cc
/gem5/src/dev/simple_disk.hh
/gem5/src/dev/sparc/iob.cc
/gem5/src/dev/sparc/iob.hh
/gem5/src/dev/sparc/mm_disk.cc
/gem5/src/dev/sparc/mm_disk.hh
/gem5/src/dev/terminal.cc
/gem5/src/dev/terminal.hh
/gem5/src/dev/x86/i8042.hh
/gem5/src/dev/x86/i82094aa.hh
/gem5/src/dev/x86/i8259.hh
/gem5/src/dev/x86/intdev.hh
/gem5/src/dev/x86/pc.cc
/gem5/src/dev/x86/south_bridge.hh
/gem5/src/kern/kernel_stats.cc
/gem5/src/kern/kernel_stats.hh
/gem5/src/kern/linux/events.cc
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/printf.cc
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/mem/bridge.hh
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/builder.cc
/gem5/src/mem/cache/cache.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr_queue.hh
/gem5/src/mem/cache/prefetch/base.cc
/gem5/src/mem/cache/prefetch/stride.hh
/gem5/src/mem/cache/tags/base.cc
/gem5/src/mem/cache/tags/base.hh
/gem5/src/mem/cache/tags/cacheset.hh
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/iic.hh
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/cache/tags/lru.cc
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/packet.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/ruby/buffers/MessageBuffer.hh
/gem5/src/mem/ruby/common/NetDest.cc
/gem5/src/mem/ruby/common/Set.hh
/gem5/src/mem/ruby/filters/GenericBloomFilter.hh
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/garnet/BaseGarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh
/gem5/src/mem/ruby/network/orion/Allocator/Arbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/MatrixArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/SWAllocator.cc
/gem5/src/mem/ruby/network/orion/Allocator/VCAllocator.cc
/gem5/src/mem/ruby/network/orion/Buffer/Buffer.cc
/gem5/src/mem/ruby/network/orion/Buffer/DecoderUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/OutdrvUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/PrechargeUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/Register.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.hh
/gem5/src/mem/ruby/network/orion/Buffer/WordlineUnit.cc
/gem5/src/mem/ruby/network/orion/Clock.cc
/gem5/src/mem/ruby/network/orion/ConfigFile.hh
/gem5/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh
/gem5/src/mem/ruby/network/orion/FlipFlop.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.hh
/gem5/src/mem/ruby/network/orion/OrionConfig.cc
/gem5/src/mem/ruby/network/orion/OrionConfig.hh
/gem5/src/mem/ruby/network/orion/OrionLink.cc
/gem5/src/mem/ruby/network/orion/OrionRouter.cc
/gem5/src/mem/ruby/network/orion/TechParameter.cc
/gem5/src/mem/ruby/network/orion/Wire.cc
/gem5/src/mem/ruby/network/orion/orion.hh
/gem5/src/mem/ruby/network/simple/PerfectSwitch.hh
/gem5/src/mem/ruby/network/simple/Switch.cc
/gem5/src/mem/ruby/network/simple/Throttle.cc
/gem5/src/mem/ruby/network/simple/Throttle.hh
/gem5/src/mem/ruby/network/simple/Topology.cc
/gem5/src/mem/ruby/profiler/CacheProfiler.hh
/gem5/src/mem/ruby/profiler/Profiler.cc
/gem5/src/mem/ruby/profiler/Profiler.hh
/gem5/src/mem/ruby/recorder/CacheRecorder.cc
/gem5/src/mem/ruby/recorder/CacheRecorder.hh
/gem5/src/mem/ruby/recorder/Tracer.hh
/gem5/src/mem/ruby/slicc_interface/AbstractEntry.hh
/gem5/src/mem/ruby/slicc_interface/RubyRequest.hh
/gem5/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc
/gem5/src/mem/ruby/slicc_interface/RubySlicc_includes.hh
/gem5/src/mem/ruby/system/CacheMemory.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/RubyPort.hh
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/Sequencer.hh
/gem5/src/mem/ruby/system/WireBuffer.hh
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/tport.hh
/gem5/src/mem/translating_port.cc
/gem5/src/mem/vport.hh
/gem5/src/python/swig/core.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/inet.i
/gem5/src/python/swig/pyobject.cc
/gem5/src/python/swig/sim_object.i
/gem5/src/python/swig/stats.i
/gem5/src/python/swig/system.i
/gem5/src/sim/faults.cc
/gem5/src/sim/faults.hh
/gem5/src/sim/init.cc
/gem5/src/sim/process.cc
/gem5/src/sim/process_impl.hh
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/stat_control.cc
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.cc
/gem5/src/sim/tlb.cc
/gem5/src/sim/vptr.hh
/gem5/src/unittest/cprintftest.cc
/gem5/src/unittest/cprintftime.cc
/gem5/src/unittest/initest.cc
/gem5/src/unittest/rangemaptest.cc
/gem5/src/unittest/stattest.cc
/gem5/src/unittest/symtest.cc
/gem5/util/ccdrv/devtime.c
/gem5/util/m5/m5.c
/gem5/util/statetrace/arch/amd64/tracechild.cc
/gem5/util/statetrace/arch/amd64/tracechild.hh
/gem5/util/statetrace/arch/arm/tracechild.cc
/gem5/util/statetrace/arch/arm/tracechild.hh
/gem5/util/statetrace/arch/i686/tracechild.cc
/gem5/util/statetrace/arch/i686/tracechild.hh
/gem5/util/statetrace/arch/sparc/tracechild.cc
/gem5/util/statetrace/arch/sparc/tracechild.hh
/gem5/util/statetrace/base/regstate.hh
/gem5/util/statetrace/base/statetrace.cc
/gem5/util/statetrace/base/tracechild.cc
/gem5/util/tap/tap.cc
/gem5/util/term/term.c
7737:f4362ffd810f 08-Nov-2010 Gabe Black <gblack@eecs.umich.edu>

X86: Fix X86_FS compilation.

7629:0f0c231e3e97 23-Aug-2010 Gabe Black <gblack@eecs.umich.edu>

X86: Create a directory for files that define register indexes.

This is to help tidy up arch/x86. These files should not be used external to
the ISA.

7532:3f6413fc37a2 17-Aug-2010 Steve Reinhardt <steve.reinhardt@amd.com>

sim: revamp unserialization procedure

Replace direct call to unserialize() on each SimObject with a pair of
calls for better control over initialization in both ckpt and non-ckpt
cases.

If restoring from a checkpoint, loadState(ckpt) is called on each
SimObject. The default implementation simply calls unserialize() if
there is a corresponding checkpoint section, so we get backward
compatibility for existing objects. However, objects can override
loadState() to get other behaviors, e.g., doing other programmed
initializations after unserialize(), or complaining if no checkpoint
section is found. (Note that the default warning for a missing
checkpoint section is now gone.)

If not restoring from a checkpoint, we call the new initState() method
on each SimObject instead. This provides a hook for state
initializations that are only required when *not* restoring from a
checkpoint.

Given this new framework, do some cleanup of LiveProcess subclasses
and X86System, which were (in some cases) emulating initState()
behavior in startup via a local flag or (in other cases) erroneously
doing initializations in startup() that clobbered state loaded earlier
by unserialize().

7087:fb8d5786ff30 24-May-2010 Nathan Binkert <nate@binkert.org>

copyright: Change HP copyright on x86 code to be more friendly


/gem5/src/arch/x86/SConscript
/gem5/src/arch/x86/X86System.py
/gem5/src/arch/x86/X86TLB.py
/gem5/src/arch/x86/arguments.hh
/gem5/src/arch/x86/bios/ACPI.py
/gem5/src/arch/x86/bios/E820.py
/gem5/src/arch/x86/bios/IntelMP.py
/gem5/src/arch/x86/bios/SConscript
/gem5/src/arch/x86/bios/SMBios.py
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/e820.cc
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/arch/x86/emulenv.cc
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/faults.cc
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/floatregs.hh
/gem5/src/arch/x86/insts/macroop.hh
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microfpop.hh
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/microldstop.hh
/gem5/src/arch/x86/insts/microop.cc
/gem5/src/arch/x86/insts/microop.hh
/gem5/src/arch/x86/insts/microregop.cc
/gem5/src/arch/x86/insts/microregop.hh
/gem5/src/arch/x86/insts/static_inst.cc
/gem5/src/arch/x86/insts/static_inst.hh
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/interrupts.hh
/gem5/src/arch/x86/intregs.hh
/gem5/src/arch/x86/isa/bitfields.isa
/gem5/src/arch/x86/isa/decoder/decoder.isa
/gem5/src/arch/x86/isa/decoder/one_byte_opcodes.isa
/gem5/src/arch/x86/isa/decoder/two_byte_opcodes.isa
/gem5/src/arch/x86/isa/decoder/x87.isa
/gem5/src/arch/x86/isa/formats/basic.isa
/gem5/src/arch/x86/isa/formats/cpuid.isa
/gem5/src/arch/x86/isa/formats/error.isa
/gem5/src/arch/x86/isa/formats/formats.isa
/gem5/src/arch/x86/isa/formats/multi.isa
/gem5/src/arch/x86/isa/formats/string.isa
/gem5/src/arch/x86/isa/formats/syscall.isa
/gem5/src/arch/x86/isa/formats/unimp.isa
/gem5/src/arch/x86/isa/formats/unknown.isa
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/isa/insts/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/increment_and_decrement.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/multiply_and_divide.py
/gem5/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/compare.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/conditional_jump.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/ascii_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/bcd_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/endian_conversion.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/extract_sign_mask.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/sign_extension.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/conditional_move.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/push_and_pop.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/general_io.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py
/gem5/src/arch/x86/isa/insts/general_purpose/load_effective_address.py
/gem5/src/arch/x86/isa/insts/general_purpose/load_segment_registers.py
/gem5/src/arch/x86/isa/insts/general_purpose/logical.py
/gem5/src/arch/x86/isa/insts/general_purpose/no_operation.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py
/gem5/src/arch/x86/isa/insts/general_purpose/semaphores.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/compare_strings.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/load_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/move_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/scan_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/store_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py
/gem5/src/arch/x86/isa/insts/simd128/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_estimation.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_square_root.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_mmx_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_xmm_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/shuffle.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_mask.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_with_duplication.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/andp.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/orp.py
/gem5/src/arch/x86/isa/insts/simd128/integer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/average.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/sum_of_absolute_differences.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_mmx_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/extract_and_insert.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/shuffle.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move_mask.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move_non_temporal.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/pand.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/por.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_control_and_status.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_state.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/left_logical_shift.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/right_arithmetic_shift.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/right_logical_shift.py
/gem5/src/arch/x86/isa/insts/simd64/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/accumulation.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/reciprocal_estimation.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/reciprocal_square_root.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/data_conversion.py
/gem5/src/arch/x86/isa/insts/simd64/integer/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/average.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/sum_of_absolute_differences.py
/gem5/src/arch/x86/isa/insts/simd64/integer/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_conversion.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/pack_with_saturation.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/shuffle_and_swap.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_mask.py
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py
/gem5/src/arch/x86/isa/insts/simd64/integer/exit_media_state.py
/gem5/src/arch/x86/isa/insts/simd64/integer/logical/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/logical/exclusive_or.py
/gem5/src/arch/x86/isa/insts/simd64/integer/logical/pand.py
/gem5/src/arch/x86/isa/insts/simd64/integer/logical/por.py
/gem5/src/arch/x86/isa/insts/simd64/integer/save_and_restore_state.py
/gem5/src/arch/x86/isa/insts/simd64/integer/shift/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/integer/shift/left_logical_shift.py
/gem5/src/arch/x86/isa/insts/simd64/integer/shift/right_arithmetic_shift.py
/gem5/src/arch/x86/isa/insts/simd64/integer/shift/right_logical_shift.py
/gem5/src/arch/x86/isa/insts/system/__init__.py
/gem5/src/arch/x86/isa/insts/system/halt.py
/gem5/src/arch/x86/isa/insts/system/invlpg.py
/gem5/src/arch/x86/isa/insts/system/msrs.py
/gem5/src/arch/x86/isa/insts/system/segmentation.py
/gem5/src/arch/x86/isa/insts/system/undefined_operation.py
/gem5/src/arch/x86/isa/insts/x87/__init__.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/change_sign.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/division.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/partial_remainder.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/round.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/square_root.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/__init__.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/classify.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/integer_compare.py
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/test.py
/gem5/src/arch/x86/isa/insts/x87/control/__init__.py
/gem5/src/arch/x86/isa/insts/x87/control/clear_exceptions.py
/gem5/src/arch/x86/isa/insts/x87/control/initialize.py
/gem5/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py
/gem5/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_environment.py
/gem5/src/arch/x86/isa/insts/x87/control/save_x87_status_word.py
/gem5/src/arch/x86/isa/insts/x87/control/wait_for_exceptions.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/conditional_move.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_bcd.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/extract.py
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
/gem5/src/arch/x86/isa/insts/x87/load_constants/__init__.py
/gem5/src/arch/x86/isa/insts/x87/load_constants/load_0_1_or_pi.py
/gem5/src/arch/x86/isa/insts/x87/load_constants/load_logarithm.py
/gem5/src/arch/x86/isa/insts/x87/no_operation.py
/gem5/src/arch/x86/isa/insts/x87/stack_management/__init__.py
/gem5/src/arch/x86/isa/insts/x87/stack_management/clear_state.py
/gem5/src/arch/x86/isa/insts/x87/stack_management/stack_control.py
/gem5/src/arch/x86/isa/insts/x87/transcendental_functions/__init__.py
/gem5/src/arch/x86/isa/insts/x87/transcendental_functions/logarithmic_functions.py
/gem5/src/arch/x86/isa/insts/x87/transcendental_functions/trigonometric_functions.py
/gem5/src/arch/x86/isa/macroop.isa
/gem5/src/arch/x86/isa/main.isa
/gem5/src/arch/x86/isa/microasm.isa
/gem5/src/arch/x86/isa/microops/base.isa
/gem5/src/arch/x86/isa/microops/debug.isa
/gem5/src/arch/x86/isa/microops/fpop.isa
/gem5/src/arch/x86/isa/microops/ldstop.isa
/gem5/src/arch/x86/isa/microops/limmop.isa
/gem5/src/arch/x86/isa/microops/microops.isa
/gem5/src/arch/x86/isa/microops/regop.isa
/gem5/src/arch/x86/isa/microops/seqop.isa
/gem5/src/arch/x86/isa/microops/specop.isa
/gem5/src/arch/x86/isa/operands.isa
/gem5/src/arch/x86/isa/outputblock.isa
/gem5/src/arch/x86/isa/specialize.isa
/gem5/src/arch/x86/isa_traits.hh
/gem5/src/arch/x86/kernel_stats.hh
linux.cc
linux.hh
process.cc
process.hh
syscalls.cc
system.cc
system.hh
/gem5/src/arch/x86/miscregs.hh
/gem5/src/arch/x86/mmaped_ipr.hh
/gem5/src/arch/x86/pagetable.cc
/gem5/src/arch/x86/pagetable.hh
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.cc
/gem5/src/arch/x86/predecoder.hh
/gem5/src/arch/x86/predecoder_tables.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/arch/x86/registers.hh
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/remote_gdb.hh
/gem5/src/arch/x86/segmentregs.hh
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/system.hh
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/arch/x86/types.hh
/gem5/src/arch/x86/utility.cc
/gem5/src/arch/x86/utility.hh
/gem5/src/arch/x86/vtophys.cc
/gem5/src/arch/x86/vtophys.hh
/gem5/src/arch/x86/x86_traits.hh
6708:036037ff8c3d 04-Nov-2009 Vince Weaver <vince@csl.cornell.edu>

X86: Hook up time syscall on X86

This has been tested and verified that it works.

6704:bd221a106f08 30-Oct-2009 Vince Weaver <vince@csl.cornell.edu>

X86: Hookup truncate/ftruncate syscalls on X86

This patch hooks up the truncate, ftruncate, truncate64 and ftruncate64
system calls on 32-bit and 64-bit X86.

These have been tested on both architectures.

ftruncate/ftruncate64 is needed for the f90 spec2k benchmarks.

6701:4842482e1bd1 30-Oct-2009 Gabe Black <gblack@eecs.umich.edu>

Syscalls: Make system calls access arguments like a stack, not an array.

When accessing arguments for a syscall, the position of an argument depends on
the policies of the ISA, how much space preceding arguments took up, and the
"alignment" of the index for this particular argument into the number of
possible storate locations. This change adjusts getSyscallArg to take its
index parameter by reference instead of value and to adjust it to point to the
possible location of the next argument on the stack, basically just after the
current one. This way, the rules for the new argument can be applied locally
without knowing about other arguments since those have already been taken into
account implicitly.

All system calls have also been changed to reflect the new interface. In a
number of cases this made the implementation clearer since it encourages
arguments to be collected in one place in order and then used as necessary
later, as opposed to scattering them throughout the function or using them in
place in long expressions. It also discourages using getSyscallArg over and
over to retrieve the same value when a temporary would do the job.

6695:1ac721a9edd0 20-Oct-2009 Vince Weaver <vince@csl.cornell.edu>

hook up stat syscall on 64-bit x86_SE

6694:1779b899c117 20-Oct-2009 Vince Weaver <vince@csl.cornell.edu>

hook up stat64 syscall on 32-bit X86_SE

6693:ce63047d1bd9 20-Oct-2009 Vince Weaver <vince@csl.cornell.edu>

Fix stat64 structure on 32-bit X86_SE

The st_size entry was in the wrong place
(see linux-2.6.29/arch/x86/include/asm/stat.h )

Also, the packed attribute is needed when compiling on a
64-bit machine, otherwise gcc adds extra padding that
break the layout of the structure.

6682:9c33426d404a 19-Oct-2009 Vince Weaver <vince@csl.cornell.edu>

Enable getuid and getgid related syscalls on X86_SE

I've tested these on x86 and they work as expected.

In theory for 32-bit x86 we should have some sort of special
handling for the legacy 16-bit uid/gid syscalls, but in practice
modern toolchains don't use the 16-bit versions, and m5 sets the uid
and gid values to be less than 16-bits anyway.

This fix is needed for the perl spec2k benchmarks to run.

6681:5a2b0322ea19 16-Oct-2009 vince@venchi.csl.cornell.edu

Ignore rt_sigaction() syscalls on x86 and x86_64

This is currently how alpha handles this syscall.

This is needed for the gcc spec2k benchmarks to run.

6676:e93e6d7b48a0 11-Oct-2009 vince@venchi.csl.cornell.edu

Hook up the munmap() syscall for 32-bit x86.

This is straightforward, as munmapFunc() doesn't do anything.
I've tested it with code running munmap() just in case.

6673:f8453ff56966 02-Oct-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Make successive anonymous mmaps move down in 32 bit SE mode Linux.

6640:30d92d2b66a1 16-Sep-2009 Vince Weaver <vince@csl.cornell.edu>

Syscalls: Implement sysinfo() syscall.

6638:26b4476e88cd 15-Sep-2009 Vince Weaver <vince@csl.cornell.edu>

[mq]: x86syscalls.patch

6329:5d8b91875859 09-Jul-2009 Gabe Black <gblack@eecs.umich.edu>

Registers: Add a registers.hh file as an ISA switched header.
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.


/gem5/src/arch/SConscript
/gem5/src/arch/alpha/SConscript
/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/miscregfile.hh
/gem5/src/arch/alpha/regfile.cc
/gem5/src/arch/alpha/regfile.hh
/gem5/src/arch/alpha/registers.hh
/gem5/src/arch/alpha/regredir.hh
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/arm/SConscript
/gem5/src/arch/arm/isa_traits.hh
/gem5/src/arch/arm/misc_regfile.hh
/gem5/src/arch/arm/regfile.cc
/gem5/src/arch/arm/regfile.hh
/gem5/src/arch/arm/registers.hh
/gem5/src/arch/arm/types.hh
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/locked_mem.hh
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/regfile.hh
/gem5/src/arch/mips/registers.hh
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/types.hh
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/sparc/SConscript
/gem5/src/arch/sparc/isa/includes.isa
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/miscregfile.hh
/gem5/src/arch/sparc/miscregs.hh
/gem5/src/arch/sparc/regfile.cc
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/sparc/registers.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/types.hh
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/x86/SConscript
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/isa_traits.hh
process.cc
/gem5/src/arch/x86/miscregfile.hh
/gem5/src/arch/x86/regfile.cc
/gem5/src/arch/x86/regfile.hh
/gem5/src/arch/x86/registers.hh
/gem5/src/arch/x86/types.hh
/gem5/src/arch/x86/utility.cc
/gem5/src/arch/x86/utility.hh
/gem5/src/cpu/legiontrace.cc
/gem5/src/cpu/nativetrace.cc
/gem5/src/cpu/o3/free_list.hh
/gem5/src/cpu/o3/regfile.hh
/gem5/src/cpu/o3/rename_impl.hh
/gem5/src/cpu/o3/thread_context_impl.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/mem/physical.cc
/gem5/src/sim/process.hh
6109:083d8a76b7a6 21-Apr-2009 Daniel Sanchez <sanchezd@stanford.edu>

Commit m5threads package.

This patch adds limited multithreading support in syscall-emulation
mode, by using the clone system call. The clone system call works
for Alpha, SPARC and x86, and multithreaded applications run
correctly in Alpha and SPARC.

6075:1e1a874f9b17 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

SE mode: Make keeping track of the number of syscalls less hacky.

5979:d4cb6394049b 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Install the exit system call.

5978:18d0b7e09d87 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Install the 32 bit write system call.

5976:536125d85fa3 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Add a structure to allow mapping between the host and guest fstat formats.

5971:9c6391381323 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Add a 32 bit mmap2 system call.

5970:5a891c0193c6 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Install a 32 bit fstat64 system call.

5964:dc4162b805f7 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the 32 bit set_thread_area system call.

5960:c9c465241d3b 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Install some 32 bit system calls.

5958:2d9737bf3c2f 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

Processes: Make getting and setting system call arguments part of a process object.


/gem5/src/arch/SConscript
/gem5/src/arch/alpha/freebsd/system.cc
/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/linux/process.cc
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/process.hh
/gem5/src/arch/alpha/syscallreturn.hh
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/utility.cc
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/mips/syscallreturn.hh
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/process.hh
/gem5/src/arch/sparc/linux/syscalls.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/syscallreturn.hh
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/x86/isa_traits.hh
process.hh
syscalls.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/arch/x86/syscallreturn.hh
/gem5/src/cpu/checker/thread_context.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/o3/thread_context_impl.hh
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
5956:a49d9413a9e8 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Distinguish the width of values on the stack between 32 and 64 bit processes.

5955:d35d2b28df38 27-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Add a class to support 32 bit x86 linux process.

5877:9fe574944f31 16-Feb-2009 Lisa Hsu <hsul@eecs.umich.edu>

sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.

5748:f28f020f3006 15-Nov-2008 Steve Reinhardt <Steve.Reinhardt@amd.com>

syscalls: fix latent brk/obreak bug.
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.

5543:3af77710f397 10-Sep-2008 Ali Saidi <saidi@eecs.umich.edu>

style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs


/gem5/configs/common/Benchmarks.py
/gem5/src/arch/alpha/aout_machdep.h
/gem5/src/arch/alpha/ev5.cc
/gem5/src/arch/alpha/floatregfile.hh
/gem5/src/arch/alpha/ipr.cc
/gem5/src/arch/alpha/ipr.hh
/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/linux/linux.cc
/gem5/src/arch/alpha/linux/linux.hh
/gem5/src/arch/alpha/miscregfile.hh
/gem5/src/arch/alpha/osfpal.cc
/gem5/src/arch/alpha/pagetable.hh
/gem5/src/arch/alpha/regfile.hh
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/system.cc
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/tru64/tru64.cc
/gem5/src/arch/alpha/tru64/tru64.hh
/gem5/src/arch/isa_parser.py
/gem5/src/arch/isa_specific.hh
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/linux.cc
/gem5/src/arch/mips/linux/linux.hh
/gem5/src/arch/mips/regfile/regfile.hh
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/linux.cc
/gem5/src/arch/sparc/linux/linux.hh
/gem5/src/arch/sparc/miscregfile.hh
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/solaris/solaris.cc
/gem5/src/arch/sparc/solaris/solaris.hh
/gem5/src/arch/sparc/sparc_traits.hh
/gem5/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/ascii_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/bcd_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/endian_conversion.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/extract_sign_mask.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/general_purpose/load_segment_registers.py
/gem5/src/arch/x86/isa/insts/general_purpose/semaphores.py
/gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py
linux.hh
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/base/bitunion.hh
/gem5/src/base/crc.cc
/gem5/src/base/fast_alloc.cc
/gem5/src/base/fast_alloc.hh
/gem5/src/base/inifile.hh
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/coff_sym.h
/gem5/src/base/loader/coff_symconst.h
/gem5/src/base/loader/ecoff_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/hex_file.hh
/gem5/src/base/loader/object_file.hh
/gem5/src/base/loader/symtab.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/base/res_list.hh
/gem5/src/base/stats/flags.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/time.hh
/gem5/src/base/trace.hh
/gem5/src/cpu/base_dyn_inst.hh
/gem5/src/cpu/checker/cpu.hh
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/memtest/memtest.hh
/gem5/src/cpu/o3/alpha/dyn_inst.hh
/gem5/src/cpu/o3/mips/dyn_inst.hh
/gem5/src/cpu/o3/regfile.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/front_end.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/lsq_unit_impl.hh
/gem5/src/cpu/ozone/lw_back_end.hh
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple_thread.cc
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/dev/alpha/access.h
/gem5/src/dev/etherdump.cc
/gem5/src/dev/mips/access.h
/gem5/src/dev/ns_gige.hh
/gem5/src/dev/pcidev.cc
/gem5/src/dev/pcireg.h
/gem5/src/dev/sinicreg.hh
/gem5/src/kern/linux/linux.hh
/gem5/src/kern/operatingsystem.hh
/gem5/src/kern/solaris/solaris.hh
/gem5/src/kern/tru64/mbuf.hh
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_syscalls.cc
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/builder.cc
/gem5/src/mem/cache/prefetch/stride.cc
/gem5/src/mem/cache/prefetch/stride.hh
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/lru.cc
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/cache/tags/split_lru.cc
/gem5/src/mem/dram.cc
/gem5/src/mem/physical.hh
/gem5/src/mem/request.hh
/gem5/src/python/m5/SimObject.py
/gem5/src/sim/async.hh
/gem5/src/sim/debug.cc
/gem5/src/sim/eventq.hh
/gem5/src/sim/host.hh
/gem5/src/sim/insttracer.hh
/gem5/src/sim/process.hh
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/sim_events.hh
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/util/m5/m5op_alpha.S
/gem5/util/m5/m5ops.h
/gem5/util/term/term.c
5450:25e395a87745 12-Jun-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Make the e820 table manually or automatically configurable from python.

5407:c121bb9e86eb 11-Jun-2008 Ali Saidi <saidi@eecs.umich.edu>

X86: Fix building on *BSD hosts

5330:a1db38b0d8e8 21-Jan-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Use the existing boot_osflags instead of duplicating it.

5303:ee44ea10f32f 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Start setting up the real mode data structure.

5299:e61b9f2a9732 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Move startup code to the system object to initialize a Linux system.

5289:ca5390e654b8 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Separate the effective seg base and the "hidden" seg base.

5154:7e6431213487 16-Oct-2007 Gabe Black <gblack@eecs.umich.edu>

Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack.

5080:21158deacd95 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Enable the rename system call.

5079:7f089bebb3e4 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Enable the unlink system call.

5021:a93f2605b87c 28-Aug-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Hook in an implementation for lseek.

4866:9adc60769aed 04-Aug-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Make the open flags correct.

4861:d73032e1dca0 04-Aug-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Add the arch_prctl system call and fix up some microcoding.
The arch_prctl system call is used to set and get the FS and GS segment
bases. The FS segment is use for TLS, so glibc needs to be able to set it
up.

4822:14be2bcab3b3 30-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: __pad0 should be a 4 byte pad, not a 4 long array of 4 byte pads.

4821:7f7273018668 30-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Turn on the exit_group, exit, munmap, and write syscalls.

4815:137ad0e13d3a 30-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Fix up the stat structure. This probably still isn't right.

4813:26dc797b819f 30-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Turn on some system calls, and make the kernel version match my development machine.

4765:226a0dd6d621 27-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Add functions for mmap and brk.

4759:60e820a327db 24-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Add a tgt_iovec structure to support writev, change the name of X86Linux to X86Linux64, add some syscalls.

4738:257b04edb999 21-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Add the "open" syscall.

4166:ecebe3ac19b4 06-Mar-2007 Gabe Black <gblack@eecs.umich.edu>

Get X86 to load an elf and start a process for it.

src/arch/x86/SConscript:
Add in process source files.
src/arch/x86/isa_traits.hh:
Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
An X86 process class.
src/base/loader/elf_object.cc:
Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
Add an x86 traceflag
src/sim/process.cc:
Add in code to create an x86 process.
src/arch/x86/intregs.hh:
A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
An x86 hello world test binary.