History log of /gem5/src/arch/sparc/insts/
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12616:4b463b4dc098 23-Mar-2018 Gabe Black <gabeblack@google.com>

arch: Fix all override related warnings.

Clang has started(?) reporting override related warnings, something gcc
apparently did before, but was disabled in the SConstruct. Rather than
disable the warnings in for clang as well, this change fixes the
warnings. A future change will re-enable the warnings for gcc.

Change-Id: I3cc79e45749b2ae0f9bebb1acadc56a3d3a942da
Reviewed-on: https://gem5-review.googlesource.com/9343
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>


/gem5/src/arch/alpha/isa/branch.isa
/gem5/src/arch/alpha/isa/fp.isa
/gem5/src/arch/alpha/isa/int.isa
/gem5/src/arch/alpha/isa/main.isa
/gem5/src/arch/alpha/isa/mem.isa
/gem5/src/arch/alpha/isa/opcdec.isa
/gem5/src/arch/alpha/isa/pal.isa
/gem5/src/arch/alpha/isa/unimp.isa
/gem5/src/arch/arm/insts/branch64.hh
/gem5/src/arch/arm/insts/data64.hh
/gem5/src/arch/arm/insts/macromem.hh
/gem5/src/arch/arm/insts/mem.hh
/gem5/src/arch/arm/insts/mem64.hh
/gem5/src/arch/arm/insts/misc.hh
/gem5/src/arch/arm/insts/misc64.hh
/gem5/src/arch/arm/insts/pred_inst.hh
/gem5/src/arch/arm/insts/pseudo.hh
/gem5/src/arch/arm/insts/static_inst.hh
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/isa/formats/breakpoint.isa
/gem5/src/arch/arm/isa/templates/basic.isa
/gem5/src/arch/arm/isa/templates/branch.isa
/gem5/src/arch/arm/isa/templates/branch64.isa
/gem5/src/arch/arm/isa/templates/data64.isa
/gem5/src/arch/arm/isa/templates/macromem.isa
/gem5/src/arch/arm/isa/templates/mem.isa
/gem5/src/arch/arm/isa/templates/mem64.isa
/gem5/src/arch/arm/isa/templates/misc.isa
/gem5/src/arch/arm/isa/templates/misc64.isa
/gem5/src/arch/arm/isa/templates/mult.isa
/gem5/src/arch/arm/isa/templates/neon.isa
/gem5/src/arch/arm/isa/templates/neon64.isa
/gem5/src/arch/arm/isa/templates/pred.isa
/gem5/src/arch/arm/isa/templates/vfp.isa
/gem5/src/arch/arm/isa/templates/vfp64.isa
/gem5/src/arch/mips/isa/base.isa
/gem5/src/arch/mips/isa/formats/basic.isa
/gem5/src/arch/mips/isa/formats/branch.isa
/gem5/src/arch/mips/isa/formats/control.isa
/gem5/src/arch/mips/isa/formats/fp.isa
/gem5/src/arch/mips/isa/formats/int.isa
/gem5/src/arch/mips/isa/formats/mem.isa
/gem5/src/arch/mips/isa/formats/mt.isa
/gem5/src/arch/mips/isa/formats/noop.isa
/gem5/src/arch/mips/isa/formats/tlbop.isa
/gem5/src/arch/mips/isa/formats/trap.isa
/gem5/src/arch/mips/isa/formats/unimp.isa
/gem5/src/arch/mips/isa/formats/unknown.isa
/gem5/src/arch/power/insts/branch.hh
/gem5/src/arch/power/insts/condition.hh
/gem5/src/arch/power/insts/floating.hh
/gem5/src/arch/power/insts/integer.hh
/gem5/src/arch/power/insts/mem.hh
/gem5/src/arch/power/insts/misc.hh
/gem5/src/arch/power/insts/static_inst.hh
/gem5/src/arch/power/isa/formats/basic.isa
/gem5/src/arch/power/isa/formats/mem.isa
/gem5/src/arch/power/isa/formats/unimp.isa
/gem5/src/arch/power/isa/formats/unknown.isa
/gem5/src/arch/riscv/insts/static_inst.hh
nop.cc
priv.hh
static_inst.hh
/gem5/src/arch/sparc/isa/formats/basic.isa
/gem5/src/arch/sparc/isa/formats/mem/basicmem.isa
/gem5/src/arch/sparc/isa/formats/mem/blockmem.isa
12614:0bc465e1f5fb 24-Jan-2018 Gabe Black <gabeblack@google.com>

arch: Add a virtual asBytes function to the StaticInst class.

This function takes a pointer to a buffer and the current size of the
buffer as a pass by reference argument. If the size of the buffer is
sufficient, the function stores a binary representation of itself
(generally the ISA defined instruction encoding) in the buffer, and
sets the size argument to how much space it used. This could be used
by ISAs which have two instruction sizes (ARM and thumb, for example).
If the buffer size isn't sufficient, then the size parameter should be
set to what size is required, and then the function should return
without modifying the buffer.

The buffer itself should be aligned to the same standard as memory
returned by new, specifically "The pointer returned shall be suitably
aligned so that it can be converted to a pointer of any complete object
type and then used to access the object or array in the storage
allocated...". This will avoid having to memcpy buffers to avoid
unaligned accesses.

To standardize the representation of the data, it should be stored in
the buffer as little endian. Since most hosts (including ARM and x86
hosts) will be little endian, this will almost always be a no-op.

Change-Id: I2f31aa0b4f9c0126b44f47a881c2901243279bd6
Reviewed-on: https://gem5-review.googlesource.com/7562
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

12295:4fc6c59aa554 07-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Move integer StaticInst base classes out of the ISA desc.

Change-Id: I24008c1e2a94ad8dc4cc13739214928eb846a496
Reviewed-on: https://gem5-review.googlesource.com/5483
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12294:650a9d8b23cc 07-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Move the mem base classes out of the ISA description.

Change-Id: Ifbeee464e2d7f872e192f065ad3494f52d274596
Reviewed-on: https://gem5-review.googlesource.com/5482
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12293:3d662e8013c9 07-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Move the microop/macroop base classes out of the ISA desc.

These were just raw C++ classes.

Change-Id: Id2101400d885c6938efb6b94f2949722cfbb94ae
Reviewed-on: https://gem5-review.googlesource.com/5481
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12292:24e70fcc835b 06-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Return debug faults from unimplemented instructions.

These had been marked as non-speculative so that their execute
functions would only be called if the instruction should really be
executed. Instead, we can return faults which will cause the same
behavior when the instruction is committed and let the instruction
execute as normal.

Change-Id: I39fa5073e93399424144724b99bdc12070e42286
Reviewed-on: https://gem5-review.googlesource.com/5465
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12291:2c0d8c31fc3d 06-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull the unimplemented formats out of the ISA description.

These are simple classes which don't need to be in the ISA description.

Change-Id: Ia0bb45f50c4da2536855efcb3c17c7780b431332
Reviewed-on: https://gem5-review.googlesource.com/5464
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12290:2078e5d7b848 06-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull the "Uknown" StaticInst class out of the ISA description.

The only thing the Unknown format does is return an instance of this
class, so there's no reason to have it in the ISA description.

Change-Id: I3f8187b1450a8622a974c030c0cb552b26f6b5f0
Reviewed-on: https://gem5-review.googlesource.com/5463
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12289:abb573c4e7ed 06-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull most of the Nop format out of the ISA description.

The Nop format mostly just made instructions that inherited from the
Nop base class but with different mnemonics, so there doesn't need
to be very much dynamic content.

Change-Id: I1cf5e25ca8372f9b71f56d49756879c7545c9f6c
Reviewed-on: https://gem5-review.googlesource.com/5462
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12288:f13eec2f5a17 06-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull more StaticInst base classes out of the ISA desc.

These are for the trap and branch instructions.

Change-Id: Idedab6f3e6c6c954c1f8a36dae52976cf25ad394
Reviewed-on: https://gem5-review.googlesource.com/5461
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

12287:4163eeb6210c 05-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull flat static instruction classes out of the ISA.

These classes are just used as base classes for other instructions
and don't need to be part of the ISA definition. Pull them into
standard C++ files.

Change-Id: If3e0bd82b1e676f20459bc0293fbda49de66b554
Reviewed-on: https://gem5-review.googlesource.com/5422
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

12275:4b4dd932c710 05-Nov-2017 Gabe Black <gabeblack@google.com>

sparc: Pull StaticInst base classes out of the ISA description.

Also, do some minor refactoring to use a BitUnion to pull apart
condition codes, etc.

Change-Id: I0c88878b07a731d0c0fe30f264f53dd795db99ae
Reviewed-on: https://gem5-review.googlesource.com/5421
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>