1/* 2 * Copyright (c) 2015, University of Kaiserslautern 3 * Copyright (c) 2016, Dresden University of Technology (TU Dresden) 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: --- 36 unchanged lines hidden (view full) --- 45 46#include <systemc> 47#include <tlm> 48 49#include "cli_parser.hh" 50#include "report_handler.hh" 51#include "sc_target.hh" 52#include "sim_control.hh" |
53#include "slave_transactor.hh" |
54#include "stats.hh" 55 56int 57sc_main(int argc, char **argv) 58{ 59 CliParser parser; 60 parser.parse(argc, argv); 61 62 sc_core::sc_report_handler::set_handler(reportHandler); 63 |
64 Gem5SystemC::Gem5SimControl sim_control("gem5", |
65 parser.getConfigFile(), 66 parser.getSimulationEnd(), 67 parser.getDebugFlags()); |
68 69 unsigned long long int memorySize = 512*1024*1024ULL; 70 |
71 Gem5SystemC::Gem5SlaveTransactor transactor("transactor", "transactor"); 72 Target memory("memory", 73 parser.getVerboseFlag(), 74 memorySize, 75 parser.getMemoryOffset()); |
76 |
77 memory.socket.bind(transactor.socket); 78 transactor.sim_control.bind(sim_control); |
79 |
80 SC_REPORT_INFO("sc_main", "Start of Simulation"); 81 82 sc_core::sc_start(); 83 84 SC_REPORT_INFO("sc_main", "End of Simulation"); 85 86 CxxConfig::statsDump(); 87 88 return EXIT_SUCCESS; 89} |