44,45c44,45
< # system.cluster.cpu#.commit.committedInsts
< # system.cluster.cpu#.commit.commitSquashedInsts
---
> # system.cpu#.commit.committedInsts
> # system.cpu#.commit.commitSquashedInsts
54,55c54,55
< system.cluster.il1_cache#.overall_hits::total
< system.cluster.il1_cache#.overall_misses::total
---
> system.il1_cache#.overall_hits::total
> system.il1_cache#.overall_misses::total
58,59c58,59
< system.cluster.dl1_cache#.overall_hits::total
< system.cluster.dl1_cache#.overall_misses::total
---
> system.dl1_cache#.overall_hits::total
> system.dl1_cache#.overall_misses::total
62,63c62,63
< system.cluster.cpu#.commit.committedInsts
< system.cluster.cpu#.commit.commitSquashedInsts
---
> system.cpu#.commit.committedInsts
> system.cpu#.commit.commitSquashedInsts
66,67c66,67
< system.cluster.cpu#.numCycles
< system.cluster.cpu#.idleCycles
---
> system.cpu#.numCycles
> system.cpu#.idleCycles
70c70
< system.cluster.cpu#.commit.branchMispredicts
---
> system.cpu#.commit.branchMispredicts
72,73c72,73
< system.cluster.cpu#.itb.hits
< system.cluster.cpu#.itb.misses
---
> system.cpu#.itb.hits
> system.cpu#.itb.misses
76,77c76,77
< system.cluster.cpu#.dtb.hits
< system.cluster.cpu#.dtb.misses
---
> system.cpu#.dtb.hits
> system.cpu#.dtb.misses
80,84c80,84
< system.cluster.cpu#.commit.loads
< system.cluster.cpu#.commit.membars
< system.cluster.cpu#.commit.branches
< system.cluster.cpu#.commit.fp_insts
< system.cluster.cpu#.commit.int_insts
---
> system.cpu#.commit.loads
> system.cpu#.commit.membars
> system.cpu#.commit.branches
> system.cpu#.commit.fp_insts
> system.cpu#.commit.int_insts
87,88c87,88
< system.cluster.cpu#.int_regfile_reads
< system.cluster.cpu#.int_regfile_writes
---
> system.cpu#.int_regfile_reads
> system.cpu#.int_regfile_writes
91,92c91,92
< system.cluster.cpu#.misc_regfile_reads
< system.cluster.cpu#.misc_regfile_writes
---
> system.cpu#.misc_regfile_reads
> system.cpu#.misc_regfile_writes
95,97c95,97
< system.cluster.cpu#.rename.ROBFullEvents
< system.cluster.cpu#.rename.IQFullEvents
< system.cluster.cpu#.rename.LSQFullEvents
---
> system.cpu#.rename.ROBFullEvents
> system.cpu#.rename.IQFullEvents
> system.cpu#.rename.LSQFullEvents
103,104c103,104
< system.cluster.l2_cache#.overall_hits::total
< system.cluster.l2_cache#.overall_misses::total
---
> system.l2_cache#.overall_hits::total
> system.l2_cache#.overall_misses::total
< # system.cluster.cpu#.commit.committedInsts
< # system.cluster.cpu#.commit.commitSquashedInsts
---
> # system.cpu#.commit.committedInsts
> # system.cpu#.commit.commitSquashedInsts
54,55c54,55
< system.cluster.il1_cache#.overall_hits::total
< system.cluster.il1_cache#.overall_misses::total
---
> system.il1_cache#.overall_hits::total
> system.il1_cache#.overall_misses::total
58,59c58,59
< system.cluster.dl1_cache#.overall_hits::total
< system.cluster.dl1_cache#.overall_misses::total
---
> system.dl1_cache#.overall_hits::total
> system.dl1_cache#.overall_misses::total
62,63c62,63
< system.cluster.cpu#.commit.committedInsts
< system.cluster.cpu#.commit.commitSquashedInsts
---
> system.cpu#.commit.committedInsts
> system.cpu#.commit.commitSquashedInsts
66,67c66,67
< system.cluster.cpu#.numCycles
< system.cluster.cpu#.idleCycles
---
> system.cpu#.numCycles
> system.cpu#.idleCycles
70c70
< system.cluster.cpu#.commit.branchMispredicts
---
> system.cpu#.commit.branchMispredicts
72,73c72,73
< system.cluster.cpu#.itb.hits
< system.cluster.cpu#.itb.misses
---
> system.cpu#.itb.hits
> system.cpu#.itb.misses
76,77c76,77
< system.cluster.cpu#.dtb.hits
< system.cluster.cpu#.dtb.misses
---
> system.cpu#.dtb.hits
> system.cpu#.dtb.misses
80,84c80,84
< system.cluster.cpu#.commit.loads
< system.cluster.cpu#.commit.membars
< system.cluster.cpu#.commit.branches
< system.cluster.cpu#.commit.fp_insts
< system.cluster.cpu#.commit.int_insts
---
> system.cpu#.commit.loads
> system.cpu#.commit.membars
> system.cpu#.commit.branches
> system.cpu#.commit.fp_insts
> system.cpu#.commit.int_insts
87,88c87,88
< system.cluster.cpu#.int_regfile_reads
< system.cluster.cpu#.int_regfile_writes
---
> system.cpu#.int_regfile_reads
> system.cpu#.int_regfile_writes
91,92c91,92
< system.cluster.cpu#.misc_regfile_reads
< system.cluster.cpu#.misc_regfile_writes
---
> system.cpu#.misc_regfile_reads
> system.cpu#.misc_regfile_writes
95,97c95,97
< system.cluster.cpu#.rename.ROBFullEvents
< system.cluster.cpu#.rename.IQFullEvents
< system.cluster.cpu#.rename.LSQFullEvents
---
> system.cpu#.rename.ROBFullEvents
> system.cpu#.rename.IQFullEvents
> system.cpu#.rename.LSQFullEvents
103,104c103,104
< system.cluster.l2_cache#.overall_hits::total
< system.cluster.l2_cache#.overall_misses::total
---
> system.l2_cache#.overall_hits::total
> system.l2_cache#.overall_misses::total