1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Nathan Binkert
30 * Ali Saidi
31 */
32
33#include <gem5/asm/generic/m5ops.h>
34
35#ifdef M5OP_ADDR
36/* Use the memory mapped m5op interface */
37#define TWO_BYTE_OP(name, number) \
38 .globl name; \
39 .func name; \
40name: \
41 mov m5_mem, %r11; \
42 mov $number, %rax; \
43 shl $8, %rax; \
44 mov 0(%r11, %rax, 1), %rax; \
45 ret; \
46 .endfunc;
47
48#else
49/* Use the magic instruction based m5op interface. This does not work
50 * in virtualized environments.
51 */
52
53#define TWO_BYTE_OP(name, number) \
54 .globl name; \
55 .func name; \
56name: \
57 .byte 0x0F, 0x04; \
58 .word number; \
59 ret; \
60 .endfunc;
61
62#endif
63
| 1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Nathan Binkert
30 * Ali Saidi
31 */
32
33#include <gem5/asm/generic/m5ops.h>
34
35#ifdef M5OP_ADDR
36/* Use the memory mapped m5op interface */
37#define TWO_BYTE_OP(name, number) \
38 .globl name; \
39 .func name; \
40name: \
41 mov m5_mem, %r11; \
42 mov $number, %rax; \
43 shl $8, %rax; \
44 mov 0(%r11, %rax, 1), %rax; \
45 ret; \
46 .endfunc;
47
48#else
49/* Use the magic instruction based m5op interface. This does not work
50 * in virtualized environments.
51 */
52
53#define TWO_BYTE_OP(name, number) \
54 .globl name; \
55 .func name; \
56name: \
57 .byte 0x0F, 0x04; \
58 .word number; \
59 ret; \
60 .endfunc;
61
62#endif
63
|
64TWO_BYTE_OP(arm, M5OP_ARM)
65TWO_BYTE_OP(quiesce, M5OP_QUIESCE)
66TWO_BYTE_OP(quiesceNs, M5OP_QUIESCE_NS)
67TWO_BYTE_OP(quiesceCycle, M5OP_QUIESCE_CYCLE)
68TWO_BYTE_OP(quiesceTime, M5OP_QUIESCE_TIME)
69TWO_BYTE_OP(rpns, M5OP_RPNS)
| 64TWO_BYTE_OP(m5_arm, M5OP_ARM)
65TWO_BYTE_OP(m5_quiesce, M5OP_QUIESCE)
66TWO_BYTE_OP(m5_quiesce_ns, M5OP_QUIESCE_NS)
67TWO_BYTE_OP(m5_quiesce_cycle, M5OP_QUIESCE_CYCLE)
68TWO_BYTE_OP(m5_quiesce_time, M5OP_QUIESCE_TIME)
69TWO_BYTE_OP(m5_rpns, M5OP_RPNS)
|
70TWO_BYTE_OP(m5_exit, M5OP_EXIT)
71TWO_BYTE_OP(m5_fail, M5OP_FAIL)
| 70TWO_BYTE_OP(m5_exit, M5OP_EXIT)
71TWO_BYTE_OP(m5_fail, M5OP_FAIL)
|
72TWO_BYTE_OP(m5_initparam, M5OP_INIT_PARAM)
73TWO_BYTE_OP(m5_loadsymbol, M5OP_LOAD_SYMBOL)
| 72TWO_BYTE_OP(m5_init_param, M5OP_INIT_PARAM)
73TWO_BYTE_OP(m5_load_symbol, M5OP_LOAD_SYMBOL)
|
74TWO_BYTE_OP(m5_reset_stats, M5OP_RESET_STATS)
75TWO_BYTE_OP(m5_dump_stats, M5OP_DUMP_STATS)
| 74TWO_BYTE_OP(m5_reset_stats, M5OP_RESET_STATS)
75TWO_BYTE_OP(m5_dump_stats, M5OP_DUMP_STATS)
|
76TWO_BYTE_OP(m5_dumpreset_stats, M5OP_DUMP_RESET_STATS)
| 76TWO_BYTE_OP(m5_dump_reset_stats, M5OP_DUMP_RESET_STATS)
|
77TWO_BYTE_OP(m5_checkpoint, M5OP_CHECKPOINT)
| 77TWO_BYTE_OP(m5_checkpoint, M5OP_CHECKPOINT)
|
78TWO_BYTE_OP(m5_readfile, M5OP_READ_FILE)
79TWO_BYTE_OP(m5_writefile, M5OP_WRITE_FILE)
80TWO_BYTE_OP(m5_debugbreak, M5OP_DEBUG_BREAK)
81TWO_BYTE_OP(m5_switchcpu, M5OP_SWITCH_CPU)
82TWO_BYTE_OP(m5_addsymbol, M5OP_ADD_SYMBOL)
| 78TWO_BYTE_OP(m5_read_file, M5OP_READ_FILE)
79TWO_BYTE_OP(m5_write_file, M5OP_WRITE_FILE)
80TWO_BYTE_OP(m5_debug_break, M5OP_DEBUG_BREAK)
81TWO_BYTE_OP(m5_switch_cpu, M5OP_SWITCH_CPU)
82TWO_BYTE_OP(m5_add_symbol, M5OP_ADD_SYMBOL)
|
83TWO_BYTE_OP(m5_panic, M5OP_PANIC)
84TWO_BYTE_OP(m5_work_begin, M5OP_WORK_BEGIN)
85TWO_BYTE_OP(m5_work_end, M5OP_WORK_END)
| 83TWO_BYTE_OP(m5_panic, M5OP_PANIC)
84TWO_BYTE_OP(m5_work_begin, M5OP_WORK_BEGIN)
85TWO_BYTE_OP(m5_work_end, M5OP_WORK_END)
|
86TWO_BYTE_OP(m5_togglesync, M5OP_DIST_TOGGLE_SYNC)
| 86TWO_BYTE_OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC)
|
| |