m5op_arm_A64.S (10037:5cac77888310) m5op_arm_A64.S (10185:dc565194a1cd)
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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68#define ARM INST(m5_op, 0, 0, arm_func)
69#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
70#define QUIESCENS INST(m5_op, 0, 0, quiescens_func)
71#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func)
72#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
73#define RPNS INST(m5_op, 0, 0, rpns_func)
74#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
75#define M5EXIT INST(m5_op, 0, 0, exit_func)
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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68#define ARM INST(m5_op, 0, 0, arm_func)
69#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
70#define QUIESCENS INST(m5_op, 0, 0, quiescens_func)
71#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func)
72#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
73#define RPNS INST(m5_op, 0, 0, rpns_func)
74#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
75#define M5EXIT INST(m5_op, 0, 0, exit_func)
76#define M5FAIL INST(m5_op, 0, 0, fail_func)
76#define INITPARAM INST(m5_op, 0, 0, initparam_func)
77#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
78#define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
79#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func)
80#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func)
81#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func)
82#define READFILE INST(m5_op, 0, 0, readfile_func)
83#define WRITEFILE INST(m5_op, 0, 0, writefile_func)

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110SIMPLE_OP(arm, ARM)
111SIMPLE_OP(quiesce, QUIESCE)
112SIMPLE_OP(quiesceNs, QUIESCENS)
113SIMPLE_OP(quiesceCycle, QUIESCECYC)
114SIMPLE_OP(quiesceTime, QUIESCETIME)
115SIMPLE_OP(rpns, RPNS)
116SIMPLE_OP(wakeCPU, WAKE_CPU)
117SIMPLE_OP(m5_exit, M5EXIT)
77#define INITPARAM INST(m5_op, 0, 0, initparam_func)
78#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
79#define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
80#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func)
81#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func)
82#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func)
83#define READFILE INST(m5_op, 0, 0, readfile_func)
84#define WRITEFILE INST(m5_op, 0, 0, writefile_func)

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111SIMPLE_OP(arm, ARM)
112SIMPLE_OP(quiesce, QUIESCE)
113SIMPLE_OP(quiesceNs, QUIESCENS)
114SIMPLE_OP(quiesceCycle, QUIESCECYC)
115SIMPLE_OP(quiesceTime, QUIESCETIME)
116SIMPLE_OP(rpns, RPNS)
117SIMPLE_OP(wakeCPU, WAKE_CPU)
118SIMPLE_OP(m5_exit, M5EXIT)
119SIMPLE_OP(m5_fail, M5FAIL)
118SIMPLE_OP(m5_initparam, INITPARAM)
119SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
120SIMPLE_OP(m5_reset_stats, RESET_STATS)
121SIMPLE_OP(m5_dump_stats, DUMP_STATS)
122SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS)
123SIMPLE_OP(m5_checkpoint, CHECKPOINT)
124SIMPLE_OP(m5_readfile, READFILE)
125SIMPLE_OP(m5_writefile, WRITEFILE)

--- 24 unchanged lines hidden --- 		120SIMPLE_OP(m5_initparam, INITPARAM)
121SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
122SIMPLE_OP(m5_reset_stats, RESET_STATS)
123SIMPLE_OP(m5_dump_stats, DUMP_STATS)
124SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS)
125SIMPLE_OP(m5_checkpoint, CHECKPOINT)
126SIMPLE_OP(m5_readfile, READFILE)
127SIMPLE_OP(m5_writefile, WRITEFILE)

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