m5op_arm.S (8987:a5add07e066c) m5op_arm.S (9660:5ca6098b9560)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Nathan Binkert
41 * Ali Saidi
42 * Chander Sudanthi
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 26 unchanged lines hidden (view full) ---

35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Nathan Binkert
41 * Ali Saidi
42 * Chander Sudanthi
43 * Andreas Sandberg
43 */
44.syntax unified
45#ifdef __thumb__
46.thumb
47#endif
48
44 */
45.syntax unified
46#ifdef __thumb__
47.thumb
48#endif
49
49#define m5_op 0xEE
50
51#include "m5ops.h"
52
50#include "m5ops.h"
51
52.text
53
54.macro simple_op name, func, subfunc
55 .globl \name
56\name:
57 /* First, try to trap into m5 using the m5-kvm hypercall
58 * hack. The bxj will become a branch to the fallback code
59 * if it is executed in the normal m5 environment.
60 */
61 push {lr}
62 ldr lr, =1f
63 ldr ip, =((((\func) & 0xFF) << 8) | ((\subfunc) & 0xFF))
64 bxj lr
65 pop {pc}
66
67 /* Old-style m5 pseudo instruction using CP1 accesses */
681:
53#ifdef __thumb__
69#ifdef __thumb__
54#define INST(op, ra, rb, func) \
55 .short (((op) << 8) | (func)); \
56 .short (((ra) << 12) | (0x1 << 8) | (0x1 << 4) | (rb))
57/* m5ops m5func */
58/* ra coproc 1 op=1 rb */
70 .short 0xEE00 | \func
71 .short 0x0110 | (\subfunc << 12)
59#else
60#define INST(op, ra, rb, func) \
72#else
73#define INST(op, ra, rb, func) \
61 .long (((op) << 24) | ((func) << 16) | ((ra) << 12) | (0x1 << 8) | (0x1 << 4) | (rb))
62/* m5ops m5func ra coproc 1 op=1 rb */
74 .long (0xEE000110 | (\func << 16) | (\subfunc << 12)
63#endif
75#endif
76 pop {pc}
77.endm
64
78
65#define LEAF(func) \
66 .globl func; \
67func:
79#define SIMPLE_OP(name, func, subfunc) simple_op name, func, subfunc
68
80
69#define RET \
70 mov pc,lr
81SIMPLE_OP(arm, arm_func, 0)
82SIMPLE_OP(quiesce, quiesce_func, 0)
83SIMPLE_OP(quiesceNs, quiescens_func, 0)
84SIMPLE_OP(quiesceCycle, quiescecycle_func, 0)
85SIMPLE_OP(quiesceTime, quiescetime_func, 0)
86SIMPLE_OP(rpns, rpns_func, 0)
87SIMPLE_OP(wakeCPU, wakecpu_func, 0)
88SIMPLE_OP(m5_exit, exit_func, 0)
89SIMPLE_OP(m5_initparam, initparam_func, 0)
90SIMPLE_OP(m5_loadsymbol, loadsymbol_func, 0)
91SIMPLE_OP(m5_reset_stats, resetstats_func, 0)
92SIMPLE_OP(m5_dump_stats, dumpstats_func, 0)
93SIMPLE_OP(m5_dumpreset_stats, dumprststats_func, 0)
94SIMPLE_OP(m5_checkpoint, ckpt_func, 0)
95SIMPLE_OP(m5_readfile, readfile_func, 0)
96SIMPLE_OP(m5_writefile, writefile_func, 0)
97SIMPLE_OP(m5_debugbreak, debugbreak_func, 0)
98SIMPLE_OP(m5_switchcpu, switchcpu_func, 0)
99SIMPLE_OP(m5_addsymbol, addsymbol_func, 0)
100SIMPLE_OP(m5_panic, panic_func, 0)
101SIMPLE_OP(m5_work_begin, work_begin_func, 0)
102SIMPLE_OP(m5_work_end, work_end_func, 0)
71
103
72#define END(func) \
73
74#define SIMPLE_OP(_f, _o) \
75 LEAF(_f) \
76 _o; \
77 RET; \
78 END(_f)
79
80#define ARM INST(m5_op, 0, 0, arm_func)
81#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
82#define QUIESCENS INST(m5_op, 0, 0, quiescens_func)
83#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func)
84#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
85#define RPNS INST(m5_op, 0, 0, rpns_func)
86#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
87#define M5EXIT INST(m5_op, 0, 0, exit_func)
88#define INITPARAM INST(m5_op, 0, 0, initparam_func)
89#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
90#define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
91#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func)
92#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func)
93#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func)
94#define READFILE INST(m5_op, 0, 0, readfile_func)
95#define WRITEFILE INST(m5_op, 0, 0, writefile_func)
96#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
97#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
98#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func)
99#define PANIC INST(m5_op, 0, 0, panic_func)
100#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func)
101#define WORK_END INST(m5_op, 0, 0, work_end_func)
102
103#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
104#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
105#define AN_BEGIN INST(m5_op, an_begin, 0, annotate_func)
106#define AN_END INST(m5_op, an_end, 0, annotate_func)
107#define AN_Q INST(m5_op, an_q, 0, annotate_func)
108#define AN_RQ INST(m5_op, an_rq, 0, annotate_func)
109#define AN_DQ INST(m5_op, an_dq, 0, annotate_func)
110#define AN_WF INST(m5_op, an_wf, 0, annotate_func)
111#define AN_WE INST(m5_op, an_we, 0, annotate_func)
112#define AN_WS INST(m5_op, an_ws, 0, annotate_func)
113#define AN_SQ INST(m5_op, an_sq, 0, annotate_func)
114#define AN_AQ INST(m5_op, an_aq, 0, annotate_func)
115#define AN_PQ INST(m5_op, an_pq, 0, annotate_func)
116#define AN_L INST(m5_op, an_l, 0, annotate_func)
117#define AN_IDENTIFY INST(m5_op, an_identify, 0, annotate_func)
118#define AN_GETID INST(m5_op, an_getid, 0, annotate_func)
119
120.text
121
122SIMPLE_OP(arm, ARM)
123SIMPLE_OP(quiesce, QUIESCE)
124SIMPLE_OP(quiesceNs, QUIESCENS)
125SIMPLE_OP(quiesceCycle, QUIESCECYC)
126SIMPLE_OP(quiesceTime, QUIESCETIME)
127SIMPLE_OP(rpns, RPNS)
128SIMPLE_OP(wakeCPU, WAKE_CPU)
129SIMPLE_OP(m5_exit, M5EXIT)
130SIMPLE_OP(m5_initparam, INITPARAM)
131SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
132SIMPLE_OP(m5_reset_stats, RESET_STATS)
133SIMPLE_OP(m5_dump_stats, DUMP_STATS)
134SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS)
135SIMPLE_OP(m5_checkpoint, CHECKPOINT)
136SIMPLE_OP(m5_readfile, READFILE)
137SIMPLE_OP(m5_writefile, WRITEFILE)
138SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
139SIMPLE_OP(m5_switchcpu, SWITCHCPU)
140SIMPLE_OP(m5_addsymbol, ADDSYMBOL)
141SIMPLE_OP(m5_panic, PANIC)
142SIMPLE_OP(m5_work_begin, WORK_BEGIN)
143SIMPLE_OP(m5_work_end, WORK_END)
144
145SIMPLE_OP(m5a_bsm, AN_BSM)
146SIMPLE_OP(m5a_esm, AN_ESM)
147SIMPLE_OP(m5a_begin, AN_BEGIN)
148SIMPLE_OP(m5a_end, AN_END)
149SIMPLE_OP(m5a_q, AN_Q)
150SIMPLE_OP(m5a_rq, AN_RQ)
151SIMPLE_OP(m5a_dq, AN_DQ)
152SIMPLE_OP(m5a_wf, AN_WF)
153SIMPLE_OP(m5a_we, AN_WE)
154SIMPLE_OP(m5a_ws, AN_WS)
155SIMPLE_OP(m5a_sq, AN_SQ)
156SIMPLE_OP(m5a_aq, AN_AQ)
157SIMPLE_OP(m5a_pq, AN_PQ)
158SIMPLE_OP(m5a_l, AN_L)
159SIMPLE_OP(m5a_identify, AN_IDENTIFY)
160SIMPLE_OP(m5a_getid, AN_GETID)
161
104SIMPLE_OP(m5a_bsm, annotate_func, an_bsm)
105SIMPLE_OP(m5a_esm, annotate_func, an_esm)
106SIMPLE_OP(m5a_begin, annotate_func, an_begin)
107SIMPLE_OP(m5a_end, annotate_func, an_end)
108SIMPLE_OP(m5a_q, annotate_func, an_q)
109SIMPLE_OP(m5a_rq, annotate_func, an_rq)
110SIMPLE_OP(m5a_dq, annotate_func, an_dq)
111SIMPLE_OP(m5a_wf, annotate_func, an_wf)
112SIMPLE_OP(m5a_we, annotate_func, an_we)
113SIMPLE_OP(m5a_ws, annotate_func, an_ws)
114SIMPLE_OP(m5a_sq, annotate_func, an_sq)
115SIMPLE_OP(m5a_aq, annotate_func, an_aq)
116SIMPLE_OP(m5a_pq, annotate_func, an_pq)
117SIMPLE_OP(m5a_l, annotate_func, an_l)
118SIMPLE_OP(m5a_identify, annotate_func, an_identify)
119SIMPLE_OP(m5a_getid, annotate_func, an_getid)