m5op_arm.S (8355:89071b71691e) | m5op_arm.S (8734:79592b2b1d55) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 66 unchanged lines hidden (view full) --- 75#define M5EXIT INST(m5_op, 0, 0, exit_func) 76#define INITPARAM INST(m5_op, 0, 0, initparam_func) 77#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func) 78#define RESET_STATS INST(m5_op, 0, 0, resetstats_func) 79#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func) 80#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func) 81#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func) 82#define READFILE INST(m5_op, 0, 0, readfile_func) | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 66 unchanged lines hidden (view full) --- 75#define M5EXIT INST(m5_op, 0, 0, exit_func) 76#define INITPARAM INST(m5_op, 0, 0, initparam_func) 77#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func) 78#define RESET_STATS INST(m5_op, 0, 0, resetstats_func) 79#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func) 80#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func) 81#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func) 82#define READFILE INST(m5_op, 0, 0, readfile_func) |
83#define WRITEFILE INST(m5_op, 0, 0, writefile_func) |
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83#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func) 84#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func) 85#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func) 86#define PANIC INST(m5_op, 0, 0, panic_func) 87#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func) 88#define WORK_END INST(m5_op, 0, 0, work_end_func) 89 90#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func) --- 25 unchanged lines hidden (view full) --- 116SIMPLE_OP(m5_exit, M5EXIT) 117SIMPLE_OP(m5_initparam, INITPARAM) 118SIMPLE_OP(m5_loadsymbol, LOADSYMBOL) 119SIMPLE_OP(m5_reset_stats, RESET_STATS) 120SIMPLE_OP(m5_dump_stats, DUMP_STATS) 121SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS) 122SIMPLE_OP(m5_checkpoint, CHECKPOINT) 123SIMPLE_OP(m5_readfile, READFILE) | 84#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func) 85#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func) 86#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func) 87#define PANIC INST(m5_op, 0, 0, panic_func) 88#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func) 89#define WORK_END INST(m5_op, 0, 0, work_end_func) 90 91#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func) --- 25 unchanged lines hidden (view full) --- 117SIMPLE_OP(m5_exit, M5EXIT) 118SIMPLE_OP(m5_initparam, INITPARAM) 119SIMPLE_OP(m5_loadsymbol, LOADSYMBOL) 120SIMPLE_OP(m5_reset_stats, RESET_STATS) 121SIMPLE_OP(m5_dump_stats, DUMP_STATS) 122SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS) 123SIMPLE_OP(m5_checkpoint, CHECKPOINT) 124SIMPLE_OP(m5_readfile, READFILE) |
125SIMPLE_OP(m5_writefile, WRITEFILE) |
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124SIMPLE_OP(m5_debugbreak, DEBUGBREAK) 125SIMPLE_OP(m5_switchcpu, SWITCHCPU) 126SIMPLE_OP(m5_addsymbol, ADDSYMBOL) 127SIMPLE_OP(m5_panic, PANIC) 128SIMPLE_OP(m5_work_begin, WORK_BEGIN) 129SIMPLE_OP(m5_work_end, WORK_END) 130 131SIMPLE_OP(m5a_bsm, AN_BSM) --- 16 unchanged lines hidden --- | 126SIMPLE_OP(m5_debugbreak, DEBUGBREAK) 127SIMPLE_OP(m5_switchcpu, SWITCHCPU) 128SIMPLE_OP(m5_addsymbol, ADDSYMBOL) 129SIMPLE_OP(m5_panic, PANIC) 130SIMPLE_OP(m5_work_begin, WORK_BEGIN) 131SIMPLE_OP(m5_work_end, WORK_END) 132 133SIMPLE_OP(m5a_bsm, AN_BSM) --- 16 unchanged lines hidden --- |