cpt_upgrader.py (9056:0e38b529c387) cpt_upgrader.py (9293:df7c3f99ebca)
1#!/usr/bin/env python
2
3# Copyright (c) 2012 ARM Limited
4# All rights reserved
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating

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56# file. As these operations can be isa specific the method can verify the isa
57# and use regexes to find the correct sections that need to be updated.
58
59
60import ConfigParser
61import sys, os
62import os.path as osp
63
1#!/usr/bin/env python
2
3# Copyright (c) 2012 ARM Limited
4# All rights reserved
5#
6# The license below extends only to copyright in the software and shall
7# not be construed as granting a license to any other intellectual
8# property including but not limited to intellectual property relating

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56# file. As these operations can be isa specific the method can verify the isa
57# and use regexes to find the correct sections that need to be updated.
58
59
60import ConfigParser
61import sys, os
62import os.path as osp
63
64def from_0(cpt):
65 pass
66
67# An example of a translator
64# An example of a translator
68def from_1(cpt):
65def from_0(cpt):
69 if cpt.get('root','isa') == 'arm':
70 for sec in cpt.sections():
71 import re
72 # Search for all the execution contexts
73 if re.search('.*sys.*\.cpu.*\.x.\..*', sec):
74 # Update each one
75 mr = cpt.get(sec, 'miscRegs').split()
76 #mr.insert(21,0)
77 #mr.insert(26,0)
78 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
79
66 if cpt.get('root','isa') == 'arm':
67 for sec in cpt.sections():
68 import re
69 # Search for all the execution contexts
70 if re.search('.*sys.*\.cpu.*\.x.\..*', sec):
71 # Update each one
72 mr = cpt.get(sec, 'miscRegs').split()
73 #mr.insert(21,0)
74 #mr.insert(26,0)
75 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
76
77# The backing store supporting the memories in the system has changed
78# in that it is now stored globally per address range. As a result the
79# actual storage is separate from the memory controllers themselves.
80def from_1(cpt):
81 for sec in cpt.sections():
82 import re
83 # Search for a physical memory
84 if re.search('.*sys.*\.physmem$', sec):
85 # Add the number of stores attribute to the global physmem
86 cpt.set(sec, 'nbr_of_stores', '1')
87
88 # Get the filename and size as this is moving to the
89 # specific backing store
90 mem_filename = cpt.get(sec, 'filename')
91 mem_size = cpt.get(sec, '_size')
92 cpt.remove_option(sec, 'filename')
93 cpt.remove_option(sec, '_size')
94
95 # Get the name so that we can create the new section
96 system_name = str(sec).split('.')[0]
97 section_name = system_name + '.physmem.store0'
98 cpt.add_section(section_name)
99 cpt.set(section_name, 'store_id', '0')
100 cpt.set(section_name, 'range_size', mem_size)
101 cpt.set(section_name, 'filename', mem_filename)
102 elif re.search('.*sys.*\.\w*mem$', sec):
103 # Due to the lack of information about a start address,
104 # this migration only works if there is a single memory in
105 # the system, thus starting at 0
106 raise ValueError("more than one memory detected (" + sec + ")")
107
80migrations = []
81migrations.append(from_0)
82migrations.append(from_1)
83
84verbose_print = False
85
86def verboseprint(*args):
87 if not verbose_print:

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108migrations = []
109migrations.append(from_0)
110migrations.append(from_1)
111
112verbose_print = False
113
114def verboseprint(*args):
115 if not verbose_print:

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