| cpt_upgrader.py (10285:6cb378bad253) | cpt_upgrader.py (10338:8bee5f4edb92) |
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| 1#!/usr/bin/env python 2 3# Copyright (c) 2012-2013 ARM Limited 4# All rights reserved 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating --- 560 unchanged lines hidden (view full) --- 569 else: 570 continue 571 572# The change between versions C and D is the addition of support for multiple 573# event queues, so for old checkpoints we must specify that there's only one. 574def from_B(cpt): 575 cpt.set('Globals', 'numMainEventQueues', '1') 576 | 1#!/usr/bin/env python 2 3# Copyright (c) 2012-2013 ARM Limited 4# All rights reserved 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating --- 560 unchanged lines hidden (view full) --- 569 else: 570 continue 571 572# The change between versions C and D is the addition of support for multiple 573# event queues, so for old checkpoints we must specify that there's only one. 574def from_B(cpt): 575 cpt.set('Globals', 'numMainEventQueues', '1') 576 |
| 577# Checkpoint version D uses condition code registers for the ARM 578# architecture; previously the integer register file was used for these 579# registers. To upgrade, we move those 5 integer registers to the ccRegs 580# register file. 581def from_C(cpt): 582 if cpt.get('root','isa') == 'arm': 583 for sec in cpt.sections(): 584 import re |
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| 577 | 585 |
| 586 re_cpu_match = re.match('^(.*sys.*\.cpu[^.]*)\.xc\.(.+)$', sec) 587 # Search for all the execution contexts 588 if not re_cpu_match: 589 continue 590 591 items = [] 592 for (item,value) in cpt.items(sec): 593 items.append(item) 594 if 'ccRegs' not in items: 595 intRegs = cpt.get(sec, 'intRegs').split() 596 597 ccRegs = intRegs[38:43] 598 del intRegs[38:43] 599 600 ccRegs.append('0') # CCREG_ZERO 601 602 cpt.set(sec, 'intRegs', ' '.join(intRegs)) 603 cpt.set(sec, 'ccRegs', ' '.join(ccRegs)) 604 |
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| 578migrations = [] 579migrations.append(from_0) 580migrations.append(from_1) 581migrations.append(from_2) 582migrations.append(from_3) 583migrations.append(from_4) 584migrations.append(from_5) 585migrations.append(from_6) 586migrations.append(from_7) 587migrations.append(from_8) 588migrations.append(from_9) 589migrations.append(from_A) 590migrations.append(from_B) | 605migrations = [] 606migrations.append(from_0) 607migrations.append(from_1) 608migrations.append(from_2) 609migrations.append(from_3) 610migrations.append(from_4) 611migrations.append(from_5) 612migrations.append(from_6) 613migrations.append(from_7) 614migrations.append(from_8) 615migrations.append(from_9) 616migrations.append(from_A) 617migrations.append(from_B) |
| 618migrations.append(from_C) |
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| 591 592verbose_print = False 593 594def verboseprint(*args): 595 if not verbose_print: 596 return 597 for arg in args: 598 print arg, --- 95 unchanged lines hidden --- | 619 620verbose_print = False 621 622def verboseprint(*args): 623 if not verbose_print: 624 return 625 for arg in args: 626 print arg, --- 95 unchanged lines hidden --- |