cpt_upgrader.py (9431:8bb372a49e1b) | cpt_upgrader.py (9818:ebd7d3e04b5f) |
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1#!/usr/bin/env python 2 3# Copyright (c) 2012 ARM Limited 4# All rights reserved 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating --- 179 unchanged lines hidden (view full) --- 188 import re 189 # Search for all ISA sections 190 if re.search('.*sys.*\.cpu.*\.isa', sec): 191 mr = cpt.get(sec, 'miscRegs').split() 192 # Remove MISCREG_CPSR_MODE 193 del mr[137] 194 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr)) 195 | 1#!/usr/bin/env python 2 3# Copyright (c) 2012 ARM Limited 4# All rights reserved 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating --- 179 unchanged lines hidden (view full) --- 188 import re 189 # Search for all ISA sections 190 if re.search('.*sys.*\.cpu.*\.isa', sec): 191 mr = cpt.get(sec, 'miscRegs').split() 192 # Remove MISCREG_CPSR_MODE 193 del mr[137] 194 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr)) 195 |
196# Version 6 of the checkpoint format adds tlb to x86 checkpoints 197def from_5(cpt): 198 if cpt.get('root','isa') == 'x86': 199 for sec in cpt.sections(): 200 import re 201 # Search for all ISA sections 202 if re.search('.*sys.*\.cpu.*\.dtb$', sec): 203 cpt.set(sec, '_size', '0') 204 cpt.set(sec, 'lruSeq', '0') |
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196 | 205 |
206 if re.search('.*sys.*\.cpu.*\.itb$', sec): 207 cpt.set(sec, '_size', '0') 208 cpt.set(sec, 'lruSeq', '0') 209 else: 210 print "ISA is not x86" |
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197 198migrations = [] 199migrations.append(from_0) 200migrations.append(from_1) 201migrations.append(from_2) 202migrations.append(from_3) 203migrations.append(from_4) | 211 212migrations = [] 213migrations.append(from_0) 214migrations.append(from_1) 215migrations.append(from_2) 216migrations.append(from_3) 217migrations.append(from_4) |
218migrations.append(from_5) |
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204 205verbose_print = False 206 207def verboseprint(*args): 208 if not verbose_print: 209 return 210 for arg in args: 211 print arg, --- 96 unchanged lines hidden --- | 219 220verbose_print = False 221 222def verboseprint(*args): 223 if not verbose_print: 224 return 225 for arg in args: 226 print arg, --- 96 unchanged lines hidden --- |