1# Copyright (c) 2012 ARM Limited
2# All rights reserved
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Steve Reinhardt
40
| 1# Copyright (c) 2012 ARM Limited
2# All rights reserved
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Steve Reinhardt
40
|
| 41from __future__ import print_function
42
|
41import os
42import sys
43import re
44import string
45
46from os.path import join as joinpath
47import os.path
48import os
49
50import m5
51
52def skip_test(reason=""):
53 """Signal that a test should be skipped and optionally print why.
54
55 Keyword arguments:
56 reason -- Reason why the test failed. Output is omitted if empty.
57 """
58
59 if reason:
| 43import os
44import sys
45import re
46import string
47
48from os.path import join as joinpath
49import os.path
50import os
51
52import m5
53
54def skip_test(reason=""):
55 """Signal that a test should be skipped and optionally print why.
56
57 Keyword arguments:
58 reason -- Reason why the test failed. Output is omitted if empty.
59 """
60
61 if reason:
|
60 print "Skipping test: %s" % reason
| 62 print("Skipping test: %s" % reason)
|
61 sys.exit(2)
62
63def has_sim_object(name):
64 """Test if a SimObject exists in the simulator.
65
66 Arguments:
67 name -- Name of SimObject (string)
68
69 Returns: True if the object exists, False otherwise.
70 """
71
72 try:
73 cls = getattr(m5.objects, name)
74 return issubclass(cls, m5.objects.SimObject)
75 except AttributeError:
76 return False
77
78def require_sim_object(name, fatal=False):
79 """Test if a SimObject exists and abort/skip test if not.
80
81 Arguments:
82 name -- Name of SimObject (string)
83
84 Keyword arguments:
85 fatal -- Set to True to indicate that the test should fail
86 instead of being skipped.
87 """
88
89 if has_sim_object(name):
90 return
91 else:
92 msg = "Test requires the '%s' SimObject." % name
93 if fatal:
94 m5.fatal(msg)
95 else:
96 skip_test(msg)
97
98
99def require_file(path, fatal=False, mode=os.F_OK):
100 """Test if a file exists and abort/skip test if not.
101
102 Arguments:
103 path -- File to test for.
104
105 Keyword arguments:
106 fatal -- Set to True to indicate that the test should fail
107 instead of being skipped.
108 modes -- Mode to test for, default to existence. See the
109 Python documentation for os.access().
110 """
111
112 if os.access(path, mode):
113 return
114 else:
115 msg = "Test requires '%s'" % path
116 if not os.path.exists(path):
117 msg += " which does not exist."
118 else:
119 msg += " which has incorrect permissions."
120
121 if fatal:
122 m5.fatal(msg)
123 else:
124 skip_test(msg)
125
126def require_kvm(kvm_dev="/dev/kvm", fatal=False):
127 """Test if KVM is available.
128
129 Keyword arguments:
130 kvm_dev -- Device to test (normally /dev/kvm)
131 fatal -- Set to True to indicate that the test should fail
132 instead of being skipped.
133 """
134
135 require_sim_object("BaseKvmCPU", fatal=fatal)
136 require_file(kvm_dev, fatal=fatal, mode=os.R_OK | os.W_OK)
137
138def run_test(root):
139 """Default run_test implementations. Scripts can override it."""
140
141 # instantiate configuration
142 m5.instantiate()
143
144 # simulate until program terminates
145 exit_event = m5.simulate(maxtick)
| 63 sys.exit(2)
64
65def has_sim_object(name):
66 """Test if a SimObject exists in the simulator.
67
68 Arguments:
69 name -- Name of SimObject (string)
70
71 Returns: True if the object exists, False otherwise.
72 """
73
74 try:
75 cls = getattr(m5.objects, name)
76 return issubclass(cls, m5.objects.SimObject)
77 except AttributeError:
78 return False
79
80def require_sim_object(name, fatal=False):
81 """Test if a SimObject exists and abort/skip test if not.
82
83 Arguments:
84 name -- Name of SimObject (string)
85
86 Keyword arguments:
87 fatal -- Set to True to indicate that the test should fail
88 instead of being skipped.
89 """
90
91 if has_sim_object(name):
92 return
93 else:
94 msg = "Test requires the '%s' SimObject." % name
95 if fatal:
96 m5.fatal(msg)
97 else:
98 skip_test(msg)
99
100
101def require_file(path, fatal=False, mode=os.F_OK):
102 """Test if a file exists and abort/skip test if not.
103
104 Arguments:
105 path -- File to test for.
106
107 Keyword arguments:
108 fatal -- Set to True to indicate that the test should fail
109 instead of being skipped.
110 modes -- Mode to test for, default to existence. See the
111 Python documentation for os.access().
112 """
113
114 if os.access(path, mode):
115 return
116 else:
117 msg = "Test requires '%s'" % path
118 if not os.path.exists(path):
119 msg += " which does not exist."
120 else:
121 msg += " which has incorrect permissions."
122
123 if fatal:
124 m5.fatal(msg)
125 else:
126 skip_test(msg)
127
128def require_kvm(kvm_dev="/dev/kvm", fatal=False):
129 """Test if KVM is available.
130
131 Keyword arguments:
132 kvm_dev -- Device to test (normally /dev/kvm)
133 fatal -- Set to True to indicate that the test should fail
134 instead of being skipped.
135 """
136
137 require_sim_object("BaseKvmCPU", fatal=fatal)
138 require_file(kvm_dev, fatal=fatal, mode=os.R_OK | os.W_OK)
139
140def run_test(root):
141 """Default run_test implementations. Scripts can override it."""
142
143 # instantiate configuration
144 m5.instantiate()
145
146 # simulate until program terminates
147 exit_event = m5.simulate(maxtick)
|
146 print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
| 148 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
|
147
148# Since we're in batch mode, dont allow tcp socket connections
149m5.disableAllListeners()
150
151# single "path" arg encodes everything we need to know about test
152(category, mode, name, isa, opsys, config) = sys.argv[1].split('/')[-6:]
153
154# find path to directory containing this file
155tests_root = os.path.dirname(__file__)
156test_progs = os.environ.get('M5_TEST_PROGS', '/dist/m5/regression/test-progs')
157if not os.path.isdir(test_progs):
158 test_progs = joinpath(tests_root, 'test-progs')
159
160# generate path to binary file
161def binpath(app, file=None):
162 # executable has same name as app unless specified otherwise
163 if not file:
164 file = app
165 return joinpath(test_progs, app, 'bin', isa, opsys, file)
166
167# generate path to input file
168def inputpath(app, file=None):
169 # input file has same name as app unless specified otherwise
170 if not file:
171 file = app
172 return joinpath(test_progs, app, 'input', file)
173
174def srcpath(path):
175 """Path to file in gem5's source tree"""
176 return joinpath(os.path.dirname(__file__), "..", path)
177
178# build configuration
179sys.path.append(joinpath(tests_root, 'configs'))
180test_filename = config
181# for ruby configurations, remove the protocol name from the test filename
182if re.search('-ruby', test_filename):
183 test_filename = test_filename.split('-ruby')[0]+'-ruby'
184execfile(joinpath(tests_root, 'configs', test_filename + '.py'))
185
186# set default maxtick... script can override
187# -1 means run forever
188maxtick = m5.MaxTick
189
190# tweak configuration for specific test
191sys.path.append(joinpath(tests_root, category, mode, name))
192execfile(joinpath(tests_root, category, mode, name, 'test.py'))
193
194# Initialize all CPUs in a system
195def initCPUs(sys):
196 def initCPU(cpu):
197 # We might actually have a MemTest object or something similar
198 # here that just pretends to be a CPU.
199 try:
200 cpu.createThreads()
201 except:
202 pass
203
204 # The CPU attribute doesn't exist in some cases, e.g. the Ruby
205 # testers.
206 if not hasattr(sys, "cpu"):
207 return
208
209 # The CPU can either be a list of CPUs or a single object.
210 if isinstance(sys.cpu, list):
211 [ initCPU(cpu) for cpu in sys.cpu ]
212 else:
213 initCPU(sys.cpu)
214
215# We might be creating a single system or a dual system. Try
216# initializing the CPUs in all known system attributes.
217for sysattr in [ "system", "testsys", "drivesys" ]:
218 if hasattr(root, sysattr):
219 initCPUs(getattr(root, sysattr))
220
221run_test(root)
| 149
150# Since we're in batch mode, dont allow tcp socket connections
151m5.disableAllListeners()
152
153# single "path" arg encodes everything we need to know about test
154(category, mode, name, isa, opsys, config) = sys.argv[1].split('/')[-6:]
155
156# find path to directory containing this file
157tests_root = os.path.dirname(__file__)
158test_progs = os.environ.get('M5_TEST_PROGS', '/dist/m5/regression/test-progs')
159if not os.path.isdir(test_progs):
160 test_progs = joinpath(tests_root, 'test-progs')
161
162# generate path to binary file
163def binpath(app, file=None):
164 # executable has same name as app unless specified otherwise
165 if not file:
166 file = app
167 return joinpath(test_progs, app, 'bin', isa, opsys, file)
168
169# generate path to input file
170def inputpath(app, file=None):
171 # input file has same name as app unless specified otherwise
172 if not file:
173 file = app
174 return joinpath(test_progs, app, 'input', file)
175
176def srcpath(path):
177 """Path to file in gem5's source tree"""
178 return joinpath(os.path.dirname(__file__), "..", path)
179
180# build configuration
181sys.path.append(joinpath(tests_root, 'configs'))
182test_filename = config
183# for ruby configurations, remove the protocol name from the test filename
184if re.search('-ruby', test_filename):
185 test_filename = test_filename.split('-ruby')[0]+'-ruby'
186execfile(joinpath(tests_root, 'configs', test_filename + '.py'))
187
188# set default maxtick... script can override
189# -1 means run forever
190maxtick = m5.MaxTick
191
192# tweak configuration for specific test
193sys.path.append(joinpath(tests_root, category, mode, name))
194execfile(joinpath(tests_root, category, mode, name, 'test.py'))
195
196# Initialize all CPUs in a system
197def initCPUs(sys):
198 def initCPU(cpu):
199 # We might actually have a MemTest object or something similar
200 # here that just pretends to be a CPU.
201 try:
202 cpu.createThreads()
203 except:
204 pass
205
206 # The CPU attribute doesn't exist in some cases, e.g. the Ruby
207 # testers.
208 if not hasattr(sys, "cpu"):
209 return
210
211 # The CPU can either be a list of CPUs or a single object.
212 if isinstance(sys.cpu, list):
213 [ initCPU(cpu) for cpu in sys.cpu ]
214 else:
215 initCPU(sys.cpu)
216
217# We might be creating a single system or a dual system. Try
218# initializing the CPUs in all known system attributes.
219for sysattr in [ "system", "testsys", "drivesys" ]:
220 if hasattr(root, sysattr):
221 initCPUs(getattr(root, sysattr))
222
223run_test(root)
|