4,5c4,5
< sim_ticks 270563082500 # Number of ticks simulated
< final_tick 270563082500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_ticks 270563083500 # Number of ticks simulated
> final_tick 270563083500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 1293394 # Simulator instruction rate (inst/s)
< host_op_rate 1293395 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 1809017316 # Simulator tick rate (ticks/s)
< host_mem_usage 297764 # Number of bytes of host memory used
< host_seconds 149.56 # Real time elapsed on the host
---
> host_inst_rate 1207450 # Simulator instruction rate (inst/s)
> host_op_rate 1207451 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 1688810940 # Simulator tick rate (ticks/s)
> host_mem_usage 300136 # Number of bytes of host memory used
> host_seconds 160.21 # Real time elapsed on the host
34c34
< system.cpu.numCycles 541126165 # number of cpu cycles simulated
---
> system.cpu.numCycles 541126167 # number of cpu cycles simulated
53c53
< system.cpu.num_busy_cycles 541126164.998000 # Number of busy cycles
---
> system.cpu.num_busy_cycles 541126166.998000 # Number of busy cycles
93c93
< system.cpu.dcache.tags.tagsinuse 1237.203933 # Cycle average of tags in use
---
> system.cpu.dcache.tags.tagsinuse 1237.203935 # Cycle average of tags in use
98c98
< system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203933 # Average occupied blocks per requestor
---
> system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203935 # Average occupied blocks per requestor
222c222
< system.cpu.icache.tags.tagsinuse 1591.579161 # Cycle average of tags in use
---
> system.cpu.icache.tags.tagsinuse 1591.579162 # Cycle average of tags in use
227c227
< system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579161 # Average occupied blocks per requestor
---
> system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579162 # Average occupied blocks per requestor
251,256c251,256
< system.cpu.icache.ReadReq_miss_latency::cpu.inst 310818500 # number of ReadReq miss cycles
< system.cpu.icache.ReadReq_miss_latency::total 310818500 # number of ReadReq miss cycles
< system.cpu.icache.demand_miss_latency::cpu.inst 310818500 # number of demand (read+write) miss cycles
< system.cpu.icache.demand_miss_latency::total 310818500 # number of demand (read+write) miss cycles
< system.cpu.icache.overall_miss_latency::cpu.inst 310818500 # number of overall miss cycles
< system.cpu.icache.overall_miss_latency::total 310818500 # number of overall miss cycles
---
> system.cpu.icache.ReadReq_miss_latency::cpu.inst 310819500 # number of ReadReq miss cycles
> system.cpu.icache.ReadReq_miss_latency::total 310819500 # number of ReadReq miss cycles
> system.cpu.icache.demand_miss_latency::cpu.inst 310819500 # number of demand (read+write) miss cycles
> system.cpu.icache.demand_miss_latency::total 310819500 # number of demand (read+write) miss cycles
> system.cpu.icache.overall_miss_latency::cpu.inst 310819500 # number of overall miss cycles
> system.cpu.icache.overall_miss_latency::total 310819500 # number of overall miss cycles
269,274c269,274
< system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 25294.474284 # average ReadReq miss latency
< system.cpu.icache.ReadReq_avg_miss_latency::total 25294.474284 # average ReadReq miss latency
< system.cpu.icache.demand_avg_miss_latency::cpu.inst 25294.474284 # average overall miss latency
< system.cpu.icache.demand_avg_miss_latency::total 25294.474284 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::cpu.inst 25294.474284 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::total 25294.474284 # average overall miss latency
---
> system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 25294.555664 # average ReadReq miss latency
> system.cpu.icache.ReadReq_avg_miss_latency::total 25294.555664 # average ReadReq miss latency
> system.cpu.icache.demand_avg_miss_latency::cpu.inst 25294.555664 # average overall miss latency
> system.cpu.icache.demand_avg_miss_latency::total 25294.555664 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::cpu.inst 25294.555664 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::total 25294.555664 # average overall miss latency
289,294c289,294
< system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 298530500 # number of ReadReq MSHR miss cycles
< system.cpu.icache.ReadReq_mshr_miss_latency::total 298530500 # number of ReadReq MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::cpu.inst 298530500 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::total 298530500 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::cpu.inst 298530500 # number of overall MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::total 298530500 # number of overall MSHR miss cycles
---
> system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 298531500 # number of ReadReq MSHR miss cycles
> system.cpu.icache.ReadReq_mshr_miss_latency::total 298531500 # number of ReadReq MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::cpu.inst 298531500 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::total 298531500 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::cpu.inst 298531500 # number of overall MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::total 298531500 # number of overall MSHR miss cycles
301,306c301,306
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 24294.474284 # average ReadReq mshr miss latency
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 24294.474284 # average ReadReq mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 24294.474284 # average overall mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::total 24294.474284 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 24294.474284 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::total 24294.474284 # average overall mshr miss latency
---
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 24294.555664 # average ReadReq mshr miss latency
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 24294.555664 # average ReadReq mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 24294.555664 # average overall mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::total 24294.555664 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 24294.555664 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::total 24294.555664 # average overall mshr miss latency
309c309
< system.cpu.l2cache.tags.tagsinuse 2678.340822 # Cycle average of tags in use
---
> system.cpu.l2cache.tags.tagsinuse 2678.340828 # Cycle average of tags in use
315c315
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282887 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282891 # Average occupied blocks per requestor
456a457,462
> system.cpu.toL2Bus.snoop_filter.tot_requests 24228 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 10365 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
472,473c478,479
< system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::mean 0.000041 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.006425 # Request fanout histogram
475,476c481,482
< system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 24228 100.00% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 24227 100.00% 100.00% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 1 0.00% 100.00% # Request fanout histogram
479c485
< system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
< sim_ticks 270563082500 # Number of ticks simulated
< final_tick 270563082500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_ticks 270563083500 # Number of ticks simulated
> final_tick 270563083500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 1293394 # Simulator instruction rate (inst/s)
< host_op_rate 1293395 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 1809017316 # Simulator tick rate (ticks/s)
< host_mem_usage 297764 # Number of bytes of host memory used
< host_seconds 149.56 # Real time elapsed on the host
---
> host_inst_rate 1207450 # Simulator instruction rate (inst/s)
> host_op_rate 1207451 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 1688810940 # Simulator tick rate (ticks/s)
> host_mem_usage 300136 # Number of bytes of host memory used
> host_seconds 160.21 # Real time elapsed on the host
34c34
< system.cpu.numCycles 541126165 # number of cpu cycles simulated
---
> system.cpu.numCycles 541126167 # number of cpu cycles simulated
53c53
< system.cpu.num_busy_cycles 541126164.998000 # Number of busy cycles
---
> system.cpu.num_busy_cycles 541126166.998000 # Number of busy cycles
93c93
< system.cpu.dcache.tags.tagsinuse 1237.203933 # Cycle average of tags in use
---
> system.cpu.dcache.tags.tagsinuse 1237.203935 # Cycle average of tags in use
98c98
< system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203933 # Average occupied blocks per requestor
---
> system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203935 # Average occupied blocks per requestor
222c222
< system.cpu.icache.tags.tagsinuse 1591.579161 # Cycle average of tags in use
---
> system.cpu.icache.tags.tagsinuse 1591.579162 # Cycle average of tags in use
227c227
< system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579161 # Average occupied blocks per requestor
---
> system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579162 # Average occupied blocks per requestor
251,256c251,256
< system.cpu.icache.ReadReq_miss_latency::cpu.inst 310818500 # number of ReadReq miss cycles
< system.cpu.icache.ReadReq_miss_latency::total 310818500 # number of ReadReq miss cycles
< system.cpu.icache.demand_miss_latency::cpu.inst 310818500 # number of demand (read+write) miss cycles
< system.cpu.icache.demand_miss_latency::total 310818500 # number of demand (read+write) miss cycles
< system.cpu.icache.overall_miss_latency::cpu.inst 310818500 # number of overall miss cycles
< system.cpu.icache.overall_miss_latency::total 310818500 # number of overall miss cycles
---
> system.cpu.icache.ReadReq_miss_latency::cpu.inst 310819500 # number of ReadReq miss cycles
> system.cpu.icache.ReadReq_miss_latency::total 310819500 # number of ReadReq miss cycles
> system.cpu.icache.demand_miss_latency::cpu.inst 310819500 # number of demand (read+write) miss cycles
> system.cpu.icache.demand_miss_latency::total 310819500 # number of demand (read+write) miss cycles
> system.cpu.icache.overall_miss_latency::cpu.inst 310819500 # number of overall miss cycles
> system.cpu.icache.overall_miss_latency::total 310819500 # number of overall miss cycles
269,274c269,274
< system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 25294.474284 # average ReadReq miss latency
< system.cpu.icache.ReadReq_avg_miss_latency::total 25294.474284 # average ReadReq miss latency
< system.cpu.icache.demand_avg_miss_latency::cpu.inst 25294.474284 # average overall miss latency
< system.cpu.icache.demand_avg_miss_latency::total 25294.474284 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::cpu.inst 25294.474284 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::total 25294.474284 # average overall miss latency
---
> system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 25294.555664 # average ReadReq miss latency
> system.cpu.icache.ReadReq_avg_miss_latency::total 25294.555664 # average ReadReq miss latency
> system.cpu.icache.demand_avg_miss_latency::cpu.inst 25294.555664 # average overall miss latency
> system.cpu.icache.demand_avg_miss_latency::total 25294.555664 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::cpu.inst 25294.555664 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::total 25294.555664 # average overall miss latency
289,294c289,294
< system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 298530500 # number of ReadReq MSHR miss cycles
< system.cpu.icache.ReadReq_mshr_miss_latency::total 298530500 # number of ReadReq MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::cpu.inst 298530500 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::total 298530500 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::cpu.inst 298530500 # number of overall MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::total 298530500 # number of overall MSHR miss cycles
---
> system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 298531500 # number of ReadReq MSHR miss cycles
> system.cpu.icache.ReadReq_mshr_miss_latency::total 298531500 # number of ReadReq MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::cpu.inst 298531500 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::total 298531500 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::cpu.inst 298531500 # number of overall MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::total 298531500 # number of overall MSHR miss cycles
301,306c301,306
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 24294.474284 # average ReadReq mshr miss latency
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 24294.474284 # average ReadReq mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 24294.474284 # average overall mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::total 24294.474284 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 24294.474284 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::total 24294.474284 # average overall mshr miss latency
---
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 24294.555664 # average ReadReq mshr miss latency
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 24294.555664 # average ReadReq mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 24294.555664 # average overall mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::total 24294.555664 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 24294.555664 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::total 24294.555664 # average overall mshr miss latency
309c309
< system.cpu.l2cache.tags.tagsinuse 2678.340822 # Cycle average of tags in use
---
> system.cpu.l2cache.tags.tagsinuse 2678.340828 # Cycle average of tags in use
315c315
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282887 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282891 # Average occupied blocks per requestor
456a457,462
> system.cpu.toL2Bus.snoop_filter.tot_requests 24228 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 10365 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
472,473c478,479
< system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::mean 0.000041 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.006425 # Request fanout histogram
475,476c481,482
< system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 24228 100.00% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 24227 100.00% 100.00% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 1 0.00% 100.00% # Request fanout histogram
479c485
< system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram