1Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simout
2Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simerr
3gem5 Simulator System. http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Nov 15 2015 14:58:33
7gem5 started Nov 15 2015 14:58:46
8gem5 executing on ribera.cs.wisc.edu, pid 5048
9command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
10
11Global frequency set at 1000000000000 ticks per second
12info: Entering event queue @ 0. Starting simulation...
13Exiting @ tick 100000000000 because simulate() limit reached