| stats.txt (11502:e273e86a873d) | stats.txt (11530:6e143fd2cabf) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000014 # Number of seconds simulated 4sim_ticks 14181 # Number of ticks simulated 5final_tick 14181 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000014 # Number of seconds simulated 4sim_ticks 14181 # Number of ticks simulated 5final_tick 14181 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks |
| 7host_tick_rate 154609 # Simulator tick rate (ticks/s) 8host_mem_usage 480252 # Number of bytes of host memory used 9host_seconds 0.09 # Real time elapsed on the host | 7host_tick_rate 238683 # Simulator tick rate (ticks/s) 8host_mem_usage 530468 # Number of bytes of host memory used 9host_seconds 0.06 # Real time elapsed on the host |
| 10system.voltage_domain.voltage 1 # Voltage in Volts 11system.clk_domain.clock 1 # Clock period in ticks | 10system.voltage_domain.voltage 1 # Voltage in Volts 11system.clk_domain.clock 1 # Clock period in ticks |
| 12system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 12system.mem_ctrls.bytes_read::dir_cntrl0 16576 # Number of bytes read from this memory 13system.mem_ctrls.bytes_read::total 16576 # Number of bytes read from this memory 14system.mem_ctrls.bytes_written::dir_cntrl0 576 # Number of bytes written to this memory 15system.mem_ctrls.bytes_written::total 576 # Number of bytes written to this memory 16system.mem_ctrls.num_reads::dir_cntrl0 259 # Number of read requests responded to by this memory 17system.mem_ctrls.num_reads::total 259 # Number of read requests responded to by this memory 18system.mem_ctrls.num_writes::dir_cntrl0 9 # Number of write requests responded to by this memory 19system.mem_ctrls.num_writes::total 9 # Number of write requests responded to by this memory --- 213 unchanged lines hidden (view full) --- 233system.mem_ctrls_1.preBackEnergy 4671600 # Energy for precharge background per rank (pJ) 234system.mem_ctrls_1.totalEnergy 5348424 # Total energy per rank (pJ) 235system.mem_ctrls_1.averagePower 665.889442 # Core power per rank (mW) 236system.mem_ctrls_1.memoryStateTime::IDLE 7786 # Time in different power states 237system.mem_ctrls_1.memoryStateTime::REF 260 # Time in different power states 238system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 239system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states 240system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states | 13system.mem_ctrls.bytes_read::dir_cntrl0 16576 # Number of bytes read from this memory 14system.mem_ctrls.bytes_read::total 16576 # Number of bytes read from this memory 15system.mem_ctrls.bytes_written::dir_cntrl0 576 # Number of bytes written to this memory 16system.mem_ctrls.bytes_written::total 576 # Number of bytes written to this memory 17system.mem_ctrls.num_reads::dir_cntrl0 259 # Number of read requests responded to by this memory 18system.mem_ctrls.num_reads::total 259 # Number of read requests responded to by this memory 19system.mem_ctrls.num_writes::dir_cntrl0 9 # Number of write requests responded to by this memory 20system.mem_ctrls.num_writes::total 9 # Number of write requests responded to by this memory --- 213 unchanged lines hidden (view full) --- 234system.mem_ctrls_1.preBackEnergy 4671600 # Energy for precharge background per rank (pJ) 235system.mem_ctrls_1.totalEnergy 5348424 # Total energy per rank (pJ) 236system.mem_ctrls_1.averagePower 665.889442 # Core power per rank (mW) 237system.mem_ctrls_1.memoryStateTime::IDLE 7786 # Time in different power states 238system.mem_ctrls_1.memoryStateTime::REF 260 # Time in different power states 239system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 240system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states 241system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states |
| 242system.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 241system.ruby.clk_domain.clock 1 # Clock period in ticks | 243system.ruby.clk_domain.clock 1 # Clock period in ticks |
| 244system.ruby.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 242system.ruby.outstanding_req_hist_seqr::bucket_size 2 243system.ruby.outstanding_req_hist_seqr::max_bucket 19 244system.ruby.outstanding_req_hist_seqr::samples 63 245system.ruby.outstanding_req_hist_seqr::mean 12.920635 246system.ruby.outstanding_req_hist_seqr::gmean 11.694862 247system.ruby.outstanding_req_hist_seqr::stdev 4.228557 248system.ruby.outstanding_req_hist_seqr | 1 1.59% 1.59% | 2 3.17% 4.76% | 2 3.17% 7.94% | 5 7.94% 15.87% | 4 6.35% 22.22% | 3 4.76% 26.98% | 5 7.94% 34.92% | 14 22.22% 57.14% | 27 42.86% 100.00% | 0 0.00% 100.00% 249system.ruby.outstanding_req_hist_seqr::total 63 --- 64 unchanged lines hidden (view full) --- 314system.cp_cntrl0.L1Icache.num_tag_array_reads 3 # number of tag array reads 315system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 316system.cp_cntrl0.L2cache.demand_misses 91 # Number of cache demand misses 317system.cp_cntrl0.L2cache.demand_accesses 91 # Number of cache demand accesses 318system.cp_cntrl0.L2cache.num_data_array_reads 81 # number of data array reads 319system.cp_cntrl0.L2cache.num_data_array_writes 84 # number of data array writes 320system.cp_cntrl0.L2cache.num_tag_array_reads 380 # number of tag array reads 321system.cp_cntrl0.L2cache.num_tag_array_writes 371 # number of tag array writes | 245system.ruby.outstanding_req_hist_seqr::bucket_size 2 246system.ruby.outstanding_req_hist_seqr::max_bucket 19 247system.ruby.outstanding_req_hist_seqr::samples 63 248system.ruby.outstanding_req_hist_seqr::mean 12.920635 249system.ruby.outstanding_req_hist_seqr::gmean 11.694862 250system.ruby.outstanding_req_hist_seqr::stdev 4.228557 251system.ruby.outstanding_req_hist_seqr | 1 1.59% 1.59% | 2 3.17% 4.76% | 2 3.17% 7.94% | 5 7.94% 15.87% | 4 6.35% 22.22% | 3 4.76% 26.98% | 5 7.94% 34.92% | 14 22.22% 57.14% | 27 42.86% 100.00% | 0 0.00% 100.00% 252system.ruby.outstanding_req_hist_seqr::total 63 --- 64 unchanged lines hidden (view full) --- 317system.cp_cntrl0.L1Icache.num_tag_array_reads 3 # number of tag array reads 318system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 319system.cp_cntrl0.L2cache.demand_misses 91 # Number of cache demand misses 320system.cp_cntrl0.L2cache.demand_accesses 91 # Number of cache demand accesses 321system.cp_cntrl0.L2cache.num_data_array_reads 81 # number of data array reads 322system.cp_cntrl0.L2cache.num_data_array_writes 84 # number of data array writes 323system.cp_cntrl0.L2cache.num_tag_array_reads 380 # number of tag array reads 324system.cp_cntrl0.L2cache.num_tag_array_writes 371 # number of tag array writes |
| 325system.cp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 322system.cp_cntrl0.sequencer.store_waiting_on_load 2 # Number of times a store aliased with a pending load 323system.cp_cntrl0.sequencer.store_waiting_on_store 3 # Number of times a store aliased with a pending store | 326system.cp_cntrl0.sequencer.store_waiting_on_load 2 # Number of times a store aliased with a pending load 327system.cp_cntrl0.sequencer.store_waiting_on_store 3 # Number of times a store aliased with a pending store |
| 328system.cp_cntrl0.sequencer1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 324system.cp_cntrl0.sequencer1.store_waiting_on_load 1 # Number of times a store aliased with a pending load 325system.cp_cntrl0.sequencer1.store_waiting_on_store 4 # Number of times a store aliased with a pending store | 329system.cp_cntrl0.sequencer1.store_waiting_on_load 1 # Number of times a store aliased with a pending load 330system.cp_cntrl0.sequencer1.store_waiting_on_store 4 # Number of times a store aliased with a pending store |
| 331system.cp_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 326system.cp_cntrl0.fully_busy_cycles 2 # cycles for which number of transistions == max transitions | 332system.cp_cntrl0.fully_busy_cycles 2 # cycles for which number of transistions == max transitions |
| 333system.cpu.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 327system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits 328system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses 329system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses 330system.dir_cntrl0.L3CacheMemory.num_data_array_writes 374 # number of data array writes 331system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 378 # number of tag array reads 332system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 378 # number of tag array writes 333system.dir_cntrl0.L3CacheMemory.num_tag_array_stalls 10169 # number of stalls caused by tag array 334system.dir_cntrl0.L3CacheMemory.num_data_array_stalls 5502 # number of stalls caused by data array | 334system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits 335system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses 336system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses 337system.dir_cntrl0.L3CacheMemory.num_data_array_writes 374 # number of data array writes 338system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 378 # number of tag array reads 339system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 378 # number of tag array writes 340system.dir_cntrl0.L3CacheMemory.num_tag_array_stalls 10169 # number of stalls caused by tag array 341system.dir_cntrl0.L3CacheMemory.num_data_array_stalls 5502 # number of stalls caused by data array |
| 342system.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 343system.ruby.network.ext_links00.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 335system.ruby.network.ext_links00.int_node.percent_links_utilized 0.199210 336system.ruby.network.ext_links00.int_node.msg_count.Control::0 308 337system.ruby.network.ext_links00.int_node.msg_count.Request_Control::0 385 338system.ruby.network.ext_links00.int_node.msg_count.Response_Data::2 393 339system.ruby.network.ext_links00.int_node.msg_count.Response_Control::2 227 340system.ruby.network.ext_links00.int_node.msg_count.Writeback_Data::2 66 341system.ruby.network.ext_links00.int_node.msg_count.Writeback_Control::2 70 342system.ruby.network.ext_links00.int_node.msg_count.Unblock_Control::4 303 343system.ruby.network.ext_links00.int_node.msg_bytes.Control::0 2464 344system.ruby.network.ext_links00.int_node.msg_bytes.Request_Control::0 3080 345system.ruby.network.ext_links00.int_node.msg_bytes.Response_Data::2 28296 346system.ruby.network.ext_links00.int_node.msg_bytes.Response_Control::2 1816 347system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Data::2 4752 348system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Control::2 560 349system.ruby.network.ext_links00.int_node.msg_bytes.Unblock_Control::4 2424 | 344system.ruby.network.ext_links00.int_node.percent_links_utilized 0.199210 345system.ruby.network.ext_links00.int_node.msg_count.Control::0 308 346system.ruby.network.ext_links00.int_node.msg_count.Request_Control::0 385 347system.ruby.network.ext_links00.int_node.msg_count.Response_Data::2 393 348system.ruby.network.ext_links00.int_node.msg_count.Response_Control::2 227 349system.ruby.network.ext_links00.int_node.msg_count.Writeback_Data::2 66 350system.ruby.network.ext_links00.int_node.msg_count.Writeback_Control::2 70 351system.ruby.network.ext_links00.int_node.msg_count.Unblock_Control::4 303 352system.ruby.network.ext_links00.int_node.msg_bytes.Control::0 2464 353system.ruby.network.ext_links00.int_node.msg_bytes.Request_Control::0 3080 354system.ruby.network.ext_links00.int_node.msg_bytes.Response_Data::2 28296 355system.ruby.network.ext_links00.int_node.msg_bytes.Response_Control::2 1816 356system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Data::2 4752 357system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Control::2 560 358system.ruby.network.ext_links00.int_node.msg_bytes.Unblock_Control::4 2424 |
| 359system.ruby.network.ext_links01.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 350system.ruby.network.ext_links01.int_node.percent_links_utilized 0.120981 351system.ruby.network.ext_links01.int_node.msg_count.Control::0 227 352system.ruby.network.ext_links01.int_node.msg_count.Request_Control::0 153 353system.ruby.network.ext_links01.int_node.msg_count.Response_Data::2 95 354system.ruby.network.ext_links01.int_node.msg_count.Response_Control::2 217 355system.ruby.network.ext_links01.int_node.msg_count.Writeback_Data::2 66 356system.ruby.network.ext_links01.int_node.msg_count.Writeback_Control::2 70 357system.ruby.network.ext_links01.int_node.msg_count.Unblock_Control::4 80 --- 7 unchanged lines hidden (view full) --- 365system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 366system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 367system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 368system.tcp_cntrl0.L1cache.num_data_array_reads 14 # number of data array reads 369system.tcp_cntrl0.L1cache.num_data_array_writes 116 # number of data array writes 370system.tcp_cntrl0.L1cache.num_tag_array_reads 314 # number of tag array reads 371system.tcp_cntrl0.L1cache.num_tag_array_writes 305 # number of tag array writes 372system.tcp_cntrl0.L1cache.num_tag_array_stalls 38 # number of stalls caused by tag array | 360system.ruby.network.ext_links01.int_node.percent_links_utilized 0.120981 361system.ruby.network.ext_links01.int_node.msg_count.Control::0 227 362system.ruby.network.ext_links01.int_node.msg_count.Request_Control::0 153 363system.ruby.network.ext_links01.int_node.msg_count.Response_Data::2 95 364system.ruby.network.ext_links01.int_node.msg_count.Response_Control::2 217 365system.ruby.network.ext_links01.int_node.msg_count.Writeback_Data::2 66 366system.ruby.network.ext_links01.int_node.msg_count.Writeback_Control::2 70 367system.ruby.network.ext_links01.int_node.msg_count.Unblock_Control::4 80 --- 7 unchanged lines hidden (view full) --- 375system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 376system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 377system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 378system.tcp_cntrl0.L1cache.num_data_array_reads 14 # number of data array reads 379system.tcp_cntrl0.L1cache.num_data_array_writes 116 # number of data array writes 380system.tcp_cntrl0.L1cache.num_tag_array_reads 314 # number of tag array reads 381system.tcp_cntrl0.L1cache.num_tag_array_writes 305 # number of tag array writes 382system.tcp_cntrl0.L1cache.num_tag_array_stalls 38 # number of stalls caused by tag array |
| 383system.tcp_cntrl0.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 373system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 374system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 5 # TCP to TCP load transfers 375system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 376system.tcp_cntrl0.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 377system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 378system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 79 # TCP to TCP store transfers 379system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 380system.tcp_cntrl0.coalescer.gpu_st_misses 21 # stores that miss in the GPU 381system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 382system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 383system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 384system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU 385system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 386system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 387system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 388system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU | 384system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 385system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 5 # TCP to TCP load transfers 386system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 387system.tcp_cntrl0.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 388system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 389system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 79 # TCP to TCP store transfers 390system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 391system.tcp_cntrl0.coalescer.gpu_st_misses 21 # stores that miss in the GPU 392system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 393system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 394system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 395system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU 396system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 397system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 398system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 399system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 400system.tcp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 401system.tcp_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 402system.ruby.network.ext_links02.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 389system.ruby.network.ext_links02.int_node.percent_links_utilized 0.173894 390system.ruby.network.ext_links02.int_node.msg_count.Control::0 81 391system.ruby.network.ext_links02.int_node.msg_count.Control::1 814 392system.ruby.network.ext_links02.int_node.msg_count.Request_Control::0 232 393system.ruby.network.ext_links02.int_node.msg_count.Request_Control::1 846 394system.ruby.network.ext_links02.int_node.msg_count.Response_Data::2 298 395system.ruby.network.ext_links02.int_node.msg_count.Response_Data::3 1644 396system.ruby.network.ext_links02.int_node.msg_count.Response_Control::2 10 --- 13 unchanged lines hidden (view full) --- 410system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 411system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 412system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 413system.tcp_cntrl1.L1cache.num_data_array_reads 10 # number of data array reads 414system.tcp_cntrl1.L1cache.num_data_array_writes 108 # number of data array writes 415system.tcp_cntrl1.L1cache.num_tag_array_reads 300 # number of tag array reads 416system.tcp_cntrl1.L1cache.num_tag_array_writes 289 # number of tag array writes 417system.tcp_cntrl1.L1cache.num_tag_array_stalls 44 # number of stalls caused by tag array | 403system.ruby.network.ext_links02.int_node.percent_links_utilized 0.173894 404system.ruby.network.ext_links02.int_node.msg_count.Control::0 81 405system.ruby.network.ext_links02.int_node.msg_count.Control::1 814 406system.ruby.network.ext_links02.int_node.msg_count.Request_Control::0 232 407system.ruby.network.ext_links02.int_node.msg_count.Request_Control::1 846 408system.ruby.network.ext_links02.int_node.msg_count.Response_Data::2 298 409system.ruby.network.ext_links02.int_node.msg_count.Response_Data::3 1644 410system.ruby.network.ext_links02.int_node.msg_count.Response_Control::2 10 --- 13 unchanged lines hidden (view full) --- 424system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 425system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 426system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 427system.tcp_cntrl1.L1cache.num_data_array_reads 10 # number of data array reads 428system.tcp_cntrl1.L1cache.num_data_array_writes 108 # number of data array writes 429system.tcp_cntrl1.L1cache.num_tag_array_reads 300 # number of tag array reads 430system.tcp_cntrl1.L1cache.num_tag_array_writes 289 # number of tag array writes 431system.tcp_cntrl1.L1cache.num_tag_array_stalls 44 # number of stalls caused by tag array |
| 432system.tcp_cntrl1.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 418system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 419system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 420system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 421system.tcp_cntrl1.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 422system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 423system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 74 # TCP to TCP store transfers 424system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 425system.tcp_cntrl1.coalescer.gpu_st_misses 20 # stores that miss in the GPU 426system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 427system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 428system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 429system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU 430system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 431system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 432system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 433system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU | 433system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 434system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 435system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 436system.tcp_cntrl1.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 437system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP 438system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 74 # TCP to TCP store transfers 439system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 440system.tcp_cntrl1.coalescer.gpu_st_misses 20 # stores that miss in the GPU 441system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 442system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 443system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 444system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU 445system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 446system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 447system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 448system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 449system.tcp_cntrl1.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 450system.tcp_cntrl1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 434system.tcp_cntrl2.L1cache.demand_hits 0 # Number of cache demand hits 435system.tcp_cntrl2.L1cache.demand_misses 0 # Number of cache demand misses 436system.tcp_cntrl2.L1cache.demand_accesses 0 # Number of cache demand accesses 437system.tcp_cntrl2.L1cache.num_data_array_reads 19 # number of data array reads 438system.tcp_cntrl2.L1cache.num_data_array_writes 108 # number of data array writes 439system.tcp_cntrl2.L1cache.num_tag_array_reads 302 # number of tag array reads 440system.tcp_cntrl2.L1cache.num_tag_array_writes 292 # number of tag array writes 441system.tcp_cntrl2.L1cache.num_tag_array_stalls 36 # number of stalls caused by tag array 442system.tcp_cntrl2.L1cache.num_data_array_stalls 3 # number of stalls caused by data array | 451system.tcp_cntrl2.L1cache.demand_hits 0 # Number of cache demand hits 452system.tcp_cntrl2.L1cache.demand_misses 0 # Number of cache demand misses 453system.tcp_cntrl2.L1cache.demand_accesses 0 # Number of cache demand accesses 454system.tcp_cntrl2.L1cache.num_data_array_reads 19 # number of data array reads 455system.tcp_cntrl2.L1cache.num_data_array_writes 108 # number of data array writes 456system.tcp_cntrl2.L1cache.num_tag_array_reads 302 # number of tag array reads 457system.tcp_cntrl2.L1cache.num_tag_array_writes 292 # number of tag array writes 458system.tcp_cntrl2.L1cache.num_tag_array_stalls 36 # number of stalls caused by tag array 459system.tcp_cntrl2.L1cache.num_data_array_stalls 3 # number of stalls caused by data array |
| 460system.tcp_cntrl2.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 443system.tcp_cntrl2.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 444system.tcp_cntrl2.coalescer.gpu_tcp_ld_transfers 9 # TCP to TCP load transfers 445system.tcp_cntrl2.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 446system.tcp_cntrl2.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 447system.tcp_cntrl2.coalescer.gpu_tcp_st_hits 7 # stores that hit in the TCP 448system.tcp_cntrl2.coalescer.gpu_tcp_st_transfers 72 # TCP to TCP store transfers 449system.tcp_cntrl2.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 450system.tcp_cntrl2.coalescer.gpu_st_misses 18 # stores that miss in the GPU 451system.tcp_cntrl2.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 452system.tcp_cntrl2.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 453system.tcp_cntrl2.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 454system.tcp_cntrl2.coalescer.cp_ld_misses 0 # loads that miss in the GPU 455system.tcp_cntrl2.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 456system.tcp_cntrl2.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 457system.tcp_cntrl2.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 458system.tcp_cntrl2.coalescer.cp_st_misses 0 # stores that miss in the GPU | 461system.tcp_cntrl2.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 462system.tcp_cntrl2.coalescer.gpu_tcp_ld_transfers 9 # TCP to TCP load transfers 463system.tcp_cntrl2.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 464system.tcp_cntrl2.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 465system.tcp_cntrl2.coalescer.gpu_tcp_st_hits 7 # stores that hit in the TCP 466system.tcp_cntrl2.coalescer.gpu_tcp_st_transfers 72 # TCP to TCP store transfers 467system.tcp_cntrl2.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 468system.tcp_cntrl2.coalescer.gpu_st_misses 18 # stores that miss in the GPU 469system.tcp_cntrl2.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 470system.tcp_cntrl2.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 471system.tcp_cntrl2.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 472system.tcp_cntrl2.coalescer.cp_ld_misses 0 # loads that miss in the GPU 473system.tcp_cntrl2.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 474system.tcp_cntrl2.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 475system.tcp_cntrl2.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 476system.tcp_cntrl2.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 477system.tcp_cntrl2.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 478system.tcp_cntrl2.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 459system.tcp_cntrl3.L1cache.demand_hits 0 # Number of cache demand hits 460system.tcp_cntrl3.L1cache.demand_misses 0 # Number of cache demand misses 461system.tcp_cntrl3.L1cache.demand_accesses 0 # Number of cache demand accesses 462system.tcp_cntrl3.L1cache.num_data_array_reads 7 # number of data array reads 463system.tcp_cntrl3.L1cache.num_data_array_writes 104 # number of data array writes 464system.tcp_cntrl3.L1cache.num_tag_array_reads 272 # number of tag array reads 465system.tcp_cntrl3.L1cache.num_tag_array_writes 262 # number of tag array writes 466system.tcp_cntrl3.L1cache.num_tag_array_stalls 16 # number of stalls caused by tag array 467system.tcp_cntrl3.L1cache.num_data_array_stalls 3 # number of stalls caused by data array | 479system.tcp_cntrl3.L1cache.demand_hits 0 # Number of cache demand hits 480system.tcp_cntrl3.L1cache.demand_misses 0 # Number of cache demand misses 481system.tcp_cntrl3.L1cache.demand_accesses 0 # Number of cache demand accesses 482system.tcp_cntrl3.L1cache.num_data_array_reads 7 # number of data array reads 483system.tcp_cntrl3.L1cache.num_data_array_writes 104 # number of data array writes 484system.tcp_cntrl3.L1cache.num_tag_array_reads 272 # number of tag array reads 485system.tcp_cntrl3.L1cache.num_tag_array_writes 262 # number of tag array writes 486system.tcp_cntrl3.L1cache.num_tag_array_stalls 16 # number of stalls caused by tag array 487system.tcp_cntrl3.L1cache.num_data_array_stalls 3 # number of stalls caused by data array |
| 488system.tcp_cntrl3.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 468system.tcp_cntrl3.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 469system.tcp_cntrl3.coalescer.gpu_tcp_ld_transfers 13 # TCP to TCP load transfers 470system.tcp_cntrl3.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 471system.tcp_cntrl3.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 472system.tcp_cntrl3.coalescer.gpu_tcp_st_hits 10 # stores that hit in the TCP 473system.tcp_cntrl3.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 474system.tcp_cntrl3.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 475system.tcp_cntrl3.coalescer.gpu_st_misses 18 # stores that miss in the GPU 476system.tcp_cntrl3.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 477system.tcp_cntrl3.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 478system.tcp_cntrl3.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 479system.tcp_cntrl3.coalescer.cp_ld_misses 0 # loads that miss in the GPU 480system.tcp_cntrl3.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 481system.tcp_cntrl3.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 482system.tcp_cntrl3.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 483system.tcp_cntrl3.coalescer.cp_st_misses 0 # stores that miss in the GPU | 489system.tcp_cntrl3.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 490system.tcp_cntrl3.coalescer.gpu_tcp_ld_transfers 13 # TCP to TCP load transfers 491system.tcp_cntrl3.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 492system.tcp_cntrl3.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 493system.tcp_cntrl3.coalescer.gpu_tcp_st_hits 10 # stores that hit in the TCP 494system.tcp_cntrl3.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 495system.tcp_cntrl3.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 496system.tcp_cntrl3.coalescer.gpu_st_misses 18 # stores that miss in the GPU 497system.tcp_cntrl3.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 498system.tcp_cntrl3.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 499system.tcp_cntrl3.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 500system.tcp_cntrl3.coalescer.cp_ld_misses 0 # loads that miss in the GPU 501system.tcp_cntrl3.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 502system.tcp_cntrl3.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 503system.tcp_cntrl3.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 504system.tcp_cntrl3.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 505system.tcp_cntrl3.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 506system.tcp_cntrl3.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 484system.tcp_cntrl4.L1cache.demand_hits 0 # Number of cache demand hits 485system.tcp_cntrl4.L1cache.demand_misses 0 # Number of cache demand misses 486system.tcp_cntrl4.L1cache.demand_accesses 0 # Number of cache demand accesses 487system.tcp_cntrl4.L1cache.num_data_array_reads 14 # number of data array reads 488system.tcp_cntrl4.L1cache.num_data_array_writes 115 # number of data array writes 489system.tcp_cntrl4.L1cache.num_tag_array_reads 317 # number of tag array reads 490system.tcp_cntrl4.L1cache.num_tag_array_writes 309 # number of tag array writes 491system.tcp_cntrl4.L1cache.num_tag_array_stalls 29 # number of stalls caused by tag array | 507system.tcp_cntrl4.L1cache.demand_hits 0 # Number of cache demand hits 508system.tcp_cntrl4.L1cache.demand_misses 0 # Number of cache demand misses 509system.tcp_cntrl4.L1cache.demand_accesses 0 # Number of cache demand accesses 510system.tcp_cntrl4.L1cache.num_data_array_reads 14 # number of data array reads 511system.tcp_cntrl4.L1cache.num_data_array_writes 115 # number of data array writes 512system.tcp_cntrl4.L1cache.num_tag_array_reads 317 # number of tag array reads 513system.tcp_cntrl4.L1cache.num_tag_array_writes 309 # number of tag array writes 514system.tcp_cntrl4.L1cache.num_tag_array_stalls 29 # number of stalls caused by tag array |
| 515system.tcp_cntrl4.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 492system.tcp_cntrl4.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 493system.tcp_cntrl4.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 494system.tcp_cntrl4.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 495system.tcp_cntrl4.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 496system.tcp_cntrl4.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 497system.tcp_cntrl4.coalescer.gpu_tcp_st_transfers 76 # TCP to TCP store transfers 498system.tcp_cntrl4.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 499system.tcp_cntrl4.coalescer.gpu_st_misses 26 # stores that miss in the GPU 500system.tcp_cntrl4.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 501system.tcp_cntrl4.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 502system.tcp_cntrl4.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 503system.tcp_cntrl4.coalescer.cp_ld_misses 0 # loads that miss in the GPU 504system.tcp_cntrl4.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 505system.tcp_cntrl4.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 506system.tcp_cntrl4.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 507system.tcp_cntrl4.coalescer.cp_st_misses 0 # stores that miss in the GPU | 516system.tcp_cntrl4.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 517system.tcp_cntrl4.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers 518system.tcp_cntrl4.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 519system.tcp_cntrl4.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 520system.tcp_cntrl4.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 521system.tcp_cntrl4.coalescer.gpu_tcp_st_transfers 76 # TCP to TCP store transfers 522system.tcp_cntrl4.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 523system.tcp_cntrl4.coalescer.gpu_st_misses 26 # stores that miss in the GPU 524system.tcp_cntrl4.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 525system.tcp_cntrl4.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 526system.tcp_cntrl4.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 527system.tcp_cntrl4.coalescer.cp_ld_misses 0 # loads that miss in the GPU 528system.tcp_cntrl4.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 529system.tcp_cntrl4.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 530system.tcp_cntrl4.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 531system.tcp_cntrl4.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 532system.tcp_cntrl4.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 533system.tcp_cntrl4.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 508system.tcp_cntrl5.L1cache.demand_hits 0 # Number of cache demand hits 509system.tcp_cntrl5.L1cache.demand_misses 0 # Number of cache demand misses 510system.tcp_cntrl5.L1cache.demand_accesses 0 # Number of cache demand accesses 511system.tcp_cntrl5.L1cache.num_data_array_reads 10 # number of data array reads 512system.tcp_cntrl5.L1cache.num_data_array_writes 107 # number of data array writes 513system.tcp_cntrl5.L1cache.num_tag_array_reads 295 # number of tag array reads 514system.tcp_cntrl5.L1cache.num_tag_array_writes 287 # number of tag array writes 515system.tcp_cntrl5.L1cache.num_tag_array_stalls 31 # number of stalls caused by tag array | 534system.tcp_cntrl5.L1cache.demand_hits 0 # Number of cache demand hits 535system.tcp_cntrl5.L1cache.demand_misses 0 # Number of cache demand misses 536system.tcp_cntrl5.L1cache.demand_accesses 0 # Number of cache demand accesses 537system.tcp_cntrl5.L1cache.num_data_array_reads 10 # number of data array reads 538system.tcp_cntrl5.L1cache.num_data_array_writes 107 # number of data array writes 539system.tcp_cntrl5.L1cache.num_tag_array_reads 295 # number of tag array reads 540system.tcp_cntrl5.L1cache.num_tag_array_writes 287 # number of tag array writes 541system.tcp_cntrl5.L1cache.num_tag_array_stalls 31 # number of stalls caused by tag array |
| 542system.tcp_cntrl5.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 516system.tcp_cntrl5.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 517system.tcp_cntrl5.coalescer.gpu_tcp_ld_transfers 6 # TCP to TCP load transfers 518system.tcp_cntrl5.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 519system.tcp_cntrl5.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 520system.tcp_cntrl5.coalescer.gpu_tcp_st_hits 8 # stores that hit in the TCP 521system.tcp_cntrl5.coalescer.gpu_tcp_st_transfers 69 # TCP to TCP store transfers 522system.tcp_cntrl5.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 523system.tcp_cntrl5.coalescer.gpu_st_misses 23 # stores that miss in the GPU 524system.tcp_cntrl5.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 525system.tcp_cntrl5.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 526system.tcp_cntrl5.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 527system.tcp_cntrl5.coalescer.cp_ld_misses 0 # loads that miss in the GPU 528system.tcp_cntrl5.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 529system.tcp_cntrl5.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 530system.tcp_cntrl5.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 531system.tcp_cntrl5.coalescer.cp_st_misses 0 # stores that miss in the GPU | 543system.tcp_cntrl5.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 544system.tcp_cntrl5.coalescer.gpu_tcp_ld_transfers 6 # TCP to TCP load transfers 545system.tcp_cntrl5.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 546system.tcp_cntrl5.coalescer.gpu_ld_misses 0 # loads that miss in the GPU 547system.tcp_cntrl5.coalescer.gpu_tcp_st_hits 8 # stores that hit in the TCP 548system.tcp_cntrl5.coalescer.gpu_tcp_st_transfers 69 # TCP to TCP store transfers 549system.tcp_cntrl5.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 550system.tcp_cntrl5.coalescer.gpu_st_misses 23 # stores that miss in the GPU 551system.tcp_cntrl5.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 552system.tcp_cntrl5.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 553system.tcp_cntrl5.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 554system.tcp_cntrl5.coalescer.cp_ld_misses 0 # loads that miss in the GPU 555system.tcp_cntrl5.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 556system.tcp_cntrl5.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 557system.tcp_cntrl5.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 558system.tcp_cntrl5.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 559system.tcp_cntrl5.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 560system.tcp_cntrl5.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 532system.tcp_cntrl6.L1cache.demand_hits 0 # Number of cache demand hits 533system.tcp_cntrl6.L1cache.demand_misses 0 # Number of cache demand misses 534system.tcp_cntrl6.L1cache.demand_accesses 0 # Number of cache demand accesses 535system.tcp_cntrl6.L1cache.num_data_array_reads 13 # number of data array reads 536system.tcp_cntrl6.L1cache.num_data_array_writes 123 # number of data array writes 537system.tcp_cntrl6.L1cache.num_tag_array_reads 342 # number of tag array reads 538system.tcp_cntrl6.L1cache.num_tag_array_writes 335 # number of tag array writes 539system.tcp_cntrl6.L1cache.num_tag_array_stalls 49 # number of stalls caused by tag array | 561system.tcp_cntrl6.L1cache.demand_hits 0 # Number of cache demand hits 562system.tcp_cntrl6.L1cache.demand_misses 0 # Number of cache demand misses 563system.tcp_cntrl6.L1cache.demand_accesses 0 # Number of cache demand accesses 564system.tcp_cntrl6.L1cache.num_data_array_reads 13 # number of data array reads 565system.tcp_cntrl6.L1cache.num_data_array_writes 123 # number of data array writes 566system.tcp_cntrl6.L1cache.num_tag_array_reads 342 # number of tag array reads 567system.tcp_cntrl6.L1cache.num_tag_array_writes 335 # number of tag array writes 568system.tcp_cntrl6.L1cache.num_tag_array_stalls 49 # number of stalls caused by tag array |
| 569system.tcp_cntrl6.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 540system.tcp_cntrl6.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 541system.tcp_cntrl6.coalescer.gpu_tcp_ld_transfers 11 # TCP to TCP load transfers 542system.tcp_cntrl6.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 543system.tcp_cntrl6.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 544system.tcp_cntrl6.coalescer.gpu_tcp_st_hits 5 # stores that hit in the TCP 545system.tcp_cntrl6.coalescer.gpu_tcp_st_transfers 86 # TCP to TCP store transfers 546system.tcp_cntrl6.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 547system.tcp_cntrl6.coalescer.gpu_st_misses 19 # stores that miss in the GPU 548system.tcp_cntrl6.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 549system.tcp_cntrl6.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 550system.tcp_cntrl6.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 551system.tcp_cntrl6.coalescer.cp_ld_misses 0 # loads that miss in the GPU 552system.tcp_cntrl6.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 553system.tcp_cntrl6.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 554system.tcp_cntrl6.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 555system.tcp_cntrl6.coalescer.cp_st_misses 0 # stores that miss in the GPU | 570system.tcp_cntrl6.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 571system.tcp_cntrl6.coalescer.gpu_tcp_ld_transfers 11 # TCP to TCP load transfers 572system.tcp_cntrl6.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 573system.tcp_cntrl6.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 574system.tcp_cntrl6.coalescer.gpu_tcp_st_hits 5 # stores that hit in the TCP 575system.tcp_cntrl6.coalescer.gpu_tcp_st_transfers 86 # TCP to TCP store transfers 576system.tcp_cntrl6.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 577system.tcp_cntrl6.coalescer.gpu_st_misses 19 # stores that miss in the GPU 578system.tcp_cntrl6.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 579system.tcp_cntrl6.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 580system.tcp_cntrl6.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 581system.tcp_cntrl6.coalescer.cp_ld_misses 0 # loads that miss in the GPU 582system.tcp_cntrl6.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 583system.tcp_cntrl6.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 584system.tcp_cntrl6.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 585system.tcp_cntrl6.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 586system.tcp_cntrl6.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 587system.tcp_cntrl6.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 556system.tcp_cntrl7.L1cache.demand_hits 0 # Number of cache demand hits 557system.tcp_cntrl7.L1cache.demand_misses 0 # Number of cache demand misses 558system.tcp_cntrl7.L1cache.demand_accesses 0 # Number of cache demand accesses 559system.tcp_cntrl7.L1cache.num_data_array_reads 10 # number of data array reads 560system.tcp_cntrl7.L1cache.num_data_array_writes 97 # number of data array writes 561system.tcp_cntrl7.L1cache.num_tag_array_reads 263 # number of tag array reads 562system.tcp_cntrl7.L1cache.num_tag_array_writes 256 # number of tag array writes 563system.tcp_cntrl7.L1cache.num_tag_array_stalls 11 # number of stalls caused by tag array | 588system.tcp_cntrl7.L1cache.demand_hits 0 # Number of cache demand hits 589system.tcp_cntrl7.L1cache.demand_misses 0 # Number of cache demand misses 590system.tcp_cntrl7.L1cache.demand_accesses 0 # Number of cache demand accesses 591system.tcp_cntrl7.L1cache.num_data_array_reads 10 # number of data array reads 592system.tcp_cntrl7.L1cache.num_data_array_writes 97 # number of data array writes 593system.tcp_cntrl7.L1cache.num_tag_array_reads 263 # number of tag array reads 594system.tcp_cntrl7.L1cache.num_tag_array_writes 256 # number of tag array writes 595system.tcp_cntrl7.L1cache.num_tag_array_stalls 11 # number of stalls caused by tag array |
| 596system.tcp_cntrl7.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 564system.tcp_cntrl7.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 565system.tcp_cntrl7.coalescer.gpu_tcp_ld_transfers 10 # TCP to TCP load transfers 566system.tcp_cntrl7.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 567system.tcp_cntrl7.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 568system.tcp_cntrl7.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 569system.tcp_cntrl7.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 570system.tcp_cntrl7.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 571system.tcp_cntrl7.coalescer.gpu_st_misses 16 # stores that miss in the GPU 572system.tcp_cntrl7.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 573system.tcp_cntrl7.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 574system.tcp_cntrl7.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 575system.tcp_cntrl7.coalescer.cp_ld_misses 0 # loads that miss in the GPU 576system.tcp_cntrl7.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 577system.tcp_cntrl7.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 578system.tcp_cntrl7.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 579system.tcp_cntrl7.coalescer.cp_st_misses 0 # stores that miss in the GPU | 597system.tcp_cntrl7.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP 598system.tcp_cntrl7.coalescer.gpu_tcp_ld_transfers 10 # TCP to TCP load transfers 599system.tcp_cntrl7.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 600system.tcp_cntrl7.coalescer.gpu_ld_misses 1 # loads that miss in the GPU 601system.tcp_cntrl7.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP 602system.tcp_cntrl7.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers 603system.tcp_cntrl7.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 604system.tcp_cntrl7.coalescer.gpu_st_misses 16 # stores that miss in the GPU 605system.tcp_cntrl7.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 606system.tcp_cntrl7.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 607system.tcp_cntrl7.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 608system.tcp_cntrl7.coalescer.cp_ld_misses 0 # loads that miss in the GPU 609system.tcp_cntrl7.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 610system.tcp_cntrl7.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 611system.tcp_cntrl7.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 612system.tcp_cntrl7.coalescer.cp_st_misses 0 # stores that miss in the GPU |
| 613system.tcp_cntrl7.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 614system.tcp_cntrl7.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 580system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 581system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 582system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 583system.sqc_cntrl0.L1cache.num_data_array_reads 12 # number of data array reads 584system.sqc_cntrl0.L1cache.num_data_array_writes 12 # number of data array writes 585system.sqc_cntrl0.L1cache.num_tag_array_reads 22 # number of tag array reads 586system.sqc_cntrl0.L1cache.num_tag_array_writes 22 # number of tag array writes | 615system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 616system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 617system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 618system.sqc_cntrl0.L1cache.num_data_array_reads 12 # number of data array reads 619system.sqc_cntrl0.L1cache.num_data_array_writes 12 # number of data array writes 620system.sqc_cntrl0.L1cache.num_tag_array_reads 22 # number of tag array reads 621system.sqc_cntrl0.L1cache.num_tag_array_writes 22 # number of tag array writes |
| 622system.sqc_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 623system.sqc_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 587system.sqc_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 588system.sqc_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 589system.sqc_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 590system.sqc_cntrl1.L1cache.num_data_array_reads 15 # number of data array reads 591system.sqc_cntrl1.L1cache.num_data_array_writes 15 # number of data array writes 592system.sqc_cntrl1.L1cache.num_tag_array_reads 29 # number of tag array reads 593system.sqc_cntrl1.L1cache.num_tag_array_writes 29 # number of tag array writes | 624system.sqc_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 625system.sqc_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 626system.sqc_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 627system.sqc_cntrl1.L1cache.num_data_array_reads 15 # number of data array reads 628system.sqc_cntrl1.L1cache.num_data_array_writes 15 # number of data array writes 629system.sqc_cntrl1.L1cache.num_tag_array_reads 29 # number of tag array reads 630system.sqc_cntrl1.L1cache.num_tag_array_writes 29 # number of tag array writes |
| 631system.sqc_cntrl1.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 632system.sqc_cntrl1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
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| 594system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 595system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses 596system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses | 633system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 634system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses 635system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses |
| 636system.tcc_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
|
| 597system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits 598system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses 599system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses 600system.tccdir_cntrl0.directory.num_tag_array_reads 917 # number of tag array reads 601system.tccdir_cntrl0.directory.num_tag_array_writes 902 # number of tag array writes | 637system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits 638system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses 639system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses 640system.tccdir_cntrl0.directory.num_tag_array_reads 917 # number of tag array reads 641system.tccdir_cntrl0.directory.num_tag_array_writes 902 # number of tag array writes |
| 642system.tccdir_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states 643system.ruby.network.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
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| 602system.ruby.network.msg_count.Control 1430 603system.ruby.network.msg_count.Request_Control 1616 604system.ruby.network.msg_count.Response_Data 2430 605system.ruby.network.msg_count.Response_Control 456 606system.ruby.network.msg_count.Writeback_Data 132 607system.ruby.network.msg_count.Writeback_Control 140 608system.ruby.network.msg_count.Unblock_Control 1437 609system.ruby.network.msg_byte.Control 11440 610system.ruby.network.msg_byte.Request_Control 12928 611system.ruby.network.msg_byte.Response_Data 174960 612system.ruby.network.msg_byte.Response_Control 3648 613system.ruby.network.msg_byte.Writeback_Data 9504 614system.ruby.network.msg_byte.Writeback_Control 1120 615system.ruby.network.msg_byte.Unblock_Control 11496 | 644system.ruby.network.msg_count.Control 1430 645system.ruby.network.msg_count.Request_Control 1616 646system.ruby.network.msg_count.Response_Data 2430 647system.ruby.network.msg_count.Response_Control 456 648system.ruby.network.msg_count.Writeback_Data 132 649system.ruby.network.msg_count.Writeback_Control 140 650system.ruby.network.msg_count.Unblock_Control 1437 651system.ruby.network.msg_byte.Control 11440 652system.ruby.network.msg_byte.Request_Control 12928 653system.ruby.network.msg_byte.Response_Data 174960 654system.ruby.network.msg_byte.Response_Control 3648 655system.ruby.network.msg_byte.Writeback_Data 9504 656system.ruby.network.msg_byte.Writeback_Control 1120 657system.ruby.network.msg_byte.Unblock_Control 11496 |
| 658system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states |
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| 616system.ruby.network.ext_links00.int_node.throttle0.link_utilization 0.250555 617system.ruby.network.ext_links00.int_node.throttle0.msg_count.Request_Control::0 385 618system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Data::2 85 619system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Control::2 227 620system.ruby.network.ext_links00.int_node.throttle0.msg_count.Writeback_Data::2 66 621system.ruby.network.ext_links00.int_node.throttle0.msg_count.Unblock_Control::4 303 622system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Request_Control::0 3080 623system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Data::2 6120 --- 576 unchanged lines hidden --- | 659system.ruby.network.ext_links00.int_node.throttle0.link_utilization 0.250555 660system.ruby.network.ext_links00.int_node.throttle0.msg_count.Request_Control::0 385 661system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Data::2 85 662system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Control::2 227 663system.ruby.network.ext_links00.int_node.throttle0.msg_count.Writeback_Data::2 66 664system.ruby.network.ext_links00.int_node.throttle0.msg_count.Unblock_Control::4 303 665system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Request_Control::0 3080 666system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Data::2 6120 --- 576 unchanged lines hidden --- |