| config.ini (11440:76b5639162af) | config.ini (11570:4aac82f10951) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain |
| 17default_p_state=UNDEFINED |
|
| 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=atomic 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 | 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=atomic 26mem_ranges= 27memories=system.physmem 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 |
| 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null |
|
| 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 --- 12 unchanged lines hidden (view full) --- 50 51[system.cpu] 52type=AtomicSimpleCPU 53children=dtb interrupts isa itb tracer workload 54branchPred=Null 55checker=Null 56clk_domain=system.cpu_clk_domain 57cpu_id=0 | 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 --- 12 unchanged lines hidden (view full) --- 55 56[system.cpu] 57type=AtomicSimpleCPU 58children=dtb interrupts isa itb tracer workload 59branchPred=Null 60checker=Null 61clk_domain=system.cpu_clk_domain 62cpu_id=0 |
| 63default_p_state=UNDEFINED |
|
| 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dtb=system.cpu.dtb 62eventq_index=0 63fastmem=false 64function_trace=false 65function_trace_start=0 66interrupts=system.cpu.interrupts 67isa=system.cpu.isa 68itb=system.cpu.itb 69max_insts_all_threads=0 70max_insts_any_thread=0 71max_loads_all_threads=0 72max_loads_any_thread=0 73numThreads=1 | 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dtb=system.cpu.dtb 68eventq_index=0 69fastmem=false 70function_trace=false 71function_trace_start=0 72interrupts=system.cpu.interrupts 73isa=system.cpu.isa 74itb=system.cpu.itb 75max_insts_all_threads=0 76max_insts_any_thread=0 77max_loads_all_threads=0 78max_loads_any_thread=0 79numThreads=1 |
| 80p_state_clk_gate_bins=20 81p_state_clk_gate_max=1000000000000 82p_state_clk_gate_min=1000 83power_model=Null |
|
| 74profile=0 75progress_interval=0 76simpoint_start_insts= 77simulate_data_stalls=false 78simulate_inst_stalls=false 79socket_id=0 80switched_out=false 81system=system --- 30 unchanged lines hidden (view full) --- 112cmd=vortex bendian.raw 113cwd=build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic 114drivers= 115egid=100 116env= 117errout=cerr 118euid=100 119eventq_index=0 | 84profile=0 85progress_interval=0 86simpoint_start_insts= 87simulate_data_stalls=false 88simulate_inst_stalls=false 89socket_id=0 90switched_out=false 91system=system --- 30 unchanged lines hidden (view full) --- 122cmd=vortex bendian.raw 123cwd=build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic 124drivers= 125egid=100 126env= 127errout=cerr 128euid=100 129eventq_index=0 |
| 120executable=/home/stever/m5/dist/cpu2000/binaries/sparc/linux/vortex | 130executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/sparc/linux/vortex |
| 121gid=100 122input=cin 123kvmInSE=false 124max_stack_size=67108864 125output=cout 126pid=100 127ppid=99 128simpoint=0 --- 15 unchanged lines hidden (view full) --- 144enable=false 145eventq_index=0 146sys_clk_domain=system.clk_domain 147transition_latency=100000000 148 149[system.membus] 150type=CoherentXBar 151clk_domain=system.clk_domain | 131gid=100 132input=cin 133kvmInSE=false 134max_stack_size=67108864 135output=cout 136pid=100 137ppid=99 138simpoint=0 --- 15 unchanged lines hidden (view full) --- 154enable=false 155eventq_index=0 156sys_clk_domain=system.clk_domain 157transition_latency=100000000 158 159[system.membus] 160type=CoherentXBar 161clk_domain=system.clk_domain |
| 162default_p_state=UNDEFINED |
|
| 152eventq_index=0 153forward_latency=4 154frontend_latency=3 | 163eventq_index=0 164forward_latency=4 165frontend_latency=3 |
| 166p_state_clk_gate_bins=20 167p_state_clk_gate_max=1000000000000 168p_state_clk_gate_min=1000 |
|
| 155point_of_coherency=true | 169point_of_coherency=true |
| 170power_model=Null |
|
| 156response_latency=2 157snoop_filter=Null 158snoop_response_latency=4 159system=system 160use_default_range=false 161width=16 162master=system.physmem.port 163slave=system.system_port system.cpu.icache_port system.cpu.dcache_port 164 165[system.physmem] 166type=SimpleMemory 167bandwidth=73.000000 168clk_domain=system.clk_domain 169conf_table_reported=true | 171response_latency=2 172snoop_filter=Null 173snoop_response_latency=4 174system=system 175use_default_range=false 176width=16 177master=system.physmem.port 178slave=system.system_port system.cpu.icache_port system.cpu.dcache_port 179 180[system.physmem] 181type=SimpleMemory 182bandwidth=73.000000 183clk_domain=system.clk_domain 184conf_table_reported=true |
| 185default_p_state=UNDEFINED |
|
| 170eventq_index=0 171in_addr_map=true 172latency=30000 173latency_var=0 174null=false | 186eventq_index=0 187in_addr_map=true 188latency=30000 189latency_var=0 190null=false |
| 191p_state_clk_gate_bins=20 192p_state_clk_gate_max=1000000000000 193p_state_clk_gate_min=1000 194power_model=Null |
|
| 175range=0:134217727 176port=system.membus.master[0] 177 178[system.voltage_domain] 179type=VoltageDomain 180eventq_index=0 181voltage=1.000000 182 | 195range=0:134217727 196port=system.membus.master[0] 197 198[system.voltage_domain] 199type=VoltageDomain 200eventq_index=0 201voltage=1.000000 202 |