16a17
> default_p_state=UNDEFINED
29a31,34
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
57a63
> default_p_state=UNDEFINED
74a81,84
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
92a103
> default_p_state=UNDEFINED
98a110,113
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
116a132
> default_p_state=UNDEFINED
118a135,138
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
140a161
> default_p_state=UNDEFINED
143a165,168
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
156a182
> default_p_state=UNDEFINED
159a186,189
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
169a200
> default_p_state=UNDEFINED
175a207,210
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
193a229
> default_p_state=UNDEFINED
195a232,235
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
252a293
> default_p_state=UNDEFINED
255a297,300
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
268a314
> default_p_state=UNDEFINED
271a318,321
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
281a332
> default_p_state=UNDEFINED
287a339,342
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
305a361
> default_p_state=UNDEFINED
307a364,367
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
314a375
> default_p_state=UNDEFINED
317a379,381
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
318a383
> power_model=Null
349c414
< executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex
---
> executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/arm/linux/vortex
380a446
> default_p_state=UNDEFINED
383a450,452
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
384a454
> power_model=Null
398a469
> default_p_state=UNDEFINED
403a475,478
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
> default_p_state=UNDEFINED
29a31,34
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
57a63
> default_p_state=UNDEFINED
74a81,84
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
92a103
> default_p_state=UNDEFINED
98a110,113
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
116a132
> default_p_state=UNDEFINED
118a135,138
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
140a161
> default_p_state=UNDEFINED
143a165,168
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
156a182
> default_p_state=UNDEFINED
159a186,189
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
169a200
> default_p_state=UNDEFINED
175a207,210
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
193a229
> default_p_state=UNDEFINED
195a232,235
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
252a293
> default_p_state=UNDEFINED
255a297,300
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
268a314
> default_p_state=UNDEFINED
271a318,321
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
281a332
> default_p_state=UNDEFINED
287a339,342
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
305a361
> default_p_state=UNDEFINED
307a364,367
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null
314a375
> default_p_state=UNDEFINED
317a379,381
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
318a383
> power_model=Null
349c414
< executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex
---
> executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/arm/linux/vortex
380a446
> default_p_state=UNDEFINED
383a450,452
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
384a454
> power_model=Null
398a469
> default_p_state=UNDEFINED
403a475,478
> p_state_clk_gate_bins=20
> p_state_clk_gate_max=1000000000000
> p_state_clk_gate_min=1000
> power_model=Null