7,11c7,11
< host_inst_rate 323904 # Simulator instruction rate (inst/s)
< host_op_rate 323899 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 128274037 # Simulator tick rate (ticks/s)
< host_mem_usage 231956 # Number of bytes of host memory used
< host_seconds 2.05 # Real time elapsed on the host
---
> host_inst_rate 1070900 # Simulator instruction rate (inst/s)
> host_op_rate 1070867 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 424091073 # Simulator tick rate (ticks/s)
> host_mem_usage 232420 # Number of bytes of host memory used
> host_seconds 0.62 # Real time elapsed on the host
14,22c14,59
< system.physmem.bytes_read 36608 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 22656 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 572 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 139566447 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 86375039 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 139566447 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu0.inst 18240 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 10560 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 3776 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 1408 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.inst 576 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.data 1024 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.inst 64 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.data 960 # Number of bytes read from this memory
> system.physmem.bytes_read::total 36608 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 18240 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 3776 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu2.inst 576 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu3.inst 64 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 22656 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu0.inst 285 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 165 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 59 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 22 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.inst 9 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.data 16 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.inst 1 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.data 15 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 572 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu0.inst 69539226 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 40259552 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 14395840 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 5367940 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.inst 2195976 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.data 3903957 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.inst 243997 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.data 3659959 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 139566447 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 69539226 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 14395840 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu2.inst 2195976 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu3.inst 243997 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 86375039 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 69539226 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 40259552 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 14395840 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 5367940 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.inst 2195976 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.data 3903957 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.inst 243997 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.data 3659959 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 139566447 # Total bandwidth to/from this memory (bytes/s)
79a117
> system.cpu0.icache.ReadReq_miss_rate::total 0.002948 # miss rate for ReadReq accesses
80a119
> system.cpu0.icache.demand_miss_rate::total 0.002948 # miss rate for demand accesses
81a121
> system.cpu0.icache.overall_miss_rate::total 0.002948 # miss rate for overall accesses
82a123
> system.cpu0.icache.ReadReq_avg_miss_latency::total 39665.952891 # average ReadReq miss latency
83a125
> system.cpu0.icache.demand_avg_miss_latency::total 39665.952891 # average overall miss latency
84a127
> system.cpu0.icache.overall_avg_miss_latency::total 39665.952891 # average overall miss latency
105a149
> system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.002948 # mshr miss rate for ReadReq accesses
106a151
> system.cpu0.icache.demand_mshr_miss_rate::total 0.002948 # mshr miss rate for demand accesses
107a153
> system.cpu0.icache.overall_mshr_miss_rate::total 0.002948 # mshr miss rate for overall accesses
108a155
> system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 36665.952891 # average ReadReq mshr miss latency
109a157
> system.cpu0.icache.demand_avg_mshr_miss_latency::total 36665.952891 # average overall mshr miss latency
110a159
> system.cpu0.icache.overall_avg_mshr_miss_latency::total 36665.952891 # average overall mshr miss latency
161a211
> system.cpu0.dcache.ReadReq_miss_rate::total 0.003312 # miss rate for ReadReq accesses
162a213
> system.cpu0.dcache.WriteReq_miss_rate::total 0.007342 # miss rate for WriteReq accesses
163a215
> system.cpu0.dcache.SwapReq_miss_rate::total 0.619048 # miss rate for SwapReq accesses
164a217
> system.cpu0.dcache.demand_miss_rate::total 0.004672 # miss rate for demand accesses
165a219
> system.cpu0.dcache.overall_miss_rate::total 0.004672 # miss rate for overall accesses
166a221
> system.cpu0.dcache.ReadReq_avg_miss_latency::total 29314.814815 # average ReadReq miss latency
167a223
> system.cpu0.dcache.WriteReq_avg_miss_latency::total 39207.650273 # average WriteReq miss latency
168a225
> system.cpu0.dcache.SwapReq_avg_miss_latency::total 14884.615385 # average SwapReq miss latency
169a227
> system.cpu0.dcache.demand_avg_miss_latency::total 34562.318841 # average overall miss latency
170a229
> system.cpu0.dcache.overall_avg_miss_latency::total 34562.318841 # average overall miss latency
201a261
> system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.003312 # mshr miss rate for ReadReq accesses
202a263
> system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.007342 # mshr miss rate for WriteReq accesses
203a265
> system.cpu0.dcache.SwapReq_mshr_miss_rate::total 0.619048 # mshr miss rate for SwapReq accesses
204a267
> system.cpu0.dcache.demand_mshr_miss_rate::total 0.004672 # mshr miss rate for demand accesses
205a269
> system.cpu0.dcache.overall_mshr_miss_rate::total 0.004672 # mshr miss rate for overall accesses
206a271
> system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 26314.814815 # average ReadReq mshr miss latency
207a273
> system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 36207.650273 # average WriteReq mshr miss latency
208a275
> system.cpu0.dcache.SwapReq_avg_mshr_miss_latency::total 11884.615385 # average SwapReq mshr miss latency
209a277
> system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31562.318841 # average overall mshr miss latency
210a279
> system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31562.318841 # average overall mshr miss latency
267a337
> system.cpu1.icache.ReadReq_miss_rate::total 0.002123 # miss rate for ReadReq accesses
268a339
> system.cpu1.icache.demand_miss_rate::total 0.002123 # miss rate for demand accesses
269a341
> system.cpu1.icache.overall_miss_rate::total 0.002123 # miss rate for overall accesses
270a343
> system.cpu1.icache.ReadReq_avg_miss_latency::total 21640.710383 # average ReadReq miss latency
271a345
> system.cpu1.icache.demand_avg_miss_latency::total 21640.710383 # average overall miss latency
272a347
> system.cpu1.icache.overall_avg_miss_latency::total 21640.710383 # average overall miss latency
293a369
> system.cpu1.icache.ReadReq_mshr_miss_rate::total 0.002123 # mshr miss rate for ReadReq accesses
294a371
> system.cpu1.icache.demand_mshr_miss_rate::total 0.002123 # mshr miss rate for demand accesses
295a373
> system.cpu1.icache.overall_mshr_miss_rate::total 0.002123 # mshr miss rate for overall accesses
296a375
> system.cpu1.icache.ReadReq_avg_mshr_miss_latency::total 18639.344262 # average ReadReq mshr miss latency
297a377
> system.cpu1.icache.demand_avg_mshr_miss_latency::total 18639.344262 # average overall mshr miss latency
298a379
> system.cpu1.icache.overall_avg_mshr_miss_latency::total 18639.344262 # average overall mshr miss latency
349a431
> system.cpu1.dcache.ReadReq_miss_rate::total 0.004570 # miss rate for ReadReq accesses
350a433
> system.cpu1.dcache.WriteReq_miss_rate::total 0.011956 # miss rate for WriteReq accesses
351a435
> system.cpu1.dcache.SwapReq_miss_rate::total 0.783133 # miss rate for SwapReq accesses
352a437
> system.cpu1.dcache.demand_miss_rate::total 0.005836 # miss rate for demand accesses
353a439
> system.cpu1.dcache.overall_miss_rate::total 0.005836 # miss rate for overall accesses
354a441
> system.cpu1.dcache.ReadReq_avg_miss_latency::total 20513.812155 # average ReadReq miss latency
355a443
> system.cpu1.dcache.WriteReq_avg_miss_latency::total 19275.510204 # average WriteReq miss latency
356a445
> system.cpu1.dcache.SwapReq_avg_miss_latency::total 6384.615385 # average SwapReq miss latency
357a447
> system.cpu1.dcache.demand_avg_miss_latency::total 20078.853047 # average overall miss latency
358a449
> system.cpu1.dcache.overall_avg_miss_latency::total 20078.853047 # average overall miss latency
389a481
> system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.004570 # mshr miss rate for ReadReq accesses
390a483
> system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.011956 # mshr miss rate for WriteReq accesses
391a485
> system.cpu1.dcache.SwapReq_mshr_miss_rate::total 0.783133 # mshr miss rate for SwapReq accesses
392a487
> system.cpu1.dcache.demand_mshr_miss_rate::total 0.005836 # mshr miss rate for demand accesses
393a489
> system.cpu1.dcache.overall_mshr_miss_rate::total 0.005836 # mshr miss rate for overall accesses
394a491
> system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 17513.812155 # average ReadReq mshr miss latency
395a493
> system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 16275.510204 # average WriteReq mshr miss latency
396a495
> system.cpu1.dcache.SwapReq_avg_mshr_miss_latency::total 3384.615385 # average SwapReq mshr miss latency
397a497
> system.cpu1.dcache.demand_avg_mshr_miss_latency::total 17078.853047 # average overall mshr miss latency
398a499
> system.cpu1.dcache.overall_avg_mshr_miss_latency::total 17078.853047 # average overall mshr miss latency
455a557
> system.cpu2.icache.ReadReq_miss_rate::total 0.002211 # miss rate for ReadReq accesses
456a559
> system.cpu2.icache.demand_miss_rate::total 0.002211 # miss rate for demand accesses
457a561
> system.cpu2.icache.overall_miss_rate::total 0.002211 # miss rate for overall accesses
458a563
> system.cpu2.icache.ReadReq_avg_miss_latency::total 15433.060109 # average ReadReq miss latency
459a565
> system.cpu2.icache.demand_avg_miss_latency::total 15433.060109 # average overall miss latency
460a567
> system.cpu2.icache.overall_avg_miss_latency::total 15433.060109 # average overall miss latency
481a589
> system.cpu2.icache.ReadReq_mshr_miss_rate::total 0.002211 # mshr miss rate for ReadReq accesses
482a591
> system.cpu2.icache.demand_mshr_miss_rate::total 0.002211 # mshr miss rate for demand accesses
483a593
> system.cpu2.icache.overall_mshr_miss_rate::total 0.002211 # mshr miss rate for overall accesses
484a595
> system.cpu2.icache.ReadReq_avg_mshr_miss_latency::total 12433.060109 # average ReadReq mshr miss latency
485a597
> system.cpu2.icache.demand_avg_mshr_miss_latency::total 12433.060109 # average overall mshr miss latency
486a599
> system.cpu2.icache.overall_avg_mshr_miss_latency::total 12433.060109 # average overall mshr miss latency
537a651
> system.cpu2.dcache.ReadReq_miss_rate::total 0.003728 # miss rate for ReadReq accesses
538a653
> system.cpu2.dcache.WriteReq_miss_rate::total 0.006802 # miss rate for WriteReq accesses
539a655
> system.cpu2.dcache.SwapReq_miss_rate::total 0.822581 # miss rate for SwapReq accesses
540a657
> system.cpu2.dcache.demand_miss_rate::total 0.004579 # miss rate for demand accesses
541a659
> system.cpu2.dcache.overall_miss_rate::total 0.004579 # miss rate for overall accesses
542a661
> system.cpu2.dcache.ReadReq_avg_miss_latency::total 16198.717949 # average ReadReq miss latency
543a663
> system.cpu2.dcache.WriteReq_avg_miss_latency::total 19119.266055 # average WriteReq miss latency
544a665
> system.cpu2.dcache.SwapReq_avg_miss_latency::total 5980.392157 # average SwapReq miss latency
545a667
> system.cpu2.dcache.demand_avg_miss_latency::total 17400 # average overall miss latency
546a669
> system.cpu2.dcache.overall_avg_miss_latency::total 17400 # average overall miss latency
577a701
> system.cpu2.dcache.ReadReq_mshr_miss_rate::total 0.003728 # mshr miss rate for ReadReq accesses
578a703
> system.cpu2.dcache.WriteReq_mshr_miss_rate::total 0.006802 # mshr miss rate for WriteReq accesses
579a705
> system.cpu2.dcache.SwapReq_mshr_miss_rate::total 0.822581 # mshr miss rate for SwapReq accesses
580a707
> system.cpu2.dcache.demand_mshr_miss_rate::total 0.004579 # mshr miss rate for demand accesses
581a709
> system.cpu2.dcache.overall_mshr_miss_rate::total 0.004579 # mshr miss rate for overall accesses
582a711
> system.cpu2.dcache.ReadReq_avg_mshr_miss_latency::total 13198.717949 # average ReadReq mshr miss latency
583a713
> system.cpu2.dcache.WriteReq_avg_mshr_miss_latency::total 16119.266055 # average WriteReq mshr miss latency
584a715
> system.cpu2.dcache.SwapReq_avg_mshr_miss_latency::total 2980.392157 # average SwapReq mshr miss latency
585a717
> system.cpu2.dcache.demand_avg_mshr_miss_latency::total 14400 # average overall mshr miss latency
586a719
> system.cpu2.dcache.overall_avg_mshr_miss_latency::total 14400 # average overall mshr miss latency
643a777
> system.cpu3.icache.ReadReq_miss_rate::total 0.002209 # miss rate for ReadReq accesses
644a779
> system.cpu3.icache.demand_miss_rate::total 0.002209 # miss rate for demand accesses
645a781
> system.cpu3.icache.overall_miss_rate::total 0.002209 # miss rate for overall accesses
646a783
> system.cpu3.icache.ReadReq_avg_miss_latency::total 15072.207084 # average ReadReq miss latency
647a785
> system.cpu3.icache.demand_avg_miss_latency::total 15072.207084 # average overall miss latency
648a787
> system.cpu3.icache.overall_avg_miss_latency::total 15072.207084 # average overall miss latency
669a809
> system.cpu3.icache.ReadReq_mshr_miss_rate::total 0.002209 # mshr miss rate for ReadReq accesses
670a811
> system.cpu3.icache.demand_mshr_miss_rate::total 0.002209 # mshr miss rate for demand accesses
671a813
> system.cpu3.icache.overall_mshr_miss_rate::total 0.002209 # mshr miss rate for overall accesses
672a815
> system.cpu3.icache.ReadReq_avg_mshr_miss_latency::total 12072.207084 # average ReadReq mshr miss latency
673a817
> system.cpu3.icache.demand_avg_mshr_miss_latency::total 12072.207084 # average overall mshr miss latency
674a819
> system.cpu3.icache.overall_avg_mshr_miss_latency::total 12072.207084 # average overall mshr miss latency
725a871
> system.cpu3.dcache.ReadReq_miss_rate::total 0.003764 # miss rate for ReadReq accesses
726a873
> system.cpu3.dcache.WriteReq_miss_rate::total 0.006988 # miss rate for WriteReq accesses
727a875
> system.cpu3.dcache.SwapReq_miss_rate::total 0.830769 # miss rate for SwapReq accesses
728a877
> system.cpu3.dcache.demand_miss_rate::total 0.004635 # miss rate for demand accesses
729a879
> system.cpu3.dcache.overall_miss_rate::total 0.004635 # miss rate for overall accesses
730a881
> system.cpu3.dcache.ReadReq_avg_miss_latency::total 16363.057325 # average ReadReq miss latency
731a883
> system.cpu3.dcache.WriteReq_avg_miss_latency::total 19259.259259 # average WriteReq miss latency
732a885
> system.cpu3.dcache.SwapReq_avg_miss_latency::total 6037.037037 # average SwapReq miss latency
733a887
> system.cpu3.dcache.demand_avg_miss_latency::total 17543.396226 # average overall miss latency
734a889
> system.cpu3.dcache.overall_avg_miss_latency::total 17543.396226 # average overall miss latency
765a921
> system.cpu3.dcache.ReadReq_mshr_miss_rate::total 0.003764 # mshr miss rate for ReadReq accesses
766a923
> system.cpu3.dcache.WriteReq_mshr_miss_rate::total 0.006988 # mshr miss rate for WriteReq accesses
767a925
> system.cpu3.dcache.SwapReq_mshr_miss_rate::total 0.830769 # mshr miss rate for SwapReq accesses
768a927
> system.cpu3.dcache.demand_mshr_miss_rate::total 0.004635 # mshr miss rate for demand accesses
769a929
> system.cpu3.dcache.overall_mshr_miss_rate::total 0.004635 # mshr miss rate for overall accesses
770a931
> system.cpu3.dcache.ReadReq_avg_mshr_miss_latency::total 13363.057325 # average ReadReq mshr miss latency
771a933
> system.cpu3.dcache.WriteReq_avg_mshr_miss_latency::total 16259.259259 # average WriteReq mshr miss latency
772a935
> system.cpu3.dcache.SwapReq_avg_mshr_miss_latency::total 3037.037037 # average SwapReq mshr miss latency
773a937
> system.cpu3.dcache.demand_avg_mshr_miss_latency::total 14543.396226 # average overall mshr miss latency
774a939
> system.cpu3.dcache.overall_avg_mshr_miss_latency::total 14543.396226 # average overall mshr miss latency
951a1117
> system.l2c.ReadReq_miss_rate::total 0.268496 # miss rate for ReadReq accesses
955a1122
> system.l2c.UpgradeReq_miss_rate::total 0.972973 # miss rate for UpgradeReq accesses
959a1127
> system.l2c.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
967a1136
> system.l2c.demand_miss_rate::total 0.325633 # miss rate for demand accesses
975a1145
> system.l2c.overall_miss_rate::total 0.325633 # miss rate for overall accesses
983a1154
> system.l2c.ReadReq_avg_miss_latency::total 51844.444444 # average ReadReq miss latency
986a1158
> system.l2c.UpgradeReq_avg_miss_latency::total 2166.666667 # average UpgradeReq miss latency
990a1163
> system.l2c.ReadExReq_avg_miss_latency::total 52007.042254 # average ReadExReq miss latency
998a1172
> system.l2c.demand_avg_miss_latency::total 51883.445946 # average overall miss latency
1006a1181
> system.l2c.overall_avg_miss_latency::total 51883.445946 # average overall miss latency
1114a1290
> system.l2c.ReadReq_mshr_miss_rate::total 0.256563 # mshr miss rate for ReadReq accesses
1118a1295
> system.l2c.UpgradeReq_mshr_miss_rate::total 0.972973 # mshr miss rate for UpgradeReq accesses
1122a1300
> system.l2c.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
1130a1309
> system.l2c.demand_mshr_miss_rate::total 0.314631 # mshr miss rate for demand accesses
1138a1318
> system.l2c.overall_mshr_miss_rate::total 0.314631 # mshr miss rate for overall accesses
1146a1327
> system.l2c.ReadReq_avg_mshr_miss_latency::total 40006.976744 # average ReadReq mshr miss latency
1150a1332
> system.l2c.UpgradeReq_avg_mshr_miss_latency::total 40000 # average UpgradeReq mshr miss latency
1154a1337
> system.l2c.ReadExReq_avg_mshr_miss_latency::total 40007.042254 # average ReadExReq mshr miss latency
1162a1346
> system.l2c.demand_avg_mshr_miss_latency::total 40006.993007 # average overall mshr miss latency
1170a1355
> system.l2c.overall_avg_mshr_miss_latency::total 40006.993007 # average overall mshr miss latency
< host_inst_rate 323904 # Simulator instruction rate (inst/s)
< host_op_rate 323899 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 128274037 # Simulator tick rate (ticks/s)
< host_mem_usage 231956 # Number of bytes of host memory used
< host_seconds 2.05 # Real time elapsed on the host
---
> host_inst_rate 1070900 # Simulator instruction rate (inst/s)
> host_op_rate 1070867 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 424091073 # Simulator tick rate (ticks/s)
> host_mem_usage 232420 # Number of bytes of host memory used
> host_seconds 0.62 # Real time elapsed on the host
14,22c14,59
< system.physmem.bytes_read 36608 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 22656 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 572 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 139566447 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 86375039 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 139566447 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu0.inst 18240 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 10560 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 3776 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 1408 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.inst 576 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.data 1024 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.inst 64 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.data 960 # Number of bytes read from this memory
> system.physmem.bytes_read::total 36608 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 18240 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 3776 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu2.inst 576 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu3.inst 64 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 22656 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu0.inst 285 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 165 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 59 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 22 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.inst 9 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.data 16 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.inst 1 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.data 15 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 572 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu0.inst 69539226 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 40259552 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 14395840 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 5367940 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.inst 2195976 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.data 3903957 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.inst 243997 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.data 3659959 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 139566447 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 69539226 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 14395840 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu2.inst 2195976 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu3.inst 243997 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 86375039 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 69539226 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 40259552 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 14395840 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 5367940 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.inst 2195976 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.data 3903957 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.inst 243997 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.data 3659959 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 139566447 # Total bandwidth to/from this memory (bytes/s)
79a117
> system.cpu0.icache.ReadReq_miss_rate::total 0.002948 # miss rate for ReadReq accesses
80a119
> system.cpu0.icache.demand_miss_rate::total 0.002948 # miss rate for demand accesses
81a121
> system.cpu0.icache.overall_miss_rate::total 0.002948 # miss rate for overall accesses
82a123
> system.cpu0.icache.ReadReq_avg_miss_latency::total 39665.952891 # average ReadReq miss latency
83a125
> system.cpu0.icache.demand_avg_miss_latency::total 39665.952891 # average overall miss latency
84a127
> system.cpu0.icache.overall_avg_miss_latency::total 39665.952891 # average overall miss latency
105a149
> system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.002948 # mshr miss rate for ReadReq accesses
106a151
> system.cpu0.icache.demand_mshr_miss_rate::total 0.002948 # mshr miss rate for demand accesses
107a153
> system.cpu0.icache.overall_mshr_miss_rate::total 0.002948 # mshr miss rate for overall accesses
108a155
> system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 36665.952891 # average ReadReq mshr miss latency
109a157
> system.cpu0.icache.demand_avg_mshr_miss_latency::total 36665.952891 # average overall mshr miss latency
110a159
> system.cpu0.icache.overall_avg_mshr_miss_latency::total 36665.952891 # average overall mshr miss latency
161a211
> system.cpu0.dcache.ReadReq_miss_rate::total 0.003312 # miss rate for ReadReq accesses
162a213
> system.cpu0.dcache.WriteReq_miss_rate::total 0.007342 # miss rate for WriteReq accesses
163a215
> system.cpu0.dcache.SwapReq_miss_rate::total 0.619048 # miss rate for SwapReq accesses
164a217
> system.cpu0.dcache.demand_miss_rate::total 0.004672 # miss rate for demand accesses
165a219
> system.cpu0.dcache.overall_miss_rate::total 0.004672 # miss rate for overall accesses
166a221
> system.cpu0.dcache.ReadReq_avg_miss_latency::total 29314.814815 # average ReadReq miss latency
167a223
> system.cpu0.dcache.WriteReq_avg_miss_latency::total 39207.650273 # average WriteReq miss latency
168a225
> system.cpu0.dcache.SwapReq_avg_miss_latency::total 14884.615385 # average SwapReq miss latency
169a227
> system.cpu0.dcache.demand_avg_miss_latency::total 34562.318841 # average overall miss latency
170a229
> system.cpu0.dcache.overall_avg_miss_latency::total 34562.318841 # average overall miss latency
201a261
> system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.003312 # mshr miss rate for ReadReq accesses
202a263
> system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.007342 # mshr miss rate for WriteReq accesses
203a265
> system.cpu0.dcache.SwapReq_mshr_miss_rate::total 0.619048 # mshr miss rate for SwapReq accesses
204a267
> system.cpu0.dcache.demand_mshr_miss_rate::total 0.004672 # mshr miss rate for demand accesses
205a269
> system.cpu0.dcache.overall_mshr_miss_rate::total 0.004672 # mshr miss rate for overall accesses
206a271
> system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 26314.814815 # average ReadReq mshr miss latency
207a273
> system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 36207.650273 # average WriteReq mshr miss latency
208a275
> system.cpu0.dcache.SwapReq_avg_mshr_miss_latency::total 11884.615385 # average SwapReq mshr miss latency
209a277
> system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31562.318841 # average overall mshr miss latency
210a279
> system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31562.318841 # average overall mshr miss latency
267a337
> system.cpu1.icache.ReadReq_miss_rate::total 0.002123 # miss rate for ReadReq accesses
268a339
> system.cpu1.icache.demand_miss_rate::total 0.002123 # miss rate for demand accesses
269a341
> system.cpu1.icache.overall_miss_rate::total 0.002123 # miss rate for overall accesses
270a343
> system.cpu1.icache.ReadReq_avg_miss_latency::total 21640.710383 # average ReadReq miss latency
271a345
> system.cpu1.icache.demand_avg_miss_latency::total 21640.710383 # average overall miss latency
272a347
> system.cpu1.icache.overall_avg_miss_latency::total 21640.710383 # average overall miss latency
293a369
> system.cpu1.icache.ReadReq_mshr_miss_rate::total 0.002123 # mshr miss rate for ReadReq accesses
294a371
> system.cpu1.icache.demand_mshr_miss_rate::total 0.002123 # mshr miss rate for demand accesses
295a373
> system.cpu1.icache.overall_mshr_miss_rate::total 0.002123 # mshr miss rate for overall accesses
296a375
> system.cpu1.icache.ReadReq_avg_mshr_miss_latency::total 18639.344262 # average ReadReq mshr miss latency
297a377
> system.cpu1.icache.demand_avg_mshr_miss_latency::total 18639.344262 # average overall mshr miss latency
298a379
> system.cpu1.icache.overall_avg_mshr_miss_latency::total 18639.344262 # average overall mshr miss latency
349a431
> system.cpu1.dcache.ReadReq_miss_rate::total 0.004570 # miss rate for ReadReq accesses
350a433
> system.cpu1.dcache.WriteReq_miss_rate::total 0.011956 # miss rate for WriteReq accesses
351a435
> system.cpu1.dcache.SwapReq_miss_rate::total 0.783133 # miss rate for SwapReq accesses
352a437
> system.cpu1.dcache.demand_miss_rate::total 0.005836 # miss rate for demand accesses
353a439
> system.cpu1.dcache.overall_miss_rate::total 0.005836 # miss rate for overall accesses
354a441
> system.cpu1.dcache.ReadReq_avg_miss_latency::total 20513.812155 # average ReadReq miss latency
355a443
> system.cpu1.dcache.WriteReq_avg_miss_latency::total 19275.510204 # average WriteReq miss latency
356a445
> system.cpu1.dcache.SwapReq_avg_miss_latency::total 6384.615385 # average SwapReq miss latency
357a447
> system.cpu1.dcache.demand_avg_miss_latency::total 20078.853047 # average overall miss latency
358a449
> system.cpu1.dcache.overall_avg_miss_latency::total 20078.853047 # average overall miss latency
389a481
> system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.004570 # mshr miss rate for ReadReq accesses
390a483
> system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.011956 # mshr miss rate for WriteReq accesses
391a485
> system.cpu1.dcache.SwapReq_mshr_miss_rate::total 0.783133 # mshr miss rate for SwapReq accesses
392a487
> system.cpu1.dcache.demand_mshr_miss_rate::total 0.005836 # mshr miss rate for demand accesses
393a489
> system.cpu1.dcache.overall_mshr_miss_rate::total 0.005836 # mshr miss rate for overall accesses
394a491
> system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 17513.812155 # average ReadReq mshr miss latency
395a493
> system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 16275.510204 # average WriteReq mshr miss latency
396a495
> system.cpu1.dcache.SwapReq_avg_mshr_miss_latency::total 3384.615385 # average SwapReq mshr miss latency
397a497
> system.cpu1.dcache.demand_avg_mshr_miss_latency::total 17078.853047 # average overall mshr miss latency
398a499
> system.cpu1.dcache.overall_avg_mshr_miss_latency::total 17078.853047 # average overall mshr miss latency
455a557
> system.cpu2.icache.ReadReq_miss_rate::total 0.002211 # miss rate for ReadReq accesses
456a559
> system.cpu2.icache.demand_miss_rate::total 0.002211 # miss rate for demand accesses
457a561
> system.cpu2.icache.overall_miss_rate::total 0.002211 # miss rate for overall accesses
458a563
> system.cpu2.icache.ReadReq_avg_miss_latency::total 15433.060109 # average ReadReq miss latency
459a565
> system.cpu2.icache.demand_avg_miss_latency::total 15433.060109 # average overall miss latency
460a567
> system.cpu2.icache.overall_avg_miss_latency::total 15433.060109 # average overall miss latency
481a589
> system.cpu2.icache.ReadReq_mshr_miss_rate::total 0.002211 # mshr miss rate for ReadReq accesses
482a591
> system.cpu2.icache.demand_mshr_miss_rate::total 0.002211 # mshr miss rate for demand accesses
483a593
> system.cpu2.icache.overall_mshr_miss_rate::total 0.002211 # mshr miss rate for overall accesses
484a595
> system.cpu2.icache.ReadReq_avg_mshr_miss_latency::total 12433.060109 # average ReadReq mshr miss latency
485a597
> system.cpu2.icache.demand_avg_mshr_miss_latency::total 12433.060109 # average overall mshr miss latency
486a599
> system.cpu2.icache.overall_avg_mshr_miss_latency::total 12433.060109 # average overall mshr miss latency
537a651
> system.cpu2.dcache.ReadReq_miss_rate::total 0.003728 # miss rate for ReadReq accesses
538a653
> system.cpu2.dcache.WriteReq_miss_rate::total 0.006802 # miss rate for WriteReq accesses
539a655
> system.cpu2.dcache.SwapReq_miss_rate::total 0.822581 # miss rate for SwapReq accesses
540a657
> system.cpu2.dcache.demand_miss_rate::total 0.004579 # miss rate for demand accesses
541a659
> system.cpu2.dcache.overall_miss_rate::total 0.004579 # miss rate for overall accesses
542a661
> system.cpu2.dcache.ReadReq_avg_miss_latency::total 16198.717949 # average ReadReq miss latency
543a663
> system.cpu2.dcache.WriteReq_avg_miss_latency::total 19119.266055 # average WriteReq miss latency
544a665
> system.cpu2.dcache.SwapReq_avg_miss_latency::total 5980.392157 # average SwapReq miss latency
545a667
> system.cpu2.dcache.demand_avg_miss_latency::total 17400 # average overall miss latency
546a669
> system.cpu2.dcache.overall_avg_miss_latency::total 17400 # average overall miss latency
577a701
> system.cpu2.dcache.ReadReq_mshr_miss_rate::total 0.003728 # mshr miss rate for ReadReq accesses
578a703
> system.cpu2.dcache.WriteReq_mshr_miss_rate::total 0.006802 # mshr miss rate for WriteReq accesses
579a705
> system.cpu2.dcache.SwapReq_mshr_miss_rate::total 0.822581 # mshr miss rate for SwapReq accesses
580a707
> system.cpu2.dcache.demand_mshr_miss_rate::total 0.004579 # mshr miss rate for demand accesses
581a709
> system.cpu2.dcache.overall_mshr_miss_rate::total 0.004579 # mshr miss rate for overall accesses
582a711
> system.cpu2.dcache.ReadReq_avg_mshr_miss_latency::total 13198.717949 # average ReadReq mshr miss latency
583a713
> system.cpu2.dcache.WriteReq_avg_mshr_miss_latency::total 16119.266055 # average WriteReq mshr miss latency
584a715
> system.cpu2.dcache.SwapReq_avg_mshr_miss_latency::total 2980.392157 # average SwapReq mshr miss latency
585a717
> system.cpu2.dcache.demand_avg_mshr_miss_latency::total 14400 # average overall mshr miss latency
586a719
> system.cpu2.dcache.overall_avg_mshr_miss_latency::total 14400 # average overall mshr miss latency
643a777
> system.cpu3.icache.ReadReq_miss_rate::total 0.002209 # miss rate for ReadReq accesses
644a779
> system.cpu3.icache.demand_miss_rate::total 0.002209 # miss rate for demand accesses
645a781
> system.cpu3.icache.overall_miss_rate::total 0.002209 # miss rate for overall accesses
646a783
> system.cpu3.icache.ReadReq_avg_miss_latency::total 15072.207084 # average ReadReq miss latency
647a785
> system.cpu3.icache.demand_avg_miss_latency::total 15072.207084 # average overall miss latency
648a787
> system.cpu3.icache.overall_avg_miss_latency::total 15072.207084 # average overall miss latency
669a809
> system.cpu3.icache.ReadReq_mshr_miss_rate::total 0.002209 # mshr miss rate for ReadReq accesses
670a811
> system.cpu3.icache.demand_mshr_miss_rate::total 0.002209 # mshr miss rate for demand accesses
671a813
> system.cpu3.icache.overall_mshr_miss_rate::total 0.002209 # mshr miss rate for overall accesses
672a815
> system.cpu3.icache.ReadReq_avg_mshr_miss_latency::total 12072.207084 # average ReadReq mshr miss latency
673a817
> system.cpu3.icache.demand_avg_mshr_miss_latency::total 12072.207084 # average overall mshr miss latency
674a819
> system.cpu3.icache.overall_avg_mshr_miss_latency::total 12072.207084 # average overall mshr miss latency
725a871
> system.cpu3.dcache.ReadReq_miss_rate::total 0.003764 # miss rate for ReadReq accesses
726a873
> system.cpu3.dcache.WriteReq_miss_rate::total 0.006988 # miss rate for WriteReq accesses
727a875
> system.cpu3.dcache.SwapReq_miss_rate::total 0.830769 # miss rate for SwapReq accesses
728a877
> system.cpu3.dcache.demand_miss_rate::total 0.004635 # miss rate for demand accesses
729a879
> system.cpu3.dcache.overall_miss_rate::total 0.004635 # miss rate for overall accesses
730a881
> system.cpu3.dcache.ReadReq_avg_miss_latency::total 16363.057325 # average ReadReq miss latency
731a883
> system.cpu3.dcache.WriteReq_avg_miss_latency::total 19259.259259 # average WriteReq miss latency
732a885
> system.cpu3.dcache.SwapReq_avg_miss_latency::total 6037.037037 # average SwapReq miss latency
733a887
> system.cpu3.dcache.demand_avg_miss_latency::total 17543.396226 # average overall miss latency
734a889
> system.cpu3.dcache.overall_avg_miss_latency::total 17543.396226 # average overall miss latency
765a921
> system.cpu3.dcache.ReadReq_mshr_miss_rate::total 0.003764 # mshr miss rate for ReadReq accesses
766a923
> system.cpu3.dcache.WriteReq_mshr_miss_rate::total 0.006988 # mshr miss rate for WriteReq accesses
767a925
> system.cpu3.dcache.SwapReq_mshr_miss_rate::total 0.830769 # mshr miss rate for SwapReq accesses
768a927
> system.cpu3.dcache.demand_mshr_miss_rate::total 0.004635 # mshr miss rate for demand accesses
769a929
> system.cpu3.dcache.overall_mshr_miss_rate::total 0.004635 # mshr miss rate for overall accesses
770a931
> system.cpu3.dcache.ReadReq_avg_mshr_miss_latency::total 13363.057325 # average ReadReq mshr miss latency
771a933
> system.cpu3.dcache.WriteReq_avg_mshr_miss_latency::total 16259.259259 # average WriteReq mshr miss latency
772a935
> system.cpu3.dcache.SwapReq_avg_mshr_miss_latency::total 3037.037037 # average SwapReq mshr miss latency
773a937
> system.cpu3.dcache.demand_avg_mshr_miss_latency::total 14543.396226 # average overall mshr miss latency
774a939
> system.cpu3.dcache.overall_avg_mshr_miss_latency::total 14543.396226 # average overall mshr miss latency
951a1117
> system.l2c.ReadReq_miss_rate::total 0.268496 # miss rate for ReadReq accesses
955a1122
> system.l2c.UpgradeReq_miss_rate::total 0.972973 # miss rate for UpgradeReq accesses
959a1127
> system.l2c.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
967a1136
> system.l2c.demand_miss_rate::total 0.325633 # miss rate for demand accesses
975a1145
> system.l2c.overall_miss_rate::total 0.325633 # miss rate for overall accesses
983a1154
> system.l2c.ReadReq_avg_miss_latency::total 51844.444444 # average ReadReq miss latency
986a1158
> system.l2c.UpgradeReq_avg_miss_latency::total 2166.666667 # average UpgradeReq miss latency
990a1163
> system.l2c.ReadExReq_avg_miss_latency::total 52007.042254 # average ReadExReq miss latency
998a1172
> system.l2c.demand_avg_miss_latency::total 51883.445946 # average overall miss latency
1006a1181
> system.l2c.overall_avg_miss_latency::total 51883.445946 # average overall miss latency
1114a1290
> system.l2c.ReadReq_mshr_miss_rate::total 0.256563 # mshr miss rate for ReadReq accesses
1118a1295
> system.l2c.UpgradeReq_mshr_miss_rate::total 0.972973 # mshr miss rate for UpgradeReq accesses
1122a1300
> system.l2c.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
1130a1309
> system.l2c.demand_mshr_miss_rate::total 0.314631 # mshr miss rate for demand accesses
1138a1318
> system.l2c.overall_mshr_miss_rate::total 0.314631 # mshr miss rate for overall accesses
1146a1327
> system.l2c.ReadReq_avg_mshr_miss_latency::total 40006.976744 # average ReadReq mshr miss latency
1150a1332
> system.l2c.UpgradeReq_avg_mshr_miss_latency::total 40000 # average UpgradeReq mshr miss latency
1154a1337
> system.l2c.ReadExReq_avg_mshr_miss_latency::total 40007.042254 # average ReadExReq mshr miss latency
1162a1346
> system.l2c.demand_avg_mshr_miss_latency::total 40006.993007 # average overall mshr miss latency
1170a1355
> system.l2c.overall_avg_mshr_miss_latency::total 40006.993007 # average overall mshr miss latency