config.ini (9276:a5ede748a1d9) config.ini (9348:44d31345e360)
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
11children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus
12boot_osflags=a
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
11children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus
12boot_osflags=a
13clock=1
13clock=1000
14init_param=0
15kernel=
16load_addr_mask=1099511627775
17mem_mode=timing
18memories=system.physmem
19num_work_ids=16
20readfile=
21symbolfile=

--- 34 unchanged lines hidden (view full) ---

56dcache_port=system.cpu0.dcache.cpu_side
57icache_port=system.cpu0.icache.cpu_side
58
59[system.cpu0.dcache]
60type=BaseCache
61addr_ranges=0:18446744073709551615
62assoc=4
63block_size=64
14init_param=0
15kernel=
16load_addr_mask=1099511627775
17mem_mode=timing
18memories=system.physmem
19num_work_ids=16
20readfile=
21symbolfile=

--- 34 unchanged lines hidden (view full) ---

56dcache_port=system.cpu0.dcache.cpu_side
57icache_port=system.cpu0.icache.cpu_side
58
59[system.cpu0.dcache]
60type=BaseCache
61addr_ranges=0:18446744073709551615
62assoc=4
63block_size=64
64clock=1
64clock=500
65forward_snoops=true
66hash_delay=1
65forward_snoops=true
66hash_delay=1
67hit_latency=1000
67hit_latency=2
68is_top_level=true
69max_miss_count=0
70mshrs=4
71prefetch_on_access=false
72prefetcher=Null
73prioritizeRequests=false
74repl=Null
68is_top_level=true
69max_miss_count=0
70mshrs=4
71prefetch_on_access=false
72prefetcher=Null
73prioritizeRequests=false
74repl=Null
75response_latency=1000
75response_latency=2
76size=32768
77subblock_size=0
78system=system
76size=32768
77subblock_size=0
78system=system
79tgts_per_mshr=8
79tgts_per_mshr=20
80trace_addr=0
81two_queue=false
82write_buffers=8
83cpu_side=system.cpu0.dcache_port
84mem_side=system.toL2Bus.slave[1]
85
86[system.cpu0.dtb]
87type=SparcTLB
88size=64
89
90[system.cpu0.icache]
91type=BaseCache
92addr_ranges=0:18446744073709551615
93assoc=1
94block_size=64
80trace_addr=0
81two_queue=false
82write_buffers=8
83cpu_side=system.cpu0.dcache_port
84mem_side=system.toL2Bus.slave[1]
85
86[system.cpu0.dtb]
87type=SparcTLB
88size=64
89
90[system.cpu0.icache]
91type=BaseCache
92addr_ranges=0:18446744073709551615
93assoc=1
94block_size=64
95clock=1
95clock=500
96forward_snoops=true
97hash_delay=1
96forward_snoops=true
97hash_delay=1
98hit_latency=1000
98hit_latency=2
99is_top_level=true
100max_miss_count=0
101mshrs=4
102prefetch_on_access=false
103prefetcher=Null
104prioritizeRequests=false
105repl=Null
99is_top_level=true
100max_miss_count=0
101mshrs=4
102prefetch_on_access=false
103prefetcher=Null
104prioritizeRequests=false
105repl=Null
106response_latency=1000
106response_latency=2
107size=32768
108subblock_size=0
109system=system
107size=32768
108subblock_size=0
109system=system
110tgts_per_mshr=8
110tgts_per_mshr=20
111trace_addr=0
112two_queue=false
113write_buffers=8
114cpu_side=system.cpu0.icache_port
115mem_side=system.toL2Bus.slave[0]
116
117[system.cpu0.interrupts]
118type=SparcInterrupts

--- 8 unchanged lines hidden (view full) ---

127[system.cpu0.workload]
128type=LiveProcess
129cmd=test_atomic 4
130cwd=
131egid=100
132env=
133errout=cerr
134euid=100
111trace_addr=0
112two_queue=false
113write_buffers=8
114cpu_side=system.cpu0.icache_port
115mem_side=system.toL2Bus.slave[0]
116
117[system.cpu0.interrupts]
118type=SparcInterrupts

--- 8 unchanged lines hidden (view full) ---

127[system.cpu0.workload]
128type=LiveProcess
129cmd=test_atomic 4
130cwd=
131egid=100
132env=
133errout=cerr
134euid=100
135executable=tests/test-progs/m5threads/bin/sparc/linux/test_atomic
135executable=/projects/pd/randd/dist/test-progs/m5threads/bin/sparc/linux/test_atomic
136gid=100
137input=cin
138max_stack_size=67108864
139output=cout
140pid=100
141ppid=99
142simpoint=0
143system=system

--- 27 unchanged lines hidden (view full) ---

171dcache_port=system.cpu1.dcache.cpu_side
172icache_port=system.cpu1.icache.cpu_side
173
174[system.cpu1.dcache]
175type=BaseCache
176addr_ranges=0:18446744073709551615
177assoc=4
178block_size=64
136gid=100
137input=cin
138max_stack_size=67108864
139output=cout
140pid=100
141ppid=99
142simpoint=0
143system=system

--- 27 unchanged lines hidden (view full) ---

171dcache_port=system.cpu1.dcache.cpu_side
172icache_port=system.cpu1.icache.cpu_side
173
174[system.cpu1.dcache]
175type=BaseCache
176addr_ranges=0:18446744073709551615
177assoc=4
178block_size=64
179clock=1
179clock=500
180forward_snoops=true
181hash_delay=1
180forward_snoops=true
181hash_delay=1
182hit_latency=1000
182hit_latency=2
183is_top_level=true
184max_miss_count=0
185mshrs=4
186prefetch_on_access=false
187prefetcher=Null
188prioritizeRequests=false
189repl=Null
183is_top_level=true
184max_miss_count=0
185mshrs=4
186prefetch_on_access=false
187prefetcher=Null
188prioritizeRequests=false
189repl=Null
190response_latency=1000
190response_latency=2
191size=32768
192subblock_size=0
193system=system
191size=32768
192subblock_size=0
193system=system
194tgts_per_mshr=8
194tgts_per_mshr=20
195trace_addr=0
196two_queue=false
197write_buffers=8
198cpu_side=system.cpu1.dcache_port
199mem_side=system.toL2Bus.slave[3]
200
201[system.cpu1.dtb]
202type=SparcTLB
203size=64
204
205[system.cpu1.icache]
206type=BaseCache
207addr_ranges=0:18446744073709551615
208assoc=1
209block_size=64
195trace_addr=0
196two_queue=false
197write_buffers=8
198cpu_side=system.cpu1.dcache_port
199mem_side=system.toL2Bus.slave[3]
200
201[system.cpu1.dtb]
202type=SparcTLB
203size=64
204
205[system.cpu1.icache]
206type=BaseCache
207addr_ranges=0:18446744073709551615
208assoc=1
209block_size=64
210clock=1
210clock=500
211forward_snoops=true
212hash_delay=1
211forward_snoops=true
212hash_delay=1
213hit_latency=1000
213hit_latency=2
214is_top_level=true
215max_miss_count=0
216mshrs=4
217prefetch_on_access=false
218prefetcher=Null
219prioritizeRequests=false
220repl=Null
214is_top_level=true
215max_miss_count=0
216mshrs=4
217prefetch_on_access=false
218prefetcher=Null
219prioritizeRequests=false
220repl=Null
221response_latency=1000
221response_latency=2
222size=32768
223subblock_size=0
224system=system
222size=32768
223subblock_size=0
224system=system
225tgts_per_mshr=8
225tgts_per_mshr=20
226trace_addr=0
227two_queue=false
228write_buffers=8
229cpu_side=system.cpu1.icache_port
230mem_side=system.toL2Bus.slave[2]
231
232[system.cpu1.interrupts]
233type=SparcInterrupts

--- 33 unchanged lines hidden (view full) ---

267dcache_port=system.cpu2.dcache.cpu_side
268icache_port=system.cpu2.icache.cpu_side
269
270[system.cpu2.dcache]
271type=BaseCache
272addr_ranges=0:18446744073709551615
273assoc=4
274block_size=64
226trace_addr=0
227two_queue=false
228write_buffers=8
229cpu_side=system.cpu1.icache_port
230mem_side=system.toL2Bus.slave[2]
231
232[system.cpu1.interrupts]
233type=SparcInterrupts

--- 33 unchanged lines hidden (view full) ---

267dcache_port=system.cpu2.dcache.cpu_side
268icache_port=system.cpu2.icache.cpu_side
269
270[system.cpu2.dcache]
271type=BaseCache
272addr_ranges=0:18446744073709551615
273assoc=4
274block_size=64
275clock=1
275clock=500
276forward_snoops=true
277hash_delay=1
276forward_snoops=true
277hash_delay=1
278hit_latency=1000
278hit_latency=2
279is_top_level=true
280max_miss_count=0
281mshrs=4
282prefetch_on_access=false
283prefetcher=Null
284prioritizeRequests=false
285repl=Null
279is_top_level=true
280max_miss_count=0
281mshrs=4
282prefetch_on_access=false
283prefetcher=Null
284prioritizeRequests=false
285repl=Null
286response_latency=1000
286response_latency=2
287size=32768
288subblock_size=0
289system=system
287size=32768
288subblock_size=0
289system=system
290tgts_per_mshr=8
290tgts_per_mshr=20
291trace_addr=0
292two_queue=false
293write_buffers=8
294cpu_side=system.cpu2.dcache_port
295mem_side=system.toL2Bus.slave[5]
296
297[system.cpu2.dtb]
298type=SparcTLB
299size=64
300
301[system.cpu2.icache]
302type=BaseCache
303addr_ranges=0:18446744073709551615
304assoc=1
305block_size=64
291trace_addr=0
292two_queue=false
293write_buffers=8
294cpu_side=system.cpu2.dcache_port
295mem_side=system.toL2Bus.slave[5]
296
297[system.cpu2.dtb]
298type=SparcTLB
299size=64
300
301[system.cpu2.icache]
302type=BaseCache
303addr_ranges=0:18446744073709551615
304assoc=1
305block_size=64
306clock=1
306clock=500
307forward_snoops=true
308hash_delay=1
307forward_snoops=true
308hash_delay=1
309hit_latency=1000
309hit_latency=2
310is_top_level=true
311max_miss_count=0
312mshrs=4
313prefetch_on_access=false
314prefetcher=Null
315prioritizeRequests=false
316repl=Null
310is_top_level=true
311max_miss_count=0
312mshrs=4
313prefetch_on_access=false
314prefetcher=Null
315prioritizeRequests=false
316repl=Null
317response_latency=1000
317response_latency=2
318size=32768
319subblock_size=0
320system=system
318size=32768
319subblock_size=0
320system=system
321tgts_per_mshr=8
321tgts_per_mshr=20
322trace_addr=0
323two_queue=false
324write_buffers=8
325cpu_side=system.cpu2.icache_port
326mem_side=system.toL2Bus.slave[4]
327
328[system.cpu2.interrupts]
329type=SparcInterrupts

--- 33 unchanged lines hidden (view full) ---

363dcache_port=system.cpu3.dcache.cpu_side
364icache_port=system.cpu3.icache.cpu_side
365
366[system.cpu3.dcache]
367type=BaseCache
368addr_ranges=0:18446744073709551615
369assoc=4
370block_size=64
322trace_addr=0
323two_queue=false
324write_buffers=8
325cpu_side=system.cpu2.icache_port
326mem_side=system.toL2Bus.slave[4]
327
328[system.cpu2.interrupts]
329type=SparcInterrupts

--- 33 unchanged lines hidden (view full) ---

363dcache_port=system.cpu3.dcache.cpu_side
364icache_port=system.cpu3.icache.cpu_side
365
366[system.cpu3.dcache]
367type=BaseCache
368addr_ranges=0:18446744073709551615
369assoc=4
370block_size=64
371clock=1
371clock=500
372forward_snoops=true
373hash_delay=1
372forward_snoops=true
373hash_delay=1
374hit_latency=1000
374hit_latency=2
375is_top_level=true
376max_miss_count=0
377mshrs=4
378prefetch_on_access=false
379prefetcher=Null
380prioritizeRequests=false
381repl=Null
375is_top_level=true
376max_miss_count=0
377mshrs=4
378prefetch_on_access=false
379prefetcher=Null
380prioritizeRequests=false
381repl=Null
382response_latency=1000
382response_latency=2
383size=32768
384subblock_size=0
385system=system
383size=32768
384subblock_size=0
385system=system
386tgts_per_mshr=8
386tgts_per_mshr=20
387trace_addr=0
388two_queue=false
389write_buffers=8
390cpu_side=system.cpu3.dcache_port
391mem_side=system.toL2Bus.slave[7]
392
393[system.cpu3.dtb]
394type=SparcTLB
395size=64
396
397[system.cpu3.icache]
398type=BaseCache
399addr_ranges=0:18446744073709551615
400assoc=1
401block_size=64
387trace_addr=0
388two_queue=false
389write_buffers=8
390cpu_side=system.cpu3.dcache_port
391mem_side=system.toL2Bus.slave[7]
392
393[system.cpu3.dtb]
394type=SparcTLB
395size=64
396
397[system.cpu3.icache]
398type=BaseCache
399addr_ranges=0:18446744073709551615
400assoc=1
401block_size=64
402clock=1
402clock=500
403forward_snoops=true
404hash_delay=1
403forward_snoops=true
404hash_delay=1
405hit_latency=1000
405hit_latency=2
406is_top_level=true
407max_miss_count=0
408mshrs=4
409prefetch_on_access=false
410prefetcher=Null
411prioritizeRequests=false
412repl=Null
406is_top_level=true
407max_miss_count=0
408mshrs=4
409prefetch_on_access=false
410prefetcher=Null
411prioritizeRequests=false
412repl=Null
413response_latency=1000
413response_latency=2
414size=32768
415subblock_size=0
416system=system
414size=32768
415subblock_size=0
416system=system
417tgts_per_mshr=8
417tgts_per_mshr=20
418trace_addr=0
419two_queue=false
420write_buffers=8
421cpu_side=system.cpu3.icache_port
422mem_side=system.toL2Bus.slave[6]
423
424[system.cpu3.interrupts]
425type=SparcInterrupts

--- 5 unchanged lines hidden (view full) ---

431[system.cpu3.tracer]
432type=ExeTracer
433
434[system.l2c]
435type=BaseCache
436addr_ranges=0:18446744073709551615
437assoc=8
438block_size=64
418trace_addr=0
419two_queue=false
420write_buffers=8
421cpu_side=system.cpu3.icache_port
422mem_side=system.toL2Bus.slave[6]
423
424[system.cpu3.interrupts]
425type=SparcInterrupts

--- 5 unchanged lines hidden (view full) ---

431[system.cpu3.tracer]
432type=ExeTracer
433
434[system.l2c]
435type=BaseCache
436addr_ranges=0:18446744073709551615
437assoc=8
438block_size=64
439clock=1
439clock=500
440forward_snoops=true
441hash_delay=1
440forward_snoops=true
441hash_delay=1
442hit_latency=10000
442hit_latency=20
443is_top_level=false
444max_miss_count=0
443is_top_level=false
444max_miss_count=0
445mshrs=92
445mshrs=20
446prefetch_on_access=false
447prefetcher=Null
448prioritizeRequests=false
449repl=Null
446prefetch_on_access=false
447prefetcher=Null
448prioritizeRequests=false
449repl=Null
450response_latency=10000
450response_latency=20
451size=4194304
452subblock_size=0
453system=system
451size=4194304
452subblock_size=0
453system=system
454tgts_per_mshr=16
454tgts_per_mshr=12
455trace_addr=0
456two_queue=false
457write_buffers=8
458cpu_side=system.toL2Bus.master[0]
459mem_side=system.membus.slave[0]
460
461[system.membus]
462type=CoherentBus
463block_size=64
464clock=1000
465header_cycles=1
466use_default_range=false
467width=8
468master=system.physmem.port
469slave=system.l2c.mem_side system.system_port
470
471[system.physmem]
472type=SimpleMemory
473bandwidth=73.000000
455trace_addr=0
456two_queue=false
457write_buffers=8
458cpu_side=system.toL2Bus.master[0]
459mem_side=system.membus.slave[0]
460
461[system.membus]
462type=CoherentBus
463block_size=64
464clock=1000
465header_cycles=1
466use_default_range=false
467width=8
468master=system.physmem.port
469slave=system.l2c.mem_side system.system_port
470
471[system.physmem]
472type=SimpleMemory
473bandwidth=73.000000
474clock=1
474clock=1000
475conf_table_reported=false
476in_addr_map=true
477latency=30000
478latency_var=0
479null=false
480range=0:134217727
481zero=false
482port=system.membus.master[0]
483
484[system.toL2Bus]
485type=CoherentBus
486block_size=64
475conf_table_reported=false
476in_addr_map=true
477latency=30000
478latency_var=0
479null=false
480range=0:134217727
481zero=false
482port=system.membus.master[0]
483
484[system.toL2Bus]
485type=CoherentBus
486block_size=64
487clock=1000
487clock=500
488header_cycles=1
489use_default_range=false
490width=8
491master=system.l2c.cpu_side
492slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
493
488header_cycles=1
489use_default_range=false
490width=8
491master=system.l2c.cpu_side
492slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
493