1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000088 # Number of seconds simulated
4sim_ticks 87707000 # Number of ticks simulated
5final_tick 87707000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1039500 # Simulator instruction rate (inst/s)
8host_op_rate 1039462 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 134594380 # Simulator tick rate (ticks/s)
10host_mem_usage 262812 # Number of bytes of host memory used
11host_seconds 0.65 # Real time elapsed on the host
12sim_insts 677333 # Number of instructions simulated
13sim_ops 677333 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 18048 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 10560 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 3968 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 1280 # Number of bytes read from this memory
--- 155 unchanged lines hidden (view full) ---
175system.cpu0.dcache.overall_miss_rate::cpu0.data 0.003984 # miss rate for overall accesses
176system.cpu0.dcache.overall_miss_rate::total 0.003984 # miss rate for overall accesses
177system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
178system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
179system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
180system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked
181system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
182system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
183system.cpu0.dcache.writebacks::writebacks 1 # number of writebacks
184system.cpu0.dcache.writebacks::total 1 # number of writebacks
185system.cpu0.icache.tags.replacements 215 # number of replacements
186system.cpu0.icache.tags.tagsinuse 222.772732 # Cycle average of tags in use
187system.cpu0.icache.tags.total_refs 174921 # Total number of references to valid blocks.
188system.cpu0.icache.tags.sampled_refs 467 # Sample count of references to valid blocks.
189system.cpu0.icache.tags.avg_refs 374.563169 # Average number of references to valid blocks.
190system.cpu0.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
191system.cpu0.icache.tags.occ_blocks::cpu0.inst 222.772732 # Average occupied blocks per requestor
192system.cpu0.icache.tags.occ_percent::cpu0.inst 0.435103 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
222system.cpu0.icache.overall_miss_rate::cpu0.inst 0.002663 # miss rate for overall accesses
223system.cpu0.icache.overall_miss_rate::total 0.002663 # miss rate for overall accesses
224system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
225system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
226system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked
227system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked
228system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
229system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
230system.cpu0.icache.writebacks::writebacks 215 # number of writebacks
231system.cpu0.icache.writebacks::total 215 # number of writebacks
232system.cpu1.numCycles 173297 # number of cpu cycles simulated
233system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
234system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
235system.cpu1.committedInsts 167400 # Number of instructions committed
236system.cpu1.committedOps 167400 # Number of ops (including micro ops) committed
237system.cpu1.num_int_alu_accesses 107326 # Number of integer alu accesses
238system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses
239system.cpu1.num_func_calls 633 # number of times a function call or return occured
--- 102 unchanged lines hidden (view full) ---
342system.cpu1.dcache.overall_miss_rate::cpu1.data 0.005809 # miss rate for overall accesses
343system.cpu1.dcache.overall_miss_rate::total 0.005809 # miss rate for overall accesses
344system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
345system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
346system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
347system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked
348system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
349system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
350system.cpu1.icache.tags.replacements 278 # number of replacements
351system.cpu1.icache.tags.tagsinuse 76.752158 # Cycle average of tags in use
352system.cpu1.icache.tags.total_refs 167074 # Total number of references to valid blocks.
353system.cpu1.icache.tags.sampled_refs 358 # Sample count of references to valid blocks.
354system.cpu1.icache.tags.avg_refs 466.687151 # Average number of references to valid blocks.
355system.cpu1.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
356system.cpu1.icache.tags.occ_blocks::cpu1.inst 76.752158 # Average occupied blocks per requestor
357system.cpu1.icache.tags.occ_percent::cpu1.inst 0.149907 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
387system.cpu1.icache.overall_miss_rate::cpu1.inst 0.002138 # miss rate for overall accesses
388system.cpu1.icache.overall_miss_rate::total 0.002138 # miss rate for overall accesses
389system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
390system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
391system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked
392system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked
393system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
394system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
395system.cpu1.icache.writebacks::writebacks 278 # number of writebacks
396system.cpu1.icache.writebacks::total 278 # number of writebacks
397system.cpu2.numCycles 173296 # number of cpu cycles simulated
398system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started
399system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed
400system.cpu2.committedInsts 167335 # Number of instructions committed
401system.cpu2.committedOps 167335 # Number of ops (including micro ops) committed
402system.cpu2.num_int_alu_accesses 114196 # Number of integer alu accesses
403system.cpu2.num_fp_alu_accesses 0 # Number of float alu accesses
404system.cpu2.num_func_calls 633 # number of times a function call or return occured
--- 103 unchanged lines hidden (view full) ---
508system.cpu2.dcache.overall_miss_rate::cpu2.data 0.004267 # miss rate for overall accesses
509system.cpu2.dcache.overall_miss_rate::total 0.004267 # miss rate for overall accesses
510system.cpu2.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
511system.cpu2.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
512system.cpu2.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
513system.cpu2.dcache.blocked::no_targets 0 # number of cycles access was blocked
514system.cpu2.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
515system.cpu2.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
516system.cpu2.icache.tags.replacements 278 # number of replacements
517system.cpu2.icache.tags.tagsinuse 74.781471 # Cycle average of tags in use
518system.cpu2.icache.tags.total_refs 167009 # Total number of references to valid blocks.
519system.cpu2.icache.tags.sampled_refs 358 # Sample count of references to valid blocks.
520system.cpu2.icache.tags.avg_refs 466.505587 # Average number of references to valid blocks.
521system.cpu2.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
522system.cpu2.icache.tags.occ_blocks::cpu2.inst 74.781471 # Average occupied blocks per requestor
523system.cpu2.icache.tags.occ_percent::cpu2.inst 0.146058 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
553system.cpu2.icache.overall_miss_rate::cpu2.inst 0.002139 # miss rate for overall accesses
554system.cpu2.icache.overall_miss_rate::total 0.002139 # miss rate for overall accesses
555system.cpu2.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
556system.cpu2.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
557system.cpu2.icache.blocked::no_mshrs 0 # number of cycles access was blocked
558system.cpu2.icache.blocked::no_targets 0 # number of cycles access was blocked
559system.cpu2.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
560system.cpu2.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
561system.cpu2.icache.writebacks::writebacks 278 # number of writebacks
562system.cpu2.icache.writebacks::total 278 # number of writebacks
563system.cpu3.numCycles 173297 # number of cpu cycles simulated
564system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started
565system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed
566system.cpu3.committedInsts 167272 # Number of instructions committed
567system.cpu3.committedOps 167272 # Number of ops (including micro ops) committed
568system.cpu3.num_int_alu_accesses 113295 # Number of integer alu accesses
569system.cpu3.num_fp_alu_accesses 0 # Number of float alu accesses
570system.cpu3.num_func_calls 633 # number of times a function call or return occured
--- 102 unchanged lines hidden (view full) ---
673system.cpu3.dcache.overall_miss_rate::cpu3.data 0.004449 # miss rate for overall accesses
674system.cpu3.dcache.overall_miss_rate::total 0.004449 # miss rate for overall accesses
675system.cpu3.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
676system.cpu3.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
677system.cpu3.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
678system.cpu3.dcache.blocked::no_targets 0 # number of cycles access was blocked
679system.cpu3.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
680system.cpu3.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
681system.cpu3.icache.tags.replacements 279 # number of replacements
682system.cpu3.icache.tags.tagsinuse 72.874953 # Cycle average of tags in use
683system.cpu3.icache.tags.total_refs 166945 # Total number of references to valid blocks.
684system.cpu3.icache.tags.sampled_refs 359 # Sample count of references to valid blocks.
685system.cpu3.icache.tags.avg_refs 465.027855 # Average number of references to valid blocks.
686system.cpu3.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
687system.cpu3.icache.tags.occ_blocks::cpu3.inst 72.874953 # Average occupied blocks per requestor
688system.cpu3.icache.tags.occ_percent::cpu3.inst 0.142334 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
718system.cpu3.icache.overall_miss_rate::cpu3.inst 0.002146 # miss rate for overall accesses
719system.cpu3.icache.overall_miss_rate::total 0.002146 # miss rate for overall accesses
720system.cpu3.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
721system.cpu3.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
722system.cpu3.icache.blocked::no_mshrs 0 # number of cycles access was blocked
723system.cpu3.icache.blocked::no_targets 0 # number of cycles access was blocked
724system.cpu3.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
725system.cpu3.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
726system.cpu3.icache.writebacks::writebacks 279 # number of writebacks
727system.cpu3.icache.writebacks::total 279 # number of writebacks
728system.l2c.tags.replacements 0 # number of replacements
729system.l2c.tags.tagsinuse 367.545675 # Cycle average of tags in use
730system.l2c.tags.total_refs 1716 # Total number of references to valid blocks.
731system.l2c.tags.sampled_refs 422 # Sample count of references to valid blocks.
732system.l2c.tags.avg_refs 4.066351 # Average number of references to valid blocks.
733system.l2c.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
734system.l2c.tags.occ_blocks::writebacks 0.966439 # Average occupied blocks per requestor
735system.l2c.tags.occ_blocks::cpu0.inst 239.426226 # Average occupied blocks per requestor
--- 173 unchanged lines hidden (view full) ---
909system.l2c.overall_miss_rate::cpu3.data 0.590909 # miss rate for overall accesses
910system.l2c.overall_miss_rate::total 0.314221 # miss rate for overall accesses
911system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
912system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
913system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
914system.l2c.blocked::no_targets 0 # number of cycles access was blocked
915system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
916system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
917system.membus.trans_dist::ReadResp 423 # Transaction distribution
918system.membus.trans_dist::UpgradeReq 273 # Transaction distribution
919system.membus.trans_dist::UpgradeResp 80 # Transaction distribution
920system.membus.trans_dist::ReadExReq 183 # Transaction distribution
921system.membus.trans_dist::ReadExResp 136 # Transaction distribution
922system.membus.trans_dist::ReadSharedReq 423 # Transaction distribution
923system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 1518 # Packet count per connected master and slave (bytes)
924system.membus.pkt_count::total 1518 # Packet count per connected master and slave (bytes)
--- 67 unchanged lines hidden ---
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000088 # Number of seconds simulated
4sim_ticks 87707000 # Number of ticks simulated
5final_tick 87707000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1039500 # Simulator instruction rate (inst/s)
8host_op_rate 1039462 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 134594380 # Simulator tick rate (ticks/s)
10host_mem_usage 262812 # Number of bytes of host memory used
11host_seconds 0.65 # Real time elapsed on the host
12sim_insts 677333 # Number of instructions simulated
13sim_ops 677333 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 18048 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 10560 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 3968 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 1280 # Number of bytes read from this memory
--- 155 unchanged lines hidden (view full) ---
175system.cpu0.dcache.overall_miss_rate::cpu0.data 0.003984 # miss rate for overall accesses
176system.cpu0.dcache.overall_miss_rate::total 0.003984 # miss rate for overall accesses
177system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
178system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
179system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
180system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked
181system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
182system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
183system.cpu0.dcache.writebacks::writebacks 1 # number of writebacks
184system.cpu0.dcache.writebacks::total 1 # number of writebacks
185system.cpu0.icache.tags.replacements 215 # number of replacements
186system.cpu0.icache.tags.tagsinuse 222.772732 # Cycle average of tags in use
187system.cpu0.icache.tags.total_refs 174921 # Total number of references to valid blocks.
188system.cpu0.icache.tags.sampled_refs 467 # Sample count of references to valid blocks.
189system.cpu0.icache.tags.avg_refs 374.563169 # Average number of references to valid blocks.
190system.cpu0.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
191system.cpu0.icache.tags.occ_blocks::cpu0.inst 222.772732 # Average occupied blocks per requestor
192system.cpu0.icache.tags.occ_percent::cpu0.inst 0.435103 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
222system.cpu0.icache.overall_miss_rate::cpu0.inst 0.002663 # miss rate for overall accesses
223system.cpu0.icache.overall_miss_rate::total 0.002663 # miss rate for overall accesses
224system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
225system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
226system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked
227system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked
228system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
229system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
230system.cpu0.icache.writebacks::writebacks 215 # number of writebacks
231system.cpu0.icache.writebacks::total 215 # number of writebacks
232system.cpu1.numCycles 173297 # number of cpu cycles simulated
233system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
234system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
235system.cpu1.committedInsts 167400 # Number of instructions committed
236system.cpu1.committedOps 167400 # Number of ops (including micro ops) committed
237system.cpu1.num_int_alu_accesses 107326 # Number of integer alu accesses
238system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses
239system.cpu1.num_func_calls 633 # number of times a function call or return occured
--- 102 unchanged lines hidden (view full) ---
342system.cpu1.dcache.overall_miss_rate::cpu1.data 0.005809 # miss rate for overall accesses
343system.cpu1.dcache.overall_miss_rate::total 0.005809 # miss rate for overall accesses
344system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
345system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
346system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
347system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked
348system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
349system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
350system.cpu1.icache.tags.replacements 278 # number of replacements
351system.cpu1.icache.tags.tagsinuse 76.752158 # Cycle average of tags in use
352system.cpu1.icache.tags.total_refs 167074 # Total number of references to valid blocks.
353system.cpu1.icache.tags.sampled_refs 358 # Sample count of references to valid blocks.
354system.cpu1.icache.tags.avg_refs 466.687151 # Average number of references to valid blocks.
355system.cpu1.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
356system.cpu1.icache.tags.occ_blocks::cpu1.inst 76.752158 # Average occupied blocks per requestor
357system.cpu1.icache.tags.occ_percent::cpu1.inst 0.149907 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
387system.cpu1.icache.overall_miss_rate::cpu1.inst 0.002138 # miss rate for overall accesses
388system.cpu1.icache.overall_miss_rate::total 0.002138 # miss rate for overall accesses
389system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
390system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
391system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked
392system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked
393system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
394system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
395system.cpu1.icache.writebacks::writebacks 278 # number of writebacks
396system.cpu1.icache.writebacks::total 278 # number of writebacks
397system.cpu2.numCycles 173296 # number of cpu cycles simulated
398system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started
399system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed
400system.cpu2.committedInsts 167335 # Number of instructions committed
401system.cpu2.committedOps 167335 # Number of ops (including micro ops) committed
402system.cpu2.num_int_alu_accesses 114196 # Number of integer alu accesses
403system.cpu2.num_fp_alu_accesses 0 # Number of float alu accesses
404system.cpu2.num_func_calls 633 # number of times a function call or return occured
--- 103 unchanged lines hidden (view full) ---
508system.cpu2.dcache.overall_miss_rate::cpu2.data 0.004267 # miss rate for overall accesses
509system.cpu2.dcache.overall_miss_rate::total 0.004267 # miss rate for overall accesses
510system.cpu2.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
511system.cpu2.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
512system.cpu2.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
513system.cpu2.dcache.blocked::no_targets 0 # number of cycles access was blocked
514system.cpu2.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
515system.cpu2.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
516system.cpu2.icache.tags.replacements 278 # number of replacements
517system.cpu2.icache.tags.tagsinuse 74.781471 # Cycle average of tags in use
518system.cpu2.icache.tags.total_refs 167009 # Total number of references to valid blocks.
519system.cpu2.icache.tags.sampled_refs 358 # Sample count of references to valid blocks.
520system.cpu2.icache.tags.avg_refs 466.505587 # Average number of references to valid blocks.
521system.cpu2.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
522system.cpu2.icache.tags.occ_blocks::cpu2.inst 74.781471 # Average occupied blocks per requestor
523system.cpu2.icache.tags.occ_percent::cpu2.inst 0.146058 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
553system.cpu2.icache.overall_miss_rate::cpu2.inst 0.002139 # miss rate for overall accesses
554system.cpu2.icache.overall_miss_rate::total 0.002139 # miss rate for overall accesses
555system.cpu2.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
556system.cpu2.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
557system.cpu2.icache.blocked::no_mshrs 0 # number of cycles access was blocked
558system.cpu2.icache.blocked::no_targets 0 # number of cycles access was blocked
559system.cpu2.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
560system.cpu2.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
561system.cpu2.icache.writebacks::writebacks 278 # number of writebacks
562system.cpu2.icache.writebacks::total 278 # number of writebacks
563system.cpu3.numCycles 173297 # number of cpu cycles simulated
564system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started
565system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed
566system.cpu3.committedInsts 167272 # Number of instructions committed
567system.cpu3.committedOps 167272 # Number of ops (including micro ops) committed
568system.cpu3.num_int_alu_accesses 113295 # Number of integer alu accesses
569system.cpu3.num_fp_alu_accesses 0 # Number of float alu accesses
570system.cpu3.num_func_calls 633 # number of times a function call or return occured
--- 102 unchanged lines hidden (view full) ---
673system.cpu3.dcache.overall_miss_rate::cpu3.data 0.004449 # miss rate for overall accesses
674system.cpu3.dcache.overall_miss_rate::total 0.004449 # miss rate for overall accesses
675system.cpu3.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
676system.cpu3.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
677system.cpu3.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
678system.cpu3.dcache.blocked::no_targets 0 # number of cycles access was blocked
679system.cpu3.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
680system.cpu3.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
681system.cpu3.icache.tags.replacements 279 # number of replacements
682system.cpu3.icache.tags.tagsinuse 72.874953 # Cycle average of tags in use
683system.cpu3.icache.tags.total_refs 166945 # Total number of references to valid blocks.
684system.cpu3.icache.tags.sampled_refs 359 # Sample count of references to valid blocks.
685system.cpu3.icache.tags.avg_refs 465.027855 # Average number of references to valid blocks.
686system.cpu3.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
687system.cpu3.icache.tags.occ_blocks::cpu3.inst 72.874953 # Average occupied blocks per requestor
688system.cpu3.icache.tags.occ_percent::cpu3.inst 0.142334 # Average percentage of cache occupancy
--- 29 unchanged lines hidden (view full) ---
718system.cpu3.icache.overall_miss_rate::cpu3.inst 0.002146 # miss rate for overall accesses
719system.cpu3.icache.overall_miss_rate::total 0.002146 # miss rate for overall accesses
720system.cpu3.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
721system.cpu3.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
722system.cpu3.icache.blocked::no_mshrs 0 # number of cycles access was blocked
723system.cpu3.icache.blocked::no_targets 0 # number of cycles access was blocked
724system.cpu3.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
725system.cpu3.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
726system.cpu3.icache.writebacks::writebacks 279 # number of writebacks
727system.cpu3.icache.writebacks::total 279 # number of writebacks
728system.l2c.tags.replacements 0 # number of replacements
729system.l2c.tags.tagsinuse 367.545675 # Cycle average of tags in use
730system.l2c.tags.total_refs 1716 # Total number of references to valid blocks.
731system.l2c.tags.sampled_refs 422 # Sample count of references to valid blocks.
732system.l2c.tags.avg_refs 4.066351 # Average number of references to valid blocks.
733system.l2c.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
734system.l2c.tags.occ_blocks::writebacks 0.966439 # Average occupied blocks per requestor
735system.l2c.tags.occ_blocks::cpu0.inst 239.426226 # Average occupied blocks per requestor
--- 173 unchanged lines hidden (view full) ---
909system.l2c.overall_miss_rate::cpu3.data 0.590909 # miss rate for overall accesses
910system.l2c.overall_miss_rate::total 0.314221 # miss rate for overall accesses
911system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
912system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
913system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
914system.l2c.blocked::no_targets 0 # number of cycles access was blocked
915system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
916system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
917system.membus.trans_dist::ReadResp 423 # Transaction distribution
918system.membus.trans_dist::UpgradeReq 273 # Transaction distribution
919system.membus.trans_dist::UpgradeResp 80 # Transaction distribution
920system.membus.trans_dist::ReadExReq 183 # Transaction distribution
921system.membus.trans_dist::ReadExResp 136 # Transaction distribution
922system.membus.trans_dist::ReadSharedReq 423 # Transaction distribution
923system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 1518 # Packet count per connected master and slave (bytes)
924system.membus.pkt_count::total 1518 # Packet count per connected master and slave (bytes)
--- 67 unchanged lines hidden ---