config.ini (9276:a5ede748a1d9) config.ini (9348:44d31345e360)
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
11children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus
12boot_osflags=a
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
11children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus
12boot_osflags=a
13clock=1
13clock=1000
14init_param=0
15kernel=
16load_addr_mask=1099511627775
17mem_mode=atomic
18memories=system.physmem
19num_work_ids=16
20readfile=
21symbolfile=

--- 38 unchanged lines hidden (view full) ---

60dcache_port=system.cpu0.dcache.cpu_side
61icache_port=system.cpu0.icache.cpu_side
62
63[system.cpu0.dcache]
64type=BaseCache
65addr_ranges=0:18446744073709551615
66assoc=4
67block_size=64
14init_param=0
15kernel=
16load_addr_mask=1099511627775
17mem_mode=atomic
18memories=system.physmem
19num_work_ids=16
20readfile=
21symbolfile=

--- 38 unchanged lines hidden (view full) ---

60dcache_port=system.cpu0.dcache.cpu_side
61icache_port=system.cpu0.icache.cpu_side
62
63[system.cpu0.dcache]
64type=BaseCache
65addr_ranges=0:18446744073709551615
66assoc=4
67block_size=64
68clock=1
68clock=500
69forward_snoops=true
70hash_delay=1
69forward_snoops=true
70hash_delay=1
71hit_latency=1000
71hit_latency=2
72is_top_level=true
73max_miss_count=0
74mshrs=4
75prefetch_on_access=false
76prefetcher=Null
77prioritizeRequests=false
78repl=Null
72is_top_level=true
73max_miss_count=0
74mshrs=4
75prefetch_on_access=false
76prefetcher=Null
77prioritizeRequests=false
78repl=Null
79response_latency=1000
79response_latency=2
80size=32768
81subblock_size=0
82system=system
80size=32768
81subblock_size=0
82system=system
83tgts_per_mshr=8
83tgts_per_mshr=20
84trace_addr=0
85two_queue=false
86write_buffers=8
87cpu_side=system.cpu0.dcache_port
88mem_side=system.toL2Bus.slave[1]
89
90[system.cpu0.dtb]
91type=SparcTLB
92size=64
93
94[system.cpu0.icache]
95type=BaseCache
96addr_ranges=0:18446744073709551615
97assoc=1
98block_size=64
84trace_addr=0
85two_queue=false
86write_buffers=8
87cpu_side=system.cpu0.dcache_port
88mem_side=system.toL2Bus.slave[1]
89
90[system.cpu0.dtb]
91type=SparcTLB
92size=64
93
94[system.cpu0.icache]
95type=BaseCache
96addr_ranges=0:18446744073709551615
97assoc=1
98block_size=64
99clock=1
99clock=500
100forward_snoops=true
101hash_delay=1
100forward_snoops=true
101hash_delay=1
102hit_latency=1000
102hit_latency=2
103is_top_level=true
104max_miss_count=0
105mshrs=4
106prefetch_on_access=false
107prefetcher=Null
108prioritizeRequests=false
109repl=Null
103is_top_level=true
104max_miss_count=0
105mshrs=4
106prefetch_on_access=false
107prefetcher=Null
108prioritizeRequests=false
109repl=Null
110response_latency=1000
110response_latency=2
111size=32768
112subblock_size=0
113system=system
111size=32768
112subblock_size=0
113system=system
114tgts_per_mshr=8
114tgts_per_mshr=20
115trace_addr=0
116two_queue=false
117write_buffers=8
118cpu_side=system.cpu0.icache_port
119mem_side=system.toL2Bus.slave[0]
120
121[system.cpu0.interrupts]
122type=SparcInterrupts

--- 8 unchanged lines hidden (view full) ---

131[system.cpu0.workload]
132type=LiveProcess
133cmd=test_atomic 4
134cwd=
135egid=100
136env=
137errout=cerr
138euid=100
115trace_addr=0
116two_queue=false
117write_buffers=8
118cpu_side=system.cpu0.icache_port
119mem_side=system.toL2Bus.slave[0]
120
121[system.cpu0.interrupts]
122type=SparcInterrupts

--- 8 unchanged lines hidden (view full) ---

131[system.cpu0.workload]
132type=LiveProcess
133cmd=test_atomic 4
134cwd=
135egid=100
136env=
137errout=cerr
138euid=100
139executable=tests/test-progs/m5threads/bin/sparc/linux/test_atomic
139executable=/projects/pd/randd/dist/test-progs/m5threads/bin/sparc/linux/test_atomic
140gid=100
141input=cin
142max_stack_size=67108864
143output=cout
144pid=100
145ppid=99
146simpoint=0
147system=system

--- 31 unchanged lines hidden (view full) ---

179dcache_port=system.cpu1.dcache.cpu_side
180icache_port=system.cpu1.icache.cpu_side
181
182[system.cpu1.dcache]
183type=BaseCache
184addr_ranges=0:18446744073709551615
185assoc=4
186block_size=64
140gid=100
141input=cin
142max_stack_size=67108864
143output=cout
144pid=100
145ppid=99
146simpoint=0
147system=system

--- 31 unchanged lines hidden (view full) ---

179dcache_port=system.cpu1.dcache.cpu_side
180icache_port=system.cpu1.icache.cpu_side
181
182[system.cpu1.dcache]
183type=BaseCache
184addr_ranges=0:18446744073709551615
185assoc=4
186block_size=64
187clock=1
187clock=500
188forward_snoops=true
189hash_delay=1
188forward_snoops=true
189hash_delay=1
190hit_latency=1000
190hit_latency=2
191is_top_level=true
192max_miss_count=0
193mshrs=4
194prefetch_on_access=false
195prefetcher=Null
196prioritizeRequests=false
197repl=Null
191is_top_level=true
192max_miss_count=0
193mshrs=4
194prefetch_on_access=false
195prefetcher=Null
196prioritizeRequests=false
197repl=Null
198response_latency=1000
198response_latency=2
199size=32768
200subblock_size=0
201system=system
199size=32768
200subblock_size=0
201system=system
202tgts_per_mshr=8
202tgts_per_mshr=20
203trace_addr=0
204two_queue=false
205write_buffers=8
206cpu_side=system.cpu1.dcache_port
207mem_side=system.toL2Bus.slave[3]
208
209[system.cpu1.dtb]
210type=SparcTLB
211size=64
212
213[system.cpu1.icache]
214type=BaseCache
215addr_ranges=0:18446744073709551615
216assoc=1
217block_size=64
203trace_addr=0
204two_queue=false
205write_buffers=8
206cpu_side=system.cpu1.dcache_port
207mem_side=system.toL2Bus.slave[3]
208
209[system.cpu1.dtb]
210type=SparcTLB
211size=64
212
213[system.cpu1.icache]
214type=BaseCache
215addr_ranges=0:18446744073709551615
216assoc=1
217block_size=64
218clock=1
218clock=500
219forward_snoops=true
220hash_delay=1
219forward_snoops=true
220hash_delay=1
221hit_latency=1000
221hit_latency=2
222is_top_level=true
223max_miss_count=0
224mshrs=4
225prefetch_on_access=false
226prefetcher=Null
227prioritizeRequests=false
228repl=Null
222is_top_level=true
223max_miss_count=0
224mshrs=4
225prefetch_on_access=false
226prefetcher=Null
227prioritizeRequests=false
228repl=Null
229response_latency=1000
229response_latency=2
230size=32768
231subblock_size=0
232system=system
230size=32768
231subblock_size=0
232system=system
233tgts_per_mshr=8
233tgts_per_mshr=20
234trace_addr=0
235two_queue=false
236write_buffers=8
237cpu_side=system.cpu1.icache_port
238mem_side=system.toL2Bus.slave[2]
239
240[system.cpu1.interrupts]
241type=SparcInterrupts

--- 37 unchanged lines hidden (view full) ---

279dcache_port=system.cpu2.dcache.cpu_side
280icache_port=system.cpu2.icache.cpu_side
281
282[system.cpu2.dcache]
283type=BaseCache
284addr_ranges=0:18446744073709551615
285assoc=4
286block_size=64
234trace_addr=0
235two_queue=false
236write_buffers=8
237cpu_side=system.cpu1.icache_port
238mem_side=system.toL2Bus.slave[2]
239
240[system.cpu1.interrupts]
241type=SparcInterrupts

--- 37 unchanged lines hidden (view full) ---

279dcache_port=system.cpu2.dcache.cpu_side
280icache_port=system.cpu2.icache.cpu_side
281
282[system.cpu2.dcache]
283type=BaseCache
284addr_ranges=0:18446744073709551615
285assoc=4
286block_size=64
287clock=1
287clock=500
288forward_snoops=true
289hash_delay=1
288forward_snoops=true
289hash_delay=1
290hit_latency=1000
290hit_latency=2
291is_top_level=true
292max_miss_count=0
293mshrs=4
294prefetch_on_access=false
295prefetcher=Null
296prioritizeRequests=false
297repl=Null
291is_top_level=true
292max_miss_count=0
293mshrs=4
294prefetch_on_access=false
295prefetcher=Null
296prioritizeRequests=false
297repl=Null
298response_latency=1000
298response_latency=2
299size=32768
300subblock_size=0
301system=system
299size=32768
300subblock_size=0
301system=system
302tgts_per_mshr=8
302tgts_per_mshr=20
303trace_addr=0
304two_queue=false
305write_buffers=8
306cpu_side=system.cpu2.dcache_port
307mem_side=system.toL2Bus.slave[5]
308
309[system.cpu2.dtb]
310type=SparcTLB
311size=64
312
313[system.cpu2.icache]
314type=BaseCache
315addr_ranges=0:18446744073709551615
316assoc=1
317block_size=64
303trace_addr=0
304two_queue=false
305write_buffers=8
306cpu_side=system.cpu2.dcache_port
307mem_side=system.toL2Bus.slave[5]
308
309[system.cpu2.dtb]
310type=SparcTLB
311size=64
312
313[system.cpu2.icache]
314type=BaseCache
315addr_ranges=0:18446744073709551615
316assoc=1
317block_size=64
318clock=1
318clock=500
319forward_snoops=true
320hash_delay=1
319forward_snoops=true
320hash_delay=1
321hit_latency=1000
321hit_latency=2
322is_top_level=true
323max_miss_count=0
324mshrs=4
325prefetch_on_access=false
326prefetcher=Null
327prioritizeRequests=false
328repl=Null
322is_top_level=true
323max_miss_count=0
324mshrs=4
325prefetch_on_access=false
326prefetcher=Null
327prioritizeRequests=false
328repl=Null
329response_latency=1000
329response_latency=2
330size=32768
331subblock_size=0
332system=system
330size=32768
331subblock_size=0
332system=system
333tgts_per_mshr=8
333tgts_per_mshr=20
334trace_addr=0
335two_queue=false
336write_buffers=8
337cpu_side=system.cpu2.icache_port
338mem_side=system.toL2Bus.slave[4]
339
340[system.cpu2.interrupts]
341type=SparcInterrupts

--- 37 unchanged lines hidden (view full) ---

379dcache_port=system.cpu3.dcache.cpu_side
380icache_port=system.cpu3.icache.cpu_side
381
382[system.cpu3.dcache]
383type=BaseCache
384addr_ranges=0:18446744073709551615
385assoc=4
386block_size=64
334trace_addr=0
335two_queue=false
336write_buffers=8
337cpu_side=system.cpu2.icache_port
338mem_side=system.toL2Bus.slave[4]
339
340[system.cpu2.interrupts]
341type=SparcInterrupts

--- 37 unchanged lines hidden (view full) ---

379dcache_port=system.cpu3.dcache.cpu_side
380icache_port=system.cpu3.icache.cpu_side
381
382[system.cpu3.dcache]
383type=BaseCache
384addr_ranges=0:18446744073709551615
385assoc=4
386block_size=64
387clock=1
387clock=500
388forward_snoops=true
389hash_delay=1
388forward_snoops=true
389hash_delay=1
390hit_latency=1000
390hit_latency=2
391is_top_level=true
392max_miss_count=0
393mshrs=4
394prefetch_on_access=false
395prefetcher=Null
396prioritizeRequests=false
397repl=Null
391is_top_level=true
392max_miss_count=0
393mshrs=4
394prefetch_on_access=false
395prefetcher=Null
396prioritizeRequests=false
397repl=Null
398response_latency=1000
398response_latency=2
399size=32768
400subblock_size=0
401system=system
399size=32768
400subblock_size=0
401system=system
402tgts_per_mshr=8
402tgts_per_mshr=20
403trace_addr=0
404two_queue=false
405write_buffers=8
406cpu_side=system.cpu3.dcache_port
407mem_side=system.toL2Bus.slave[7]
408
409[system.cpu3.dtb]
410type=SparcTLB
411size=64
412
413[system.cpu3.icache]
414type=BaseCache
415addr_ranges=0:18446744073709551615
416assoc=1
417block_size=64
403trace_addr=0
404two_queue=false
405write_buffers=8
406cpu_side=system.cpu3.dcache_port
407mem_side=system.toL2Bus.slave[7]
408
409[system.cpu3.dtb]
410type=SparcTLB
411size=64
412
413[system.cpu3.icache]
414type=BaseCache
415addr_ranges=0:18446744073709551615
416assoc=1
417block_size=64
418clock=1
418clock=500
419forward_snoops=true
420hash_delay=1
419forward_snoops=true
420hash_delay=1
421hit_latency=1000
421hit_latency=2
422is_top_level=true
423max_miss_count=0
424mshrs=4
425prefetch_on_access=false
426prefetcher=Null
427prioritizeRequests=false
428repl=Null
422is_top_level=true
423max_miss_count=0
424mshrs=4
425prefetch_on_access=false
426prefetcher=Null
427prioritizeRequests=false
428repl=Null
429response_latency=1000
429response_latency=2
430size=32768
431subblock_size=0
432system=system
430size=32768
431subblock_size=0
432system=system
433tgts_per_mshr=8
433tgts_per_mshr=20
434trace_addr=0
435two_queue=false
436write_buffers=8
437cpu_side=system.cpu3.icache_port
438mem_side=system.toL2Bus.slave[6]
439
440[system.cpu3.interrupts]
441type=SparcInterrupts

--- 5 unchanged lines hidden (view full) ---

447[system.cpu3.tracer]
448type=ExeTracer
449
450[system.l2c]
451type=BaseCache
452addr_ranges=0:18446744073709551615
453assoc=8
454block_size=64
434trace_addr=0
435two_queue=false
436write_buffers=8
437cpu_side=system.cpu3.icache_port
438mem_side=system.toL2Bus.slave[6]
439
440[system.cpu3.interrupts]
441type=SparcInterrupts

--- 5 unchanged lines hidden (view full) ---

447[system.cpu3.tracer]
448type=ExeTracer
449
450[system.l2c]
451type=BaseCache
452addr_ranges=0:18446744073709551615
453assoc=8
454block_size=64
455clock=1
455clock=500
456forward_snoops=true
457hash_delay=1
456forward_snoops=true
457hash_delay=1
458hit_latency=10000
458hit_latency=20
459is_top_level=false
460max_miss_count=0
459is_top_level=false
460max_miss_count=0
461mshrs=92
461mshrs=20
462prefetch_on_access=false
463prefetcher=Null
464prioritizeRequests=false
465repl=Null
462prefetch_on_access=false
463prefetcher=Null
464prioritizeRequests=false
465repl=Null
466response_latency=10000
466response_latency=20
467size=4194304
468subblock_size=0
469system=system
467size=4194304
468subblock_size=0
469system=system
470tgts_per_mshr=16
470tgts_per_mshr=12
471trace_addr=0
472two_queue=false
473write_buffers=8
474cpu_side=system.toL2Bus.master[0]
475mem_side=system.membus.slave[0]
476
477[system.membus]
478type=CoherentBus
479block_size=64
480clock=1000
481header_cycles=1
482use_default_range=false
483width=8
484master=system.physmem.port
485slave=system.l2c.mem_side system.system_port
486
487[system.physmem]
488type=SimpleMemory
489bandwidth=73.000000
471trace_addr=0
472two_queue=false
473write_buffers=8
474cpu_side=system.toL2Bus.master[0]
475mem_side=system.membus.slave[0]
476
477[system.membus]
478type=CoherentBus
479block_size=64
480clock=1000
481header_cycles=1
482use_default_range=false
483width=8
484master=system.physmem.port
485slave=system.l2c.mem_side system.system_port
486
487[system.physmem]
488type=SimpleMemory
489bandwidth=73.000000
490clock=1
490clock=1000
491conf_table_reported=false
492in_addr_map=true
493latency=30000
494latency_var=0
495null=false
496range=0:1073741823
497zero=false
498port=system.membus.master[0]
499
500[system.toL2Bus]
501type=CoherentBus
502block_size=64
491conf_table_reported=false
492in_addr_map=true
493latency=30000
494latency_var=0
495null=false
496range=0:1073741823
497zero=false
498port=system.membus.master[0]
499
500[system.toL2Bus]
501type=CoherentBus
502block_size=64
503clock=1000
503clock=500
504header_cycles=1
505use_default_range=false
506width=8
507master=system.l2c.cpu_side
508slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
509
504header_cycles=1
505use_default_range=false
506width=8
507master=system.l2c.cpu_side
508slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
509