config.ini (9055:38f1926fb599) config.ini (9150:a2370fa5c793)
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8

--- 451 unchanged lines hidden (view full) ---

460mem_side=system.membus.slave[0]
461
462[system.membus]
463type=CoherentBus
464block_size=64
465clock=1000
466header_cycles=1
467use_default_range=false
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8

--- 451 unchanged lines hidden (view full) ---

460mem_side=system.membus.slave[0]
461
462[system.membus]
463type=CoherentBus
464block_size=64
465clock=1000
466header_cycles=1
467use_default_range=false
468width=64
469master=system.physmem.port[0]
468width=8
469master=system.physmem.port
470slave=system.l2c.mem_side system.system_port
471
472[system.physmem]
473type=SimpleMemory
474conf_table_reported=false
475file=
476in_addr_map=true
477latency=30000

--- 4 unchanged lines hidden (view full) ---

482port=system.membus.master[0]
483
484[system.toL2Bus]
485type=CoherentBus
486block_size=64
487clock=1000
488header_cycles=1
489use_default_range=false
470slave=system.l2c.mem_side system.system_port
471
472[system.physmem]
473type=SimpleMemory
474conf_table_reported=false
475file=
476in_addr_map=true
477latency=30000

--- 4 unchanged lines hidden (view full) ---

482port=system.membus.master[0]
483
484[system.toL2Bus]
485type=CoherentBus
486block_size=64
487clock=1000
488header_cycles=1
489use_default_range=false
490width=64
490width=8
491master=system.l2c.cpu_side
492slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
493
491master=system.l2c.cpu_side
492slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
493