1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8

--- 446 unchanged lines hidden (view full) ---

455tgts_per_mshr=16
456trace_addr=0
457two_queue=false
458write_buffers=8
459cpu_side=system.toL2Bus.master[0]
460mem_side=system.membus.slave[0]
461
462[system.membus]
463type=Bus
464block_size=64
465bus_id=0
466clock=1000
467header_cycles=1
468use_default_range=false
469width=64
470master=system.physmem.port[0]
471slave=system.l2c.mem_side system.system_port
472
473[system.physmem]

--- 4 unchanged lines hidden (view full) ---

478latency=30000
479latency_var=0
480null=false
481range=0:1073741823
482zero=false
483port=system.membus.master[0]
484
485[system.toL2Bus]
486type=Bus
487block_size=64
488bus_id=0
489clock=1000
490header_cycles=1
491use_default_range=false
492width=64
493master=system.l2c.cpu_side
494slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
495