7,11c7,11
< host_inst_rate 79928 # Simulator instruction rate (inst/s)
< host_op_rate 79928 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 8175729 # Simulator tick rate (ticks/s)
< host_mem_usage 236248 # Number of bytes of host memory used
< host_seconds 13.63 # Real time elapsed on the host
---
> host_inst_rate 133234 # Simulator instruction rate (inst/s)
> host_op_rate 133234 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 13628365 # Simulator tick rate (ticks/s)
> host_mem_usage 236536 # Number of bytes of host memory used
> host_seconds 8.17 # Real time elapsed on the host
14,22c14,59
< system.physmem.bytes_read 43072 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 29312 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 673 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 386634052 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 263117973 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 386634052 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu0.inst 23232 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 10816 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 896 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 832 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.inst 5120 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.data 1280 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.inst 64 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.data 832 # Number of bytes read from this memory
> system.physmem.bytes_read::total 43072 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 23232 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 896 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu2.inst 5120 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu3.inst 64 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 29312 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu0.inst 363 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 169 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 14 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 13 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.inst 80 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.data 20 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.inst 1 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.data 13 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 673 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu0.inst 208541101 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 97089383 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 8042907 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 7468414 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.inst 45959471 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.data 11489868 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.inst 574493 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.data 7468414 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 386634052 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 208541101 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 8042907 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu2.inst 45959471 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu3.inst 574493 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 263117973 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 208541101 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 97089383 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 8042907 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 7468414 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.inst 45959471 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.data 11489868 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.inst 574493 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.data 7468414 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 386634052 # Total bandwidth to/from this memory (bytes/s)
321a359
> system.cpu0.icache.ReadReq_miss_rate::total 0.122065 # miss rate for ReadReq accesses
322a361
> system.cpu0.icache.demand_miss_rate::total 0.122065 # miss rate for demand accesses
323a363
> system.cpu0.icache.overall_miss_rate::total 0.122065 # miss rate for overall accesses
324a365
> system.cpu0.icache.ReadReq_avg_miss_latency::total 38418.313570 # average ReadReq miss latency
325a367
> system.cpu0.icache.demand_avg_miss_latency::total 38418.313570 # average overall miss latency
326a369
> system.cpu0.icache.overall_avg_miss_latency::total 38418.313570 # average overall miss latency
353a397
> system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.095529 # mshr miss rate for ReadReq accesses
354a399
> system.cpu0.icache.demand_mshr_miss_rate::total 0.095529 # mshr miss rate for demand accesses
355a401
> system.cpu0.icache.overall_mshr_miss_rate::total 0.095529 # mshr miss rate for overall accesses
356a403
> system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 36853.535354 # average ReadReq mshr miss latency
357a405
> system.cpu0.icache.demand_avg_mshr_miss_latency::total 36853.535354 # average overall mshr miss latency
358a407
> system.cpu0.icache.overall_avg_mshr_miss_latency::total 36853.535354 # average overall mshr miss latency
409a459
> system.cpu0.dcache.ReadReq_miss_rate::total 0.005927 # miss rate for ReadReq accesses
410a461
> system.cpu0.dcache.WriteReq_miss_rate::total 0.006722 # miss rate for WriteReq accesses
411a463
> system.cpu0.dcache.SwapReq_miss_rate::total 0.476190 # miss rate for SwapReq accesses
412a465
> system.cpu0.dcache.demand_miss_rate::total 0.006319 # miss rate for demand accesses
413a467
> system.cpu0.dcache.overall_miss_rate::total 0.006319 # miss rate for overall accesses
414a469
> system.cpu0.dcache.ReadReq_avg_miss_latency::total 28234.343434 # average ReadReq miss latency
415a471
> system.cpu0.dcache.WriteReq_avg_miss_latency::total 44619.021978 # average WriteReq miss latency
416a473
> system.cpu0.dcache.SwapReq_avg_miss_latency::total 19025 # average SwapReq miss latency
417a475
> system.cpu0.dcache.demand_avg_miss_latency::total 36828.036503 # average overall miss latency
418a477
> system.cpu0.dcache.overall_avg_miss_latency::total 36828.036503 # average overall miss latency
457a517
> system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.002179 # mshr miss rate for ReadReq accesses
458a519
> system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.002167 # mshr miss rate for WriteReq accesses
459a521
> system.cpu0.dcache.SwapReq_mshr_miss_rate::total 0.476190 # mshr miss rate for SwapReq accesses
460a523
> system.cpu0.dcache.demand_mshr_miss_rate::total 0.002173 # mshr miss rate for demand accesses
461a525
> system.cpu0.dcache.overall_mshr_miss_rate::total 0.002173 # mshr miss rate for overall accesses
462a527
> system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 27222.527473 # average ReadReq mshr miss latency
463a529
> system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 35511.363636 # average WriteReq mshr miss latency
464a531
> system.cpu0.dcache.SwapReq_avg_mshr_miss_latency::total 16025 # average SwapReq mshr miss latency
465a533
> system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31297.486034 # average overall mshr miss latency
466a535
> system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31297.486034 # average overall mshr miss latency
767a837
> system.cpu1.icache.ReadReq_miss_rate::total 0.025493 # miss rate for ReadReq accesses
768a839
> system.cpu1.icache.demand_miss_rate::total 0.025493 # miss rate for demand accesses
769a841
> system.cpu1.icache.overall_miss_rate::total 0.025493 # miss rate for overall accesses
770a843
> system.cpu1.icache.ReadReq_avg_miss_latency::total 14852.475248 # average ReadReq miss latency
771a845
> system.cpu1.icache.demand_avg_miss_latency::total 14852.475248 # average overall miss latency
772a847
> system.cpu1.icache.overall_avg_miss_latency::total 14852.475248 # average overall miss latency
799a875
> system.cpu1.icache.ReadReq_mshr_miss_rate::total 0.021960 # mshr miss rate for ReadReq accesses
800a877
> system.cpu1.icache.demand_mshr_miss_rate::total 0.021960 # mshr miss rate for demand accesses
801a879
> system.cpu1.icache.overall_mshr_miss_rate::total 0.021960 # mshr miss rate for overall accesses
802a881
> system.cpu1.icache.ReadReq_avg_mshr_miss_latency::total 12585.057471 # average ReadReq mshr miss latency
803a883
> system.cpu1.icache.demand_avg_mshr_miss_latency::total 12585.057471 # average overall mshr miss latency
804a885
> system.cpu1.icache.overall_avg_mshr_miss_latency::total 12585.057471 # average overall mshr miss latency
855a937
> system.cpu1.dcache.ReadReq_miss_rate::total 0.009191 # miss rate for ReadReq accesses
856a939
> system.cpu1.dcache.WriteReq_miss_rate::total 0.003689 # miss rate for WriteReq accesses
857a941
> system.cpu1.dcache.SwapReq_miss_rate::total 0.806452 # miss rate for SwapReq accesses
858a943
> system.cpu1.dcache.demand_miss_rate::total 0.006733 # miss rate for demand accesses
859a945
> system.cpu1.dcache.overall_miss_rate::total 0.006733 # miss rate for overall accesses
860a947
> system.cpu1.dcache.ReadReq_avg_miss_latency::total 20285.263158 # average ReadReq miss latency
861a949
> system.cpu1.dcache.WriteReq_avg_miss_latency::total 19269.480519 # average WriteReq miss latency
862a951
> system.cpu1.dcache.SwapReq_avg_miss_latency::total 20770 # average SwapReq miss latency
863a953
> system.cpu1.dcache.demand_avg_miss_latency::total 20036.565978 # average overall miss latency
864a955
> system.cpu1.dcache.overall_avg_miss_latency::total 20036.565978 # average overall miss latency
903a995
> system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.003019 # mshr miss rate for ReadReq accesses
904a997
> system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.002611 # mshr miss rate for WriteReq accesses
905a999
> system.cpu1.dcache.SwapReq_mshr_miss_rate::total 0.806452 # mshr miss rate for SwapReq accesses
906a1001
> system.cpu1.dcache.demand_mshr_miss_rate::total 0.002837 # mshr miss rate for demand accesses
907a1003
> system.cpu1.dcache.overall_mshr_miss_rate::total 0.002837 # mshr miss rate for overall accesses
908a1005
> system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 13153.846154 # average ReadReq mshr miss latency
909a1007
> system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 13977.064220 # average WriteReq mshr miss latency
910a1009
> system.cpu1.dcache.SwapReq_avg_mshr_miss_latency::total 17770 # average SwapReq mshr miss latency
911a1011
> system.cpu1.dcache.demand_avg_mshr_miss_latency::total 13492.452830 # average overall mshr miss latency
912a1013
> system.cpu1.dcache.overall_avg_mshr_miss_latency::total 13492.452830 # average overall mshr miss latency
1213a1315
> system.cpu2.icache.ReadReq_miss_rate::total 0.023411 # miss rate for ReadReq accesses
1214a1317
> system.cpu2.icache.demand_miss_rate::total 0.023411 # miss rate for demand accesses
1215a1319
> system.cpu2.icache.overall_miss_rate::total 0.023411 # miss rate for overall accesses
1216a1321
> system.cpu2.icache.ReadReq_avg_miss_latency::total 21760.742188 # average ReadReq miss latency
1217a1323
> system.cpu2.icache.demand_avg_miss_latency::total 21760.742188 # average overall miss latency
1218a1325
> system.cpu2.icache.overall_avg_miss_latency::total 21760.742188 # average overall miss latency
1245a1353
> system.cpu2.icache.ReadReq_mshr_miss_rate::total 0.020119 # mshr miss rate for ReadReq accesses
1246a1355
> system.cpu2.icache.demand_mshr_miss_rate::total 0.020119 # mshr miss rate for demand accesses
1247a1357
> system.cpu2.icache.overall_mshr_miss_rate::total 0.020119 # mshr miss rate for overall accesses
1248a1359
> system.cpu2.icache.ReadReq_avg_mshr_miss_latency::total 19243.181818 # average ReadReq mshr miss latency
1249a1361
> system.cpu2.icache.demand_avg_mshr_miss_latency::total 19243.181818 # average overall mshr miss latency
1250a1363
> system.cpu2.icache.overall_avg_mshr_miss_latency::total 19243.181818 # average overall mshr miss latency
1301a1415
> system.cpu2.dcache.ReadReq_miss_rate::total 0.009490 # miss rate for ReadReq accesses
1302a1417
> system.cpu2.dcache.WriteReq_miss_rate::total 0.004137 # miss rate for WriteReq accesses
1303a1419
> system.cpu2.dcache.SwapReq_miss_rate::total 0.815789 # miss rate for SwapReq accesses
1304a1421
> system.cpu2.dcache.demand_miss_rate::total 0.007171 # miss rate for demand accesses
1305a1423
> system.cpu2.dcache.overall_miss_rate::total 0.007171 # miss rate for overall accesses
1306a1425
> system.cpu2.dcache.ReadReq_avg_miss_latency::total 23413.242009 # average ReadReq miss latency
1307a1427
> system.cpu2.dcache.WriteReq_avg_miss_latency::total 20116.438356 # average WriteReq miss latency
1308a1429
> system.cpu2.dcache.SwapReq_avg_miss_latency::total 19048.387097 # average SwapReq miss latency
1309a1431
> system.cpu2.dcache.demand_avg_miss_latency::total 22589.041096 # average overall miss latency
1310a1433
> system.cpu2.dcache.overall_avg_miss_latency::total 22589.041096 # average overall miss latency
1349a1473
> system.cpu2.dcache.ReadReq_mshr_miss_rate::total 0.003705 # mshr miss rate for ReadReq accesses
1350a1475
> system.cpu2.dcache.WriteReq_mshr_miss_rate::total 0.002862 # mshr miss rate for WriteReq accesses
1351a1477
> system.cpu2.dcache.SwapReq_mshr_miss_rate::total 0.815789 # mshr miss rate for SwapReq accesses
1352a1479
> system.cpu2.dcache.demand_mshr_miss_rate::total 0.003340 # mshr miss rate for demand accesses
1353a1481
> system.cpu2.dcache.overall_mshr_miss_rate::total 0.003340 # mshr miss rate for overall accesses
1354a1483
> system.cpu2.dcache.ReadReq_avg_mshr_miss_latency::total 14502.923977 # average ReadReq mshr miss latency
1355a1485
> system.cpu2.dcache.WriteReq_avg_mshr_miss_latency::total 15014.851485 # average WriteReq mshr miss latency
1356a1487
> system.cpu2.dcache.SwapReq_avg_mshr_miss_latency::total 16048.387097 # average SwapReq mshr miss latency
1357a1489
> system.cpu2.dcache.demand_avg_mshr_miss_latency::total 14693.014706 # average overall mshr miss latency
1358a1491
> system.cpu2.dcache.overall_avg_mshr_miss_latency::total 14693.014706 # average overall mshr miss latency
1659a1793
> system.cpu3.icache.ReadReq_miss_rate::total 0.020569 # miss rate for ReadReq accesses
1660a1795
> system.cpu3.icache.demand_miss_rate::total 0.020569 # miss rate for demand accesses
1661a1797
> system.cpu3.icache.overall_miss_rate::total 0.020569 # miss rate for overall accesses
1662a1799
> system.cpu3.icache.ReadReq_avg_miss_latency::total 13604.373757 # average ReadReq miss latency
1663a1801
> system.cpu3.icache.demand_avg_miss_latency::total 13604.373757 # average overall miss latency
1664a1803
> system.cpu3.icache.overall_avg_miss_latency::total 13604.373757 # average overall miss latency
1691a1831
> system.cpu3.icache.ReadReq_mshr_miss_rate::total 0.017666 # mshr miss rate for ReadReq accesses
1692a1833
> system.cpu3.icache.demand_mshr_miss_rate::total 0.017666 # mshr miss rate for demand accesses
1693a1835
> system.cpu3.icache.overall_mshr_miss_rate::total 0.017666 # mshr miss rate for overall accesses
1694a1837
> system.cpu3.icache.ReadReq_avg_mshr_miss_latency::total 11370.370370 # average ReadReq mshr miss latency
1695a1839
> system.cpu3.icache.demand_avg_mshr_miss_latency::total 11370.370370 # average overall mshr miss latency
1696a1841
> system.cpu3.icache.overall_avg_mshr_miss_latency::total 11370.370370 # average overall mshr miss latency
1747a1893
> system.cpu3.dcache.ReadReq_miss_rate::total 0.009688 # miss rate for ReadReq accesses
1748a1895
> system.cpu3.dcache.WriteReq_miss_rate::total 0.004755 # miss rate for WriteReq accesses
1749a1897
> system.cpu3.dcache.SwapReq_miss_rate::total 0.802817 # miss rate for SwapReq accesses
1750a1899
> system.cpu3.dcache.demand_miss_rate::total 0.007618 # miss rate for demand accesses
1751a1901
> system.cpu3.dcache.overall_miss_rate::total 0.007618 # miss rate for overall accesses
1752a1903
> system.cpu3.dcache.ReadReq_avg_miss_latency::total 20514.285714 # average ReadReq miss latency
1753a1905
> system.cpu3.dcache.WriteReq_avg_miss_latency::total 20184.563758 # average WriteReq miss latency
1754a1907
> system.cpu3.dcache.SwapReq_avg_miss_latency::total 21017.543860 # average SwapReq miss latency
1755a1909
> system.cpu3.dcache.demand_avg_miss_latency::total 20427.943761 # average overall miss latency
1756a1911
> system.cpu3.dcache.overall_avg_miss_latency::total 20427.943761 # average overall miss latency
1795a1951
> system.cpu3.dcache.ReadReq_mshr_miss_rate::total 0.003760 # mshr miss rate for ReadReq accesses
1796a1953
> system.cpu3.dcache.WriteReq_mshr_miss_rate::total 0.003319 # mshr miss rate for WriteReq accesses
1797a1955
> system.cpu3.dcache.SwapReq_mshr_miss_rate::total 0.802817 # mshr miss rate for SwapReq accesses
1798a1957
> system.cpu3.dcache.demand_mshr_miss_rate::total 0.003575 # mshr miss rate for demand accesses
1799a1959
> system.cpu3.dcache.overall_mshr_miss_rate::total 0.003575 # mshr miss rate for overall accesses
1800a1961
> system.cpu3.dcache.ReadReq_avg_mshr_miss_latency::total 13196.319018 # average ReadReq mshr miss latency
1801a1963
> system.cpu3.dcache.WriteReq_avg_mshr_miss_latency::total 15586.538462 # average WriteReq mshr miss latency
1802a1965
> system.cpu3.dcache.SwapReq_avg_mshr_miss_latency::total 18017.543860 # average SwapReq mshr miss latency
1803a1967
> system.cpu3.dcache.demand_avg_mshr_miss_latency::total 14127.340824 # average overall mshr miss latency
1804a1969
> system.cpu3.dcache.overall_avg_mshr_miss_latency::total 14127.340824 # average overall mshr miss latency
1981a2147
> system.l2c.ReadReq_miss_rate::total 0.271379 # miss rate for ReadReq accesses
1985a2152
> system.l2c.UpgradeReq_miss_rate::total 0.963855 # miss rate for UpgradeReq accesses
1989a2157
> system.l2c.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
1997a2166
> system.l2c.demand_miss_rate::total 0.315692 # miss rate for demand accesses
2005a2175
> system.l2c.overall_miss_rate::total 0.315692 # miss rate for overall accesses
2013a2184
> system.l2c.ReadReq_avg_miss_latency::total 51985.428051 # average ReadReq miss latency
2016a2188
> system.l2c.UpgradeReq_avg_miss_latency::total 1968.750000 # average UpgradeReq miss latency
2020a2193
> system.l2c.ReadExReq_avg_miss_latency::total 52480.916031 # average ReadExReq miss latency
2028a2202
> system.l2c.demand_avg_miss_latency::total 52080.882353 # average overall miss latency
2036a2211
> system.l2c.overall_avg_miss_latency::total 52080.882353 # average overall miss latency
2138a2314
> system.l2c.ReadReq_mshr_miss_rate::total 0.267919 # mshr miss rate for ReadReq accesses
2142a2319
> system.l2c.UpgradeReq_mshr_miss_rate::total 0.963855 # mshr miss rate for UpgradeReq accesses
2146a2324
> system.l2c.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
2154a2333
> system.l2c.demand_mshr_miss_rate::total 0.312442 # mshr miss rate for demand accesses
2162a2342
> system.l2c.overall_mshr_miss_rate::total 0.312442 # mshr miss rate for overall accesses
2170a2351
> system.l2c.ReadReq_avg_mshr_miss_latency::total 39979.704797 # average ReadReq mshr miss latency
2174a2356
> system.l2c.UpgradeReq_avg_mshr_miss_latency::total 40000 # average UpgradeReq mshr miss latency
2178a2361
> system.l2c.ReadExReq_avg_mshr_miss_latency::total 40293.893130 # average ReadExReq mshr miss latency
2186a2370
> system.l2c.demand_avg_mshr_miss_latency::total 40040.861813 # average overall mshr miss latency
2194a2379
> system.l2c.overall_avg_mshr_miss_latency::total 40040.861813 # average overall mshr miss latency
< host_inst_rate 79928 # Simulator instruction rate (inst/s)
< host_op_rate 79928 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 8175729 # Simulator tick rate (ticks/s)
< host_mem_usage 236248 # Number of bytes of host memory used
< host_seconds 13.63 # Real time elapsed on the host
---
> host_inst_rate 133234 # Simulator instruction rate (inst/s)
> host_op_rate 133234 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 13628365 # Simulator tick rate (ticks/s)
> host_mem_usage 236536 # Number of bytes of host memory used
> host_seconds 8.17 # Real time elapsed on the host
14,22c14,59
< system.physmem.bytes_read 43072 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 29312 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 673 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 386634052 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 263117973 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 386634052 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu0.inst 23232 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 10816 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 896 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 832 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.inst 5120 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu2.data 1280 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.inst 64 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu3.data 832 # Number of bytes read from this memory
> system.physmem.bytes_read::total 43072 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 23232 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 896 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu2.inst 5120 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu3.inst 64 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 29312 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu0.inst 363 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 169 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 14 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 13 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.inst 80 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu2.data 20 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.inst 1 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu3.data 13 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 673 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu0.inst 208541101 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 97089383 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 8042907 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 7468414 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.inst 45959471 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu2.data 11489868 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.inst 574493 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu3.data 7468414 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 386634052 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 208541101 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 8042907 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu2.inst 45959471 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu3.inst 574493 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 263117973 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 208541101 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 97089383 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 8042907 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 7468414 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.inst 45959471 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu2.data 11489868 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.inst 574493 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu3.data 7468414 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 386634052 # Total bandwidth to/from this memory (bytes/s)
321a359
> system.cpu0.icache.ReadReq_miss_rate::total 0.122065 # miss rate for ReadReq accesses
322a361
> system.cpu0.icache.demand_miss_rate::total 0.122065 # miss rate for demand accesses
323a363
> system.cpu0.icache.overall_miss_rate::total 0.122065 # miss rate for overall accesses
324a365
> system.cpu0.icache.ReadReq_avg_miss_latency::total 38418.313570 # average ReadReq miss latency
325a367
> system.cpu0.icache.demand_avg_miss_latency::total 38418.313570 # average overall miss latency
326a369
> system.cpu0.icache.overall_avg_miss_latency::total 38418.313570 # average overall miss latency
353a397
> system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.095529 # mshr miss rate for ReadReq accesses
354a399
> system.cpu0.icache.demand_mshr_miss_rate::total 0.095529 # mshr miss rate for demand accesses
355a401
> system.cpu0.icache.overall_mshr_miss_rate::total 0.095529 # mshr miss rate for overall accesses
356a403
> system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 36853.535354 # average ReadReq mshr miss latency
357a405
> system.cpu0.icache.demand_avg_mshr_miss_latency::total 36853.535354 # average overall mshr miss latency
358a407
> system.cpu0.icache.overall_avg_mshr_miss_latency::total 36853.535354 # average overall mshr miss latency
409a459
> system.cpu0.dcache.ReadReq_miss_rate::total 0.005927 # miss rate for ReadReq accesses
410a461
> system.cpu0.dcache.WriteReq_miss_rate::total 0.006722 # miss rate for WriteReq accesses
411a463
> system.cpu0.dcache.SwapReq_miss_rate::total 0.476190 # miss rate for SwapReq accesses
412a465
> system.cpu0.dcache.demand_miss_rate::total 0.006319 # miss rate for demand accesses
413a467
> system.cpu0.dcache.overall_miss_rate::total 0.006319 # miss rate for overall accesses
414a469
> system.cpu0.dcache.ReadReq_avg_miss_latency::total 28234.343434 # average ReadReq miss latency
415a471
> system.cpu0.dcache.WriteReq_avg_miss_latency::total 44619.021978 # average WriteReq miss latency
416a473
> system.cpu0.dcache.SwapReq_avg_miss_latency::total 19025 # average SwapReq miss latency
417a475
> system.cpu0.dcache.demand_avg_miss_latency::total 36828.036503 # average overall miss latency
418a477
> system.cpu0.dcache.overall_avg_miss_latency::total 36828.036503 # average overall miss latency
457a517
> system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.002179 # mshr miss rate for ReadReq accesses
458a519
> system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.002167 # mshr miss rate for WriteReq accesses
459a521
> system.cpu0.dcache.SwapReq_mshr_miss_rate::total 0.476190 # mshr miss rate for SwapReq accesses
460a523
> system.cpu0.dcache.demand_mshr_miss_rate::total 0.002173 # mshr miss rate for demand accesses
461a525
> system.cpu0.dcache.overall_mshr_miss_rate::total 0.002173 # mshr miss rate for overall accesses
462a527
> system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 27222.527473 # average ReadReq mshr miss latency
463a529
> system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 35511.363636 # average WriteReq mshr miss latency
464a531
> system.cpu0.dcache.SwapReq_avg_mshr_miss_latency::total 16025 # average SwapReq mshr miss latency
465a533
> system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31297.486034 # average overall mshr miss latency
466a535
> system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31297.486034 # average overall mshr miss latency
767a837
> system.cpu1.icache.ReadReq_miss_rate::total 0.025493 # miss rate for ReadReq accesses
768a839
> system.cpu1.icache.demand_miss_rate::total 0.025493 # miss rate for demand accesses
769a841
> system.cpu1.icache.overall_miss_rate::total 0.025493 # miss rate for overall accesses
770a843
> system.cpu1.icache.ReadReq_avg_miss_latency::total 14852.475248 # average ReadReq miss latency
771a845
> system.cpu1.icache.demand_avg_miss_latency::total 14852.475248 # average overall miss latency
772a847
> system.cpu1.icache.overall_avg_miss_latency::total 14852.475248 # average overall miss latency
799a875
> system.cpu1.icache.ReadReq_mshr_miss_rate::total 0.021960 # mshr miss rate for ReadReq accesses
800a877
> system.cpu1.icache.demand_mshr_miss_rate::total 0.021960 # mshr miss rate for demand accesses
801a879
> system.cpu1.icache.overall_mshr_miss_rate::total 0.021960 # mshr miss rate for overall accesses
802a881
> system.cpu1.icache.ReadReq_avg_mshr_miss_latency::total 12585.057471 # average ReadReq mshr miss latency
803a883
> system.cpu1.icache.demand_avg_mshr_miss_latency::total 12585.057471 # average overall mshr miss latency
804a885
> system.cpu1.icache.overall_avg_mshr_miss_latency::total 12585.057471 # average overall mshr miss latency
855a937
> system.cpu1.dcache.ReadReq_miss_rate::total 0.009191 # miss rate for ReadReq accesses
856a939
> system.cpu1.dcache.WriteReq_miss_rate::total 0.003689 # miss rate for WriteReq accesses
857a941
> system.cpu1.dcache.SwapReq_miss_rate::total 0.806452 # miss rate for SwapReq accesses
858a943
> system.cpu1.dcache.demand_miss_rate::total 0.006733 # miss rate for demand accesses
859a945
> system.cpu1.dcache.overall_miss_rate::total 0.006733 # miss rate for overall accesses
860a947
> system.cpu1.dcache.ReadReq_avg_miss_latency::total 20285.263158 # average ReadReq miss latency
861a949
> system.cpu1.dcache.WriteReq_avg_miss_latency::total 19269.480519 # average WriteReq miss latency
862a951
> system.cpu1.dcache.SwapReq_avg_miss_latency::total 20770 # average SwapReq miss latency
863a953
> system.cpu1.dcache.demand_avg_miss_latency::total 20036.565978 # average overall miss latency
864a955
> system.cpu1.dcache.overall_avg_miss_latency::total 20036.565978 # average overall miss latency
903a995
> system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.003019 # mshr miss rate for ReadReq accesses
904a997
> system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.002611 # mshr miss rate for WriteReq accesses
905a999
> system.cpu1.dcache.SwapReq_mshr_miss_rate::total 0.806452 # mshr miss rate for SwapReq accesses
906a1001
> system.cpu1.dcache.demand_mshr_miss_rate::total 0.002837 # mshr miss rate for demand accesses
907a1003
> system.cpu1.dcache.overall_mshr_miss_rate::total 0.002837 # mshr miss rate for overall accesses
908a1005
> system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 13153.846154 # average ReadReq mshr miss latency
909a1007
> system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 13977.064220 # average WriteReq mshr miss latency
910a1009
> system.cpu1.dcache.SwapReq_avg_mshr_miss_latency::total 17770 # average SwapReq mshr miss latency
911a1011
> system.cpu1.dcache.demand_avg_mshr_miss_latency::total 13492.452830 # average overall mshr miss latency
912a1013
> system.cpu1.dcache.overall_avg_mshr_miss_latency::total 13492.452830 # average overall mshr miss latency
1213a1315
> system.cpu2.icache.ReadReq_miss_rate::total 0.023411 # miss rate for ReadReq accesses
1214a1317
> system.cpu2.icache.demand_miss_rate::total 0.023411 # miss rate for demand accesses
1215a1319
> system.cpu2.icache.overall_miss_rate::total 0.023411 # miss rate for overall accesses
1216a1321
> system.cpu2.icache.ReadReq_avg_miss_latency::total 21760.742188 # average ReadReq miss latency
1217a1323
> system.cpu2.icache.demand_avg_miss_latency::total 21760.742188 # average overall miss latency
1218a1325
> system.cpu2.icache.overall_avg_miss_latency::total 21760.742188 # average overall miss latency
1245a1353
> system.cpu2.icache.ReadReq_mshr_miss_rate::total 0.020119 # mshr miss rate for ReadReq accesses
1246a1355
> system.cpu2.icache.demand_mshr_miss_rate::total 0.020119 # mshr miss rate for demand accesses
1247a1357
> system.cpu2.icache.overall_mshr_miss_rate::total 0.020119 # mshr miss rate for overall accesses
1248a1359
> system.cpu2.icache.ReadReq_avg_mshr_miss_latency::total 19243.181818 # average ReadReq mshr miss latency
1249a1361
> system.cpu2.icache.demand_avg_mshr_miss_latency::total 19243.181818 # average overall mshr miss latency
1250a1363
> system.cpu2.icache.overall_avg_mshr_miss_latency::total 19243.181818 # average overall mshr miss latency
1301a1415
> system.cpu2.dcache.ReadReq_miss_rate::total 0.009490 # miss rate for ReadReq accesses
1302a1417
> system.cpu2.dcache.WriteReq_miss_rate::total 0.004137 # miss rate for WriteReq accesses
1303a1419
> system.cpu2.dcache.SwapReq_miss_rate::total 0.815789 # miss rate for SwapReq accesses
1304a1421
> system.cpu2.dcache.demand_miss_rate::total 0.007171 # miss rate for demand accesses
1305a1423
> system.cpu2.dcache.overall_miss_rate::total 0.007171 # miss rate for overall accesses
1306a1425
> system.cpu2.dcache.ReadReq_avg_miss_latency::total 23413.242009 # average ReadReq miss latency
1307a1427
> system.cpu2.dcache.WriteReq_avg_miss_latency::total 20116.438356 # average WriteReq miss latency
1308a1429
> system.cpu2.dcache.SwapReq_avg_miss_latency::total 19048.387097 # average SwapReq miss latency
1309a1431
> system.cpu2.dcache.demand_avg_miss_latency::total 22589.041096 # average overall miss latency
1310a1433
> system.cpu2.dcache.overall_avg_miss_latency::total 22589.041096 # average overall miss latency
1349a1473
> system.cpu2.dcache.ReadReq_mshr_miss_rate::total 0.003705 # mshr miss rate for ReadReq accesses
1350a1475
> system.cpu2.dcache.WriteReq_mshr_miss_rate::total 0.002862 # mshr miss rate for WriteReq accesses
1351a1477
> system.cpu2.dcache.SwapReq_mshr_miss_rate::total 0.815789 # mshr miss rate for SwapReq accesses
1352a1479
> system.cpu2.dcache.demand_mshr_miss_rate::total 0.003340 # mshr miss rate for demand accesses
1353a1481
> system.cpu2.dcache.overall_mshr_miss_rate::total 0.003340 # mshr miss rate for overall accesses
1354a1483
> system.cpu2.dcache.ReadReq_avg_mshr_miss_latency::total 14502.923977 # average ReadReq mshr miss latency
1355a1485
> system.cpu2.dcache.WriteReq_avg_mshr_miss_latency::total 15014.851485 # average WriteReq mshr miss latency
1356a1487
> system.cpu2.dcache.SwapReq_avg_mshr_miss_latency::total 16048.387097 # average SwapReq mshr miss latency
1357a1489
> system.cpu2.dcache.demand_avg_mshr_miss_latency::total 14693.014706 # average overall mshr miss latency
1358a1491
> system.cpu2.dcache.overall_avg_mshr_miss_latency::total 14693.014706 # average overall mshr miss latency
1659a1793
> system.cpu3.icache.ReadReq_miss_rate::total 0.020569 # miss rate for ReadReq accesses
1660a1795
> system.cpu3.icache.demand_miss_rate::total 0.020569 # miss rate for demand accesses
1661a1797
> system.cpu3.icache.overall_miss_rate::total 0.020569 # miss rate for overall accesses
1662a1799
> system.cpu3.icache.ReadReq_avg_miss_latency::total 13604.373757 # average ReadReq miss latency
1663a1801
> system.cpu3.icache.demand_avg_miss_latency::total 13604.373757 # average overall miss latency
1664a1803
> system.cpu3.icache.overall_avg_miss_latency::total 13604.373757 # average overall miss latency
1691a1831
> system.cpu3.icache.ReadReq_mshr_miss_rate::total 0.017666 # mshr miss rate for ReadReq accesses
1692a1833
> system.cpu3.icache.demand_mshr_miss_rate::total 0.017666 # mshr miss rate for demand accesses
1693a1835
> system.cpu3.icache.overall_mshr_miss_rate::total 0.017666 # mshr miss rate for overall accesses
1694a1837
> system.cpu3.icache.ReadReq_avg_mshr_miss_latency::total 11370.370370 # average ReadReq mshr miss latency
1695a1839
> system.cpu3.icache.demand_avg_mshr_miss_latency::total 11370.370370 # average overall mshr miss latency
1696a1841
> system.cpu3.icache.overall_avg_mshr_miss_latency::total 11370.370370 # average overall mshr miss latency
1747a1893
> system.cpu3.dcache.ReadReq_miss_rate::total 0.009688 # miss rate for ReadReq accesses
1748a1895
> system.cpu3.dcache.WriteReq_miss_rate::total 0.004755 # miss rate for WriteReq accesses
1749a1897
> system.cpu3.dcache.SwapReq_miss_rate::total 0.802817 # miss rate for SwapReq accesses
1750a1899
> system.cpu3.dcache.demand_miss_rate::total 0.007618 # miss rate for demand accesses
1751a1901
> system.cpu3.dcache.overall_miss_rate::total 0.007618 # miss rate for overall accesses
1752a1903
> system.cpu3.dcache.ReadReq_avg_miss_latency::total 20514.285714 # average ReadReq miss latency
1753a1905
> system.cpu3.dcache.WriteReq_avg_miss_latency::total 20184.563758 # average WriteReq miss latency
1754a1907
> system.cpu3.dcache.SwapReq_avg_miss_latency::total 21017.543860 # average SwapReq miss latency
1755a1909
> system.cpu3.dcache.demand_avg_miss_latency::total 20427.943761 # average overall miss latency
1756a1911
> system.cpu3.dcache.overall_avg_miss_latency::total 20427.943761 # average overall miss latency
1795a1951
> system.cpu3.dcache.ReadReq_mshr_miss_rate::total 0.003760 # mshr miss rate for ReadReq accesses
1796a1953
> system.cpu3.dcache.WriteReq_mshr_miss_rate::total 0.003319 # mshr miss rate for WriteReq accesses
1797a1955
> system.cpu3.dcache.SwapReq_mshr_miss_rate::total 0.802817 # mshr miss rate for SwapReq accesses
1798a1957
> system.cpu3.dcache.demand_mshr_miss_rate::total 0.003575 # mshr miss rate for demand accesses
1799a1959
> system.cpu3.dcache.overall_mshr_miss_rate::total 0.003575 # mshr miss rate for overall accesses
1800a1961
> system.cpu3.dcache.ReadReq_avg_mshr_miss_latency::total 13196.319018 # average ReadReq mshr miss latency
1801a1963
> system.cpu3.dcache.WriteReq_avg_mshr_miss_latency::total 15586.538462 # average WriteReq mshr miss latency
1802a1965
> system.cpu3.dcache.SwapReq_avg_mshr_miss_latency::total 18017.543860 # average SwapReq mshr miss latency
1803a1967
> system.cpu3.dcache.demand_avg_mshr_miss_latency::total 14127.340824 # average overall mshr miss latency
1804a1969
> system.cpu3.dcache.overall_avg_mshr_miss_latency::total 14127.340824 # average overall mshr miss latency
1981a2147
> system.l2c.ReadReq_miss_rate::total 0.271379 # miss rate for ReadReq accesses
1985a2152
> system.l2c.UpgradeReq_miss_rate::total 0.963855 # miss rate for UpgradeReq accesses
1989a2157
> system.l2c.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
1997a2166
> system.l2c.demand_miss_rate::total 0.315692 # miss rate for demand accesses
2005a2175
> system.l2c.overall_miss_rate::total 0.315692 # miss rate for overall accesses
2013a2184
> system.l2c.ReadReq_avg_miss_latency::total 51985.428051 # average ReadReq miss latency
2016a2188
> system.l2c.UpgradeReq_avg_miss_latency::total 1968.750000 # average UpgradeReq miss latency
2020a2193
> system.l2c.ReadExReq_avg_miss_latency::total 52480.916031 # average ReadExReq miss latency
2028a2202
> system.l2c.demand_avg_miss_latency::total 52080.882353 # average overall miss latency
2036a2211
> system.l2c.overall_avg_miss_latency::total 52080.882353 # average overall miss latency
2138a2314
> system.l2c.ReadReq_mshr_miss_rate::total 0.267919 # mshr miss rate for ReadReq accesses
2142a2319
> system.l2c.UpgradeReq_mshr_miss_rate::total 0.963855 # mshr miss rate for UpgradeReq accesses
2146a2324
> system.l2c.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
2154a2333
> system.l2c.demand_mshr_miss_rate::total 0.312442 # mshr miss rate for demand accesses
2162a2342
> system.l2c.overall_mshr_miss_rate::total 0.312442 # mshr miss rate for overall accesses
2170a2351
> system.l2c.ReadReq_avg_mshr_miss_latency::total 39979.704797 # average ReadReq mshr miss latency
2174a2356
> system.l2c.UpgradeReq_avg_mshr_miss_latency::total 40000 # average UpgradeReq mshr miss latency
2178a2361
> system.l2c.ReadExReq_avg_mshr_miss_latency::total 40293.893130 # average ReadExReq mshr miss latency
2186a2370
> system.l2c.demand_avg_mshr_miss_latency::total 40040.861813 # average overall mshr miss latency
2194a2379
> system.l2c.overall_avg_mshr_miss_latency::total 40040.861813 # average overall mshr miss latency